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Unisonic Technologies Co., LTD: Low Cost Power-Saving Mode PWM Controller For Flyback Converters

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0% found this document useful (0 votes)
41 views10 pages

Unisonic Technologies Co., LTD: Low Cost Power-Saving Mode PWM Controller For Flyback Converters

Uploaded by

Aslam Mulla
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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UNISONIC TECHNOLOGIES CO.

, LTD
UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

LOW COST POWER-SAVING


MODE PWM CONTROLLER
FOR FLYBACK CONVERTERS

 DESCRIPTION
The UTC UC3800/B is a high performance current mode PWM
controller ideally suited for low standby power. High voltage startup SOP-8
is implemented in UTC UC3800/B, which features with short
startup time and no standby current. At no load condition, the IC
operates in power-saving mode for lower standby power,
decreasing frequency for higher conversion efficiency at light load
condition.
The internal slope compensation improves system stability at
high PWM duty cycle output. Leading-edge blanking on current
sense input removes the signal glitch, which offering minimal
external component count in the design. Excellent EMI
performance is achieved with UTC proprietary frequency hopping
technique (ZL201020615247.1) together with soft driver control.
Audio noise is eliminated due to switch frequency more than 20kHz
during operation.
The UTC UC3800/B has such applications as: battery charger,
power adaptor, set-top box power supplies, ink jet printers,
open-frame SMPS.
 FEATURES
* UTC proprietary frequency hopping technology for Improved EMI * Fixed switch frequency 65kHz
performance. * Gate output voltage clamped at 16V
* Power-saving mode for high light-load and standby efficiency * Low start-up current
* Soft Start * Cycle-by-cycle Current Limiting
* Dynamic peak current limiting for constant output power * Under voltage lockout (UVLO)
* Built-in synchronized slope compensation * Few external components required
* OTP,OLP,OVP, LNO-OVP, Brownout and VDD clamp for higher
security
 ORDERING INFORMATION
Ordering Number
Package Packing
Lead Free Halogen Free
UC3800L-S08-R UC3800G-S08-R SOP-8 Tape Reel
UC3800BL-S08-R UC3800BG-S08-R SOP-8 Tape Reel

UC3800BG-S08-R
(1)Packing Type (1) R: Tape Reel

(2)Package Type (2) S08: SOP-8

(3)Green Package (3) G: Halogen Free and Lead Free, L: Lead Free

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Copyright © 2020 Unisonic Technologies Co., Ltd QW-R103-083.e
UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

 MARKING
UC3800 UC3800B
8 7 6 5 8 7 6 5
Date Code Date Code
UTC UTC
UC3800 L: Lead Free UC3800B L: Lead Free
G: Halogen Free G: Halogen Free
Lot Code Lot Code
1 2 3 4 1 2 3 4

 PIN CONFIGURATION

GATE 1 8 HV

VDD 2 7 NC

CS 3 6 GND

LNO 4 5 FB

 PIN DESCRIPTION
PIN NO. PIN NAME PIN TYPE DESCRIPTION
1 GATE O Totem-pole gate driver output for power MOSFET.
2 VDD P Supply voltage
3 CS I Current sense input.
This pin is connected to the line input via two resistors to achieve line
4 LNO I
voltage over protect function and Brownout
The PWM duty cycle is determined by voltage level into this pin and the
5 FB I
current-sense signal at CS pin.
6 GND P Ground.
7 NC
8 HV I Connected to the line input or bulk capacitor via resistor for setup.

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

 BLOCK DIAGRAM

HV HV Start Driver GATE

Internal Soft
supply Start
EN
Green
Mode OCP
UVLO
VDD
Slope
OSC LEB CS
Compensation

PWM
OVP
Logic Comparator
Burst
Mode
EN R S
Clamp -
Q Q
S R +
Vth_OLP
-
2R
+ FB
Delay
OLP
R
Comparator
Delay
OTP
+ LNO
- Vth_LNO

GND

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT
 ABSOLUTE MAXIMUM RATINGS (TA=25°C, VDD =16V, unless otherwise specified)
PARAMETER SYMBOL RATINGS UNIT
Supply Voltage VDD 30 V
Input Voltage to FB Pin VFB -0.3 ~ 6 V
Input Voltage to CS Pin VSENSE -0.3 ~ 6 V
Junction Temperature TJ +150 C
Operating Temperature TOPR -40 ~ +125 °C
Storage Temperature TSTG -50 ~ +150 C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
 OPERATING RANGE
PARAMETER SYMBOL RATINGS UNIT
Supply Voltage VDD 9 ~ 24 V

 THERMAL DATA
PARAMETER SYMBOL RATINGS UNIT
Junction to Ambient θJA 150 °C/W

 ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=16V,unless otherwise specified)


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY SECTION
Supply current from HV Pin IHV HV=100V 0.6 mA
Start Up Current ISTR VDD = VDD(ON)-0.1V 2 15 μA
IC Operating current IOP1 VFB=3.5V 0.8 1.8 mA
VDD Zener Clamp Voltage VDD(CLAMP) IDD=20mA 32 34 36 V
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage VDD(ON) 16.5 18.5 21 V
Min. Operating Voltage VDD(OFF) 6 7 8 V
Hysteresis VDD(HY) 6 V
CONTROL SECTION
VFB Open Loop Voltage Level VFB-OPEN 5.0 5.4 V
PWM Input Gain AVCS ΔVFB/ΔVCS 3 V/V
UC3800 1.1 V
The FB threshold enter burst mode VFB(IN)
UC3800B 0.85
UC3800 1.2 V
The FB threshold exit burst mode VFB(OUT)
UC3800B 0.9
Normal VFB=3.5V, hopping Rang 60 65 70 KHz
Switch Frequency FSW
Power-Saving VFB=1.4V 19 KHz
Duty Cycle DMAX VFB=3.5V, VSENSE=0 70 78 85 %
Frequency Hopping FJ(SW) -9 +9 %
Frequency VDD Stability FDV VDD=12V~20V 5 %
Frequency Temperature Stability FDT T=-40~85°C 10 %
PROTECTION SECTION
VCC Over Voltage Protection Threshold VOVP VFB=3.5V 25 27 29 V
FB PIN Over Load Protection Threshold VOLP 4.6 V
Over Load Protection Delay-Time TDelay 60 88 120 mS
Soft start time TSS 5 mS
OTP Level TOTP 150 °C

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

 ELECTRICAL CHARACTERISTICS (Note.)


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
CURRENT LIMITING SECTION
Peak Current Flat Threshold Voltage VCS-F VFB=4V, Duty≥60% 0.97 V
Peak Current Valley Threshold Voltage VCS-V VFB=4V, Duty=0% 0.57 0.62 0.67 V
Lead Edge Blanking Time TLEB 350 ns
DRIVER OUTPUT SECTION
Output Voltage Low State VOL VDD=16V,IO=-20mA 1 V
Output Voltage High State VOH VDD=16V,IO= 20mA 11 V
Output clamp Voltage V_Clamping 16 V
Output Voltage Rise Time tR CL=1.0nF 150 ns
Output Voltage Fall Time tF CL=1.0nF 60 ns
LNO SECTION
Threshold voltage for LNO VTH_LNO 0.93 1.03 1.10 V
Threshold voltage for BNO VTH_BNO 0.22 0.26 0.30 V

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

 OPERATION DESCRIPTION
The UTC UC3800/B devices integrate many useful designs into one controller for low-power switch-mode power
supplies. The following descriptions highlight some of the features of the UTC UC3800/B series.
HV Start-up
UTC UC3800/B integrated HV start circuit, and provide about 1mA current to charge V DD pin during power on state
from HV pin. When VDD cap voltage is higher than UVLO (OFF), the charge current is switched off. At this moment,
the VDD capacitor provides current to UTC UC3800/B until the auxiliary winding of the main transformer starts to
provide the operation current.
Power-Saving Mode Operation
The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under light-load
conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is taken as
the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency starts to
decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load conditions.
The 22KHz minimum frequency control also eliminates the audio noise at any loading conditions.
At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a
fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the
energy. The UTC UC3800/B enter burst mode at standby condition to minimize the switching loss and reduces the
standby power consumption. Power supplies using the UTC UC3800/B can easily meet even the strictest regulations
regarding standby power consumption.
Switch Frequency Set
The maximum switch frequency is fixed to 65KHz. Switch frequency is modulated by output power POUT during IC
operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from
switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The
magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower
switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light
load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between f SW
and POUT/POUT (MAX) as followed Fig.1.

1%~100% Load @ 115 & 230 Vac


70

60
55
FSW (KHz)

115V
40

25 230V

10
1% 9% 19% 30% 100%
POUT/POUT(max)

Fig.1 The relation curve between fSW and relative output power POUT/ POUT (MAX)

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

 OPERATION DESCRIPTION (Cont.)

Frequency Hopping For EMI Improvement


The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to
set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd
oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.

Fsw
(KHz)

FSW_MAX
FSW_TYP
FSW_MIN

THopping

t(ms)

Fig.2 Frequency Hopping

Built-in Slope Compensation


Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the sub-harmonic
oscillation.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid
premature termination of the switching pulse, a 350ns leading-edge blanking time is built in. Conventional RC
filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot
switch off the gate driver.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.95V, the output
GATE drive will be turned off after a small propagation delay t D. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor R VIN, a
higher line voltage will generate higher V IN current into the VIN pin. The threshold voltage is decreased if the V IN
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
Under Voltage Lockout (UVLO)
The turn-on and turn-off thresholds of the UTC UC3800/B are fixed internally at VTHD(ON)/VDD(MIN) During start-up,
the hold-up capacitor must be charged to VTHD(ON) through the start-up resistor, so that the UTC UC3800/B will be
enabled. The hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of
the main transformer. VDD must not drop below VDD(MIN) during this start-up process. This UVLO hysteresis window
ensures that hold-up capacitor will be adequate to supply VDD during start-up.
Gate Output
The UTC UC3800/B output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control.
The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal
16V clamp is added for MOSFET gate protection at higher than expected VDD input.

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

 OPERATION DESCRIPTION (Cont.)

Protection Controls
The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. Driver is reset after failure is eliminated.
OVP
The OVP will shut down the switching of the power MOSFET whenever VDD >VOVP. The OVP event as followed
Fig.3.

VDD VFB
VOVP VOLP
VTHD(ON)
VCC(MIN) T1<TDelay T2>TDelay
VFB(IN)

Driver t Driver t
ON/OFF ON / OFF

t t

Fig.3 OVP case Fig.4 OLP case

OLP
OLP will shut down driver when VFB> VOLP for continual time. The OLP event as followed Fig.4.
LNO-OVP and BNO
LNO will shut down driver when LNO> VTH_LNO or LNO<VTH_BNO for continual time.
OTP
The internal OTP circuit is implemented to detect the Temperature. As soon as the Temperature is higher than
the 150C, the driver will shut down.
PCB Layout Note
Noise from the current sense or the control signal can cause significant pulse width jitter in continuous-conduction
mode, and slope compensation helps alleviate these problems. Good placement and layout practices should be
followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the
UTC UC3800/B, and increasing the power MOS gate resistance is advised.

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

 REFRENCE CIRCUIT (12V/1.5A)

F1 1
L2 2
L
1
R1 BD1
CX1
2 4 + C3 R3
C1 C2 T1 D5
R2 1, 2 2 1 1
L1 2
10 VO
N 3
D2 9
8 R10 C9
D4 R4 22 + + 1
U1 1 2 5 C10 C11 C13
1 Q1 2 ZD1
8 HV GATE 1
7 2 R6 3
NC VDD 7
GND
6 GND SENSE 3 R7 3, 4
R9-1 5 4
FB LNO R8 C7
C8
R5 D3
1 2

+ R12
C5 C4
R9 U3
4 1 R15
R13 R14
3 2

3 C12
CY1 U2
1

R16
2

BOM
Reference Component Reference Component
BD1 BD 1A/600V L2 20mH 6*8mm
CX1 (Optional) NC Q1 4N60
CY1 (Optional) YC 220P/400V (Y1) R1,R2 R 1MΩ 1206
C2 EC 22μF/400V 105°C R3 R 30KΩ 1206
C1 EC 10μF/400V 105°C R4 (Optional) R 20Ω 1W
C3 CC 0.01μF/1000V R5 R 0Ω 1206
C4 EC 3.3μF/50V R6 R 100Ω 1206
C5,C13 (Optional) CC 104P/25V 0805 R7 R 1.1Ω 1W
C7 (Optional) CC 102P/25V 1206 R8 R 10kΩ 1206
C8 CC 102P/25V 1206 R9/R9-1 R 2.8kΩ / 1MΩ
C9 CC 222P/100V 1206 R10 R 51Ω 0.5W
C10 EC 470u/16V 105°C R12 R 510Ω 0805
C11 EC 220u/16V 105°C R13 R 2KΩ 0805
C12 CC 222P/16V 0805 R14 R 0Ω 0805
C14 NC R15 R 43kΩ 0805
D2 Diode FR107 R16 R 12kΩ 0805
D3 Diode FR102 R17 R 120kΩ 0805
D4 (Optional) T1 EF-20
D5 Diode SB360 U1 IC UC3800/B
F1 R1Ω/0.5W U2 TL431
L1 10μH 6mm U3 PC817

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UC3800/B Preliminary LINEAR INTEGRATED CIRCUIT

UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all UTC products described or contained herein .
UTC products are not designed for use in life support appliances, devices or systems where malfunction
of these products can be reasonably expected to result in personal injury. Reproduction in whole or in
part is prohibited without the prior written consent of the copyright owner. UTC reserves the right to
make changes to information published in this document, including without limitation specifications and
product descriptions, at any time and without notice. This document supersedes and replaces all
information supplied prior to the publication hereof.

UNISONIC TECHNOLOGIES CO., LTD 10 of 10


www.unisonic.com.tw QW-R103-083.e

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