SHADAN COLLEGE OF ENGINEERING AND TECHNOLOGY
B. Tech. Mid Question Bank (R23 Regulation) Branches: CSE/IT/AIDS
Academic Year: 2024-2025 Semester: III
Subject Name: Digital Electronics
Faculty Name: Dr Shaik Saidulu, Dr Ravi Kumar and Dr A. K Lodhi
                                           PART A
Q. NO   Question                                           Mark   Bloom     CO.   UNIT
                                                           s      s Level   NO    NO
1       2’s complement number for 101010111                1      L3        CO1   1
2       (42)10 covert into Hex decimal number              1      L2        CO1   1
3        1010101101 given code is covert into Grey code    1      L2        CO1   1
4       State Duality Principle.                           1      L2        CO1   1
5       Express the Boolean function F = A + B’C as        1      L2        CO1   1
        standard sum of minterms.
6       Which of the gates are universal gates?            1      L2        CO2   2
7       Which of the gate act as complement gate?          1      L2        CO2   2
8       SOP stand for?                                     1      L2        CO2   2
9       POS stand for?                                     1      L2        CO2   2
10      how to represent don’t care terms and purpose of   1      L2        CO2   2
        don’t care
11      state the combinational                            1      L1        CO3   3
12      State the sequential circuits.                     1      L2        CO3   3
13      how may half adders required for construction of   1      L1        CO3   3
        full adder
14      A 8:1 MUX required how many no of select lines     1      L1        CO3   3
15      16:1 MUX required for how many no of 4:1 MUX?      1      L1        CO3   3
16      Define Sequential logic circuit?                   1      L3        CO4   4
`17     What is synchronous counter ?                      1      L2        CO4   4
18      What is SIPO & PISO ?                              1      L2        CO4   4
19      What is S-R flip flop ?                            1      L2        CO4   4
20      What is Triggering ?                               1      L2        CO4   4
21      Describe Types of RAM?                             1      L4        CO5   5
22      What are the types of ROM?                         1      L2        CO5   5
23      Explain Hazards?                                   1      L2        CO5   5
24      what are types the of PLDs ?                       1      L2        CO5   5
25      Explain PLA?                                       1      L2        CO5   5
                                              Part B
Q.     Question                                                      Mar   Blooms CO   UNI
NO                                                                   ks    Level  NO   T
                                                                                       NO
1.a    Statement of all logic gates along with their Truth tables.   5     L1    CO1   1
1.b    Explain all the following Number Systems, Decimal,            5     L2    CO1   1
       Binary, Octal and Hexa-Decimal.
2.a    11010-10000 Perform subtraction using 1’s and 2’s             5     L3    CO1   1
       Complement method
2.b    Prove Commutative, Associative and Distributive Laws          5     L3    CO1   1
       of Boolean Algebra
3.a    Convert the Decimal number to HexaDecimal                     5     L2    CO1   1
       (376)10 = ( ? )16
3.b    Prove that      + ’ = ( + )( ’ + ) (Transposition             5     L4    CO1   1
       Theorem)
4.a    Convert (8E47.AB) 16 to Decimal, Binary and Octal             5     L3    CO1   1
       numbers.
4.b    Convert (163.875)10 to Binary, Octal and Hexadecimal          5     L3    CO1   1
5.a    State and Prove DeMorgans Theorm.                             5     L3    CO1   1
5.b    reduce the equation ABC+A|B|C|+A|B|C+A|BC+AB|C|               5     L2    CO1   1
6.a    Simplify & minimize the equation using k-map function         5     L3    CO2   2
       of
       f(A,B,C,D) = {(0,1,2.3,5,7,9,11,13,15)
6.b    Construct logic diagram using function                        5     L3    CO2   2
       F(A,B,C,D)=A’B’C+ABC+A’B’C’+ABC’
7.a    Enlist the various rules of K-Maps                            5     L1    CO2   2
7.b    Minimize the following expressions using K-map and            5     L3    CO2   2
       realize using NAND Gates.
       F= Π M (0,1,2,4,5,6,9,11,12,13,14,15)
8.a    Reduce the Boolean expression using K-map and                 5     L3    CO2   2
       implement using NOR gates
       F= Σ m (9,10,12)+d(3,5,6,7,11,13,14,15)
8.b    Minimize the following functions using k map                  5     L3    CO2   2
       F(A,B,C,D) = Π M(0,1,3,56,7,9,10,11,12,13,15)
9.a    Minimize the following expressions using K-map and            5     L3    CO2   2
       realize using NAND and NOR Gates. f = Σ m (1, 3, 5, 8,
       9, 11, 15) +d (2, 13).
9.b    Reduce the Boolean expression using K-map and                 5     L3    CO2   2
       implement using both the universal gates f= Σ m
       (0,1,3,4,5,6,7,13,15)
10.a   Minimize f = Σ m(0,2,3,4,5,6,9,12,14,15) using k map          5     L3    CO2   2
       and
       implement with AOI logic.
10.b Minimize f = Σ m(0,2,3,4,5,6,9,12,14,15) using Tabular    5   L3   CO2   2
     form or McClusky methode
11.a   Design 8:1 Multiplexer by using two 4:1 Multiplexer.    5   L4   CO3   3
11.b   Define Full Subtract or with Truth Table.               5   L4   CO3   3
12.a   Explain Design procedure of combinational circuits.     5   L3   CO3   3
12.b   Explain Full Adder with k-map and logic diagram.        5   L3   CO3   3
13.a   Explain Full Subtractor with k-map and logic diagram.   5   L3   CO3   3
13.b   Design BCD Adder.                                       5   L4   CO3   3
14.a   Design a 2-bit Magnitude Comparator.                    5   L4   CO3   3
14.b   design 8to3 encoder                                     5   L4   CO3   3
15.a   design 4to16 decoder                                    5   L4   CO3   3
15.b   Explain Priority encoder                                5   L3   CO3   3
16.a   Describe S-R Latches with neat circuit diagram and      5   L4   CO4   4
       explain conditions?
16.b   Explain J-K flip flop and its truth table?              5   L2   CO4   4
17.a   Explain S-R flip flop with truth table?                 5   L2   CO4   4
17.b   Explain T-Flip flop with Truth table?                   5   L2   CO4   4
18.a   Convert S-R Flip flop to J-K Flip flop?                 5   L3   CO4   4
18.b   convert J-K flip -flop to T flip flop?                  5   L3   CO4   4
19.a   Explain D-flip flop with truth table?                   5   L2   CO4   4
19.b   Explain Synchronous counters?                           5   L2   CO4   4
20.a   Generate PISO and SISO systems ?                        5   L2   CO4   4
20.b   Design Modulus-12 Counters?                             5   L4   CO4   4
21.a   Write the difference between ROM and RAM. Also list     5   L2   CO5   5
       the types of ROMs.
21.b   Distinguish between volatile and non-volatile memory    5   L3   CO5   5
22.a   Mention the advantages of DRAM cell over SRAM cell      5   L1   CO5   5
22.b   What is programmable logic array? Analyze how it        5   L2   CO5   5
       differs from ROM?
23.a   Distinguish between PAL and PLA?                        5   L3   CO5   5
23.b   Explain Error Detection and Correction Method and       5   L2   CO5   5
       transfer the data is “1100101”
24.a   Demonstrate Race-Free state Assignment Hazards?         5   L5   CO5   5
24.b   Explain Reduction of state and Flow Tables with any     5   L2   CO5   5
       example
25.a   Explain Sequential Programmable Devices.                5   L2   CO5   5
25.b   Explain programmable logic Array with examples?         5   L2   CO5   5