Digital Electronics
1. Explain how BCD addition is done. What will happen if the sum is greater than 9?
2. Represent the decimal numbers 875 and 653 in BCD and then show the steps to form
their sum in BCD. Addition method and then do the subtraction using BCD subtraction
method.
3. Simplify the following Boolean expression:
i) A’B+AB+A’B’
ii) (AB’+AC’)(BC+(BC)’)ABC
iii) (A+B)(A’C’+C)(B’+AC)’
iv) (A+B+C)(A+B’+C’)(A+B+C’)(A+B’+C)
v) AB’C+(B’+C’)(B’+D’)+(A+C+D)’
vi) ((A.B.C’)’+(C’D’)’)’
4. Express F= ABCD+A’BC+B’C’ in sum of minterms form.
5. Prove that, F=∑m (1,2,3,4)=πM(0,5,6,7)
6. Find out the POS of the given function: F= ∑m (1,2,3,4).
7. Simplify the Boolean function using K-map method.
i) ∑m (3,4,5,7,9,13,14,15)
ii) ∑m(1,4,5,6,7,11,12,13,15)
iii) ∑m(0,2,3,6,7) +∑d(8,10,11,15)
iv) ABCD+AB’CD+AB’C+AB
v) ABC+A’BC+B’C’
8. Define the NAND and NOR gate through their truth table.
9. Realize the logic expression by AND and OR Gates.
i) AB+CD= {(AB)’ . (CD)’}
ii) (A+B).(C+D)={(A+B)’ +(C+D)’}’
10. What is universal gate?
11. Show the dual of the Exclusive-OR is equal to its complement.
12. Realizes the following expression by universal gates:
i) (AB)’ +A+(B+C)’
ii) B(A+CD)+AC
iii) A’B’C+AB’C’+ABC
13. Minimize the following expression using K-map and realize using NAND gates only.
F(A,B,C,D)=∑m(1,2,3,5,6,11,12)+∑d(7,8,10,14)
14. What is half-adder? Write its truth table.
15. Design a half-adder using universal gates.
16. Design a full-adder circuit using minimum no of NAND gates.
17. Design a full- subtractor using two half-subtractor.
18. Design a 4-bit parallel binary adder.
19. Design a BCD adder using 4 bit binary full-adder and few NAND gate.
20. What is multiplexer? Explain.
21. What is demultiplexer?
22. Implement the following function using multiplexer?
i) F(A,B,C)=∑(1,3,5,6)
ii) F(A,B,C,D)=∑(0,1,3,4,8,9,15)
iii) Y=A’B’C’D’+BCD+AB’C’+ABC’D
iv) F=∑m(0,2,3,6,8,9,12,14)
23. Explain the working of 1-to-8 demultiplexer.
24. What is parity encoder?
25. Explain Decimal to BCD encoder using truth table.
26. Design an 2 bit comparator using logic gates.
27. What is decoder? Explain it with block diagram.
28. Differentiate between combinational and sequential lofic.
29. Write down the characteristics equation of S-R flip-flop.
30. What is clocked S-R flip-flop. Explain with logic diagram.
31. Sketch the logic diagram of NAND based S-R flip-flop and explain its working with truth
table,
32. What is D flip-flop? Write down the characteristic equation of D flip-flop.
33. Discuss how D flip-flop works as latch?
34. What is J-K flip-flop? Write down the characteristics equation of J-K flip-flop.
35. Show that a J-K flip-flop can be converted to a D flip-flop with an inverter.
36. Draw the logic diagram of master- slave D flip-flop using NAND gate.
37. Perform the following conversion:
i) T flip-flop from SR flip-flop.
ii) J-K flip-flop from D flip-flop.
iii) S-R flip-flop from JK flip-flop.
38. What is the difference between latch and flip-flop?
39. Explain race around condition of J=K flip-flop.
40. Describe serial-in-serial-out shift register using logic diagram.
41. Describe serial-in-parallel-out shift register using logic diagram.
42. Describe 4- bit ring counter using block diagram.
43. What is the definition of feedback in shift register?
44. What is ripple counter?
45. Design a 3-bit up-down ripple asynchronous counter using J-K flip-flop.
46. Design a Mod-7 ripple counter.
47. Draw the logic diagram of asynchronous 4- bit up-down counter.
48. Difference between synchronous and asynchronous counter.
49. Subtract (-33) from (-57) using 2-complement method.
50. Design a carry look ahead adder.
51. What is race condition?
52. Define de morgan’s law.
53. Implement EX-NOR and NAND using NOR gate.
54. Use 4-to-1 MUX and other necessary logic gate to design a full subtractor.
55. Design a 2 * 4 decoder. Giver truth table and draw circuit diagram using basic gates.
56. Represent a decimal number 45 in
i) Hexadecimal code
ii) Gray code
iii) BCD code
57. What do you mean by johnson counter?
58. Implement XOR operation using 2 input NOR gates. Verify the output for different
combinations of inputs.
59. Define flip-flop and its propagation delay.
60. Draw the functional truth table of a 4:1 multiplexer and realize it using basic gates (AND,
OR, and NOT).
