QP 1
QP 1
Ans: 1 eV = 1.6x10-19 J
A:
D/μ=kT/e
9. Write down the name of one atom that can act as donors in
GaAs.
A: Goup VI element
12.
λ= hc/Eg=6.6x10-34.3x108/(1.97x1.6x10-19) m =
ANS.
630 nm.
Beta = alpha/(1-alpha)=0.98/(1-
ANS.
0.98)=0.98/0.02=49
ANS. Varactor
ANS. AV = AP/AI
28. Why is the gate current of a MOS FET much smaller (nearlly zero, in practice)?
ANS. There is insulating dielectric (SiO2) layer in between gate terminal and channel.
ANS.
μ =rdgm
39. For direct recombination to be fast enough, the mean life time
of electron hole pair (EHP) is usually of the order of ________ (fill
in the value).
40. A monochrome light with power 10 mW illuminates GaAs (Eg = 1.43 eV). Energy absorbed is 9 mW. What
is the amount of energy converted to heat per second?
46. Absorption of optical energy in semiconductors due to impurity absorption is usually much smaller than the
intrinsic absorption process. What is the reason of this?
ANS. Impurity concentration is much smaller than the concentration of intrinsic semiconductor atoms.
48. In the p+-i-n+ diode, out of the three regions p+, i (intrinsic), and n+ which one is
highly resistive?
49. The phototransistor can provide amplification whereas photodiode can not. What is the reason behind this?
54. (a) Explain the differences in the band structure of a metal, an insulator, and a semiconductor. (3)
(b) Write down the Fermi Dirac distribution function and explain its importance. (2)
ANS.Sketch energy band structures for metal, insulator, semiconductor, label all bands, identify solids in terms
of energy band gap.
Define all symbols in the FD distribution, plot this, state importance of Fermi level EF.
55. (a) Define the terms (i) doping, (ii) n-type semiconductors, (iii) p-type semiconductors. (3)
ANS. Explain doping concept, types of dopants, semiconductor types based on dopant atoms.
ANS.
57. (a) Derive the expression for the electrical conductivity in a semiconductor. (3)
(b) At 300 K, the intrinsic concentration of Ge is 2.5x1019m-3, electron mobility is 0.38 m2V-1s-1, hole
mobility is 0.18 m2V-1s-1. Calculate the intrinsic conductivity of Ge at 300K. (2)
ANS.
Derive σ= e(n. μn + p.μp) defining current density, mobility. Mention unit of sigma.Use above
expression and put the given values to find sigma = 2.24 S/m.
ANS.
ANS.
61.
(a) What do you mean by the static
characteristics of a transistor? Draw a circuit
diagram of an n-p-n transistor operating in the
common-emitter configuration and sketch its
output characteristics. (3)
(b) Label the active, cutoff, and saturation region.
(2)
ANS.
ANS.
ANS.
64.
(a) Draw the circuit diagram of a half wave rectifier and explain its
principle of operation. (2)
(b) A diode with forward resistance 20
Ω
is used to half-wave rectify a sinusoid of amplitude 40 V, the load
resistance being 1 k
Ω
. Calculate the dc load current and the dc voltage across the diode.
(3)
ANS.
ANS.
ANS.
ANS.
See Theory.
ANS.
ANS.
70. (a) Write down the expression representing the small - signal ac model of a FET. Also sketch the
circuit model. (2)
ANS.
ANS.
72. What is a semiconductor laser? Outline the principles of laser action. Explain the terms spontaneous and
radiation induced (stimulated) transitions.
ANS. Explain p-n junction laser in terms of energy band diagram, general lasing action, population inversion,
pumping, etc
73. Explain the principle of operation of a Light Emitting Diode (LED). Why is silicon not the preferred
material for LED?
ANS. Explain excess carrier recombination and electromagnetic energy radiation, relate emitted photon
frequency with energy band gap, probability of recombination in direct band gap and indirect band gap
materials, preferred materials used,
74. Write down the steps involved in the twin tub process of CMOS fabrication. Also sketch the
layout.
ANS. Steps are (i) Choose epitaxial layer as base of the device (ii) N-well and P-well formation (iii)
Gate and Field oxide (iv) Source and Drain implantation (v) contact cuts in both wells (v) metallization.
75. Q.a
As a function of distance across the junction, sketch the curves of (i) charge density, (ii) electric field,
and (iii) potential for the open-circuited p-n junction.
Q.b Illustrate the V-I characteristic curve and explain the operation of a Zener diode.
76. Q.a Draw the energy band diagram of metal and semiconductor before and after conduction is
made.
Ans:
Mention CB, VB, Fermi Level, vacuum level, band bending in semiconductor side, etc
(5 Marks)
77. Q.a Sketch the circuit of a half-wave rectifier and explain its operation.
Ans: Sketch proper circuit diagram, mention polarity and direction of voltage, current. Explain
operation with neat sketch of output voltage compared to input one. (7 Marks)
Q.b Derive VDC, Vrms, rectifier efficiency and PIV for it.
Ans: Derive the expressions for the quantites sought. (8 Marks)
78. Q.a Distinguish between the different types of transistor configurations with necessary circuit
diagrams.
Q.b Sketch the family of common emitter input and output characteristics for a transistor. Explain the
shapes of the curves qualitatively.
Ans: Theory (9 Marks)
Ans: Zener (Avalanche) - ionization due to filed (collision), less (more) breakdown voltage, thin
(relatively thick) depletion region, destruction of junction temporary (permanent), junction electric field
strong (relatively weak), doping level heavily doped (lightly doped), temperature coefficient negative
(positive) (5 Marks)
Q.b In the adjoining diagram, the Zener diode has the breakdown voltage of Vz = 3V. The maximum
power dissipation limit is 20 mW. Find current Iz through the diode and power dissipation Pz in the
diode.
Ans:
Apply KVL in meshes.
IR1+(I-Iz)R2=12; IzR3+Vz-(I-Iz)R2=0; Solving, Iz = 3 mA. Power Pz=IzVz=9 mW < 20 mW (10 Marks)
80. Q.a Explain the term transistor biasing. What do you mean by quiescent point of a transistor
amplifier and what are the factors determining the choice of the Q-point?
Q.b For the circuit shown, transistor β= 100 for the silicon transistor. Find the Q-point (VCE and IC).
Ans:
Find Thevenin voltage VT and Thevenin resistance RT.
Input loop gives IB: VT - IBRT - VBE - (1+beta)RE = 0. This gives IB = 4.886 micro A. IC = beta.IB = 4.886
mA, IE = 4.935 mA. KVL to collector circuit: VCE = VCC - IC RC - IERE = 2.646 V. (10 Marks)
81. Q.a What is Fermi level? Prove that the Fermi level lies exactly in the middle between the bottom
of the conduction band and the top of the valance band of intrinsic semiconductor.
Ans: Fermi level - The highest energy level that an electron can occupy at absolute zero
temperature. (3+4 Marks)
Q.b Derive the Einstein’s relation in semiconductors? Find the diffusion co-efficient of electron in Si at
300 K if μn = 0.19 m2V-1S-1.
Ans: Assume non-uniformly doped semiconductor, no electrical connection, so Jn = Jp = 0. Assume n
∼Nd(x). Electric field F = - (kT/e).[1/Nd(x)].∂Nd(x)/∂x. Put F in the expression of J n = eμn.Nd(x).F +
eDn.∂Nd(x)/∂x. Hence Dn/μn = kT/e.(4+4 Marks)
82. Q.a What is the source of electrons and holes in an intrinsic semiconductor? In general, how
many components of conduction current are there in any semiconductor and what are they?
Ans:
Thermally generated electrons and holes.
Currents carried by majority and minority charge carriers, both field induced (drift) and diffusion
current components. (6 Marks)
Q.b
Derive the equation for the thermal equilibrium concentrations of electrons and holes in terms of
Fermi energy.
Ans: Equilibrium electron concentration n0 = integrate f(E)N(E) wrt E from Ec to infinity.
Equilibrium hole conc p0 = integrate f(E)N(E) wrt E from -∞to Ev. Here N(E) = density of states at E,
f(E) = Fermi function. Assume effective density of states, intrinsic conc = ni, finally get n0 = niexp(-[Ei -
EF]/kT). Similarly, p0 can be obtained.(5 Marks)
Q.c The Fermi energy of a material is 0.5 eV. Find the probability of occupancy of the energy levels
0.4 eV and 0.6 eV. Assume kT = 25 meV.
Ans:
For E=0.6 eV, (E-EF)/kT = 0.1 eV/25 meV = 4; f(E=0.6) = 1/[1+e 4]=1/(55.59)=0.0179; f(E=0.4)=1/[1+e-
4]=1/1.0183]=0.982. Thus below Fermi level, almost all states are occupied, above Fermi level,
Ans: Net time rate of change of electron (hole) equals the influx (or injection), generation rate, and
recombination rate. Discuss with analytical details.(10 Marks)
Q.b A semiconductor is doped with both donor and acceptor dopants. Discuss the charge neutrality
for the condition of complete ionization.
Ans: Total positive charge equals total negative charge. Consider electrons, holes, ionized donors,
ionized acceptors. (5 Marks)
85. Q.a Define the mobility of of charge carriers in a semiconductor. Show that the mobility of the
electrons in a semiconductor is given as μ= eτ/m* where the symbols have usual meanings.
Ans: Define mobility as drift velocity per unit electric field. Under external force F = eE = rate of
change of momentum = m*v/τ. Then find mobility. Define relaxation time also.(6 Marks)
Q.b What do you mean by the lifetime of minority carriers in an impurity semiconductor? Why does
lifetime decrease when trap centres are introduced in the forbidden energy gap?
Ans: Theory (5 Marks)
Q.c Mention some advantages of semiconductor devices.
Ans: No filament power hence low power supply required, mechanically rugged, light weight,
miniature, large life cycle, minimum warm up time, etc. (4 Marks)
86. Q.a Define the three FET parameters gm , rd and μ. Draw the small-signal equivalent circuit.
Q.b An N-channel MOSFET amplifier operates in saturation mode. A gate bias of 4V is applied and
the source is shorted to ground. A load resistance of RD = 5 kΩ is connected between drain terminal
and the drain supply of VDD = +15V. Find the dc drain current ID and dc drain to source voltage VDS.
Given ID = K (VGS - VT)2 with K = 0.25 mA/V2 and VT = 2V. Verify also that the transistor is indeed in
saturation region.
Ans: ID = 0.25(4-2)2=1 mA; VDS = VDD - IDRD = 15 - 1x5=10V. Verify VDS > VGS - VT (6 Marks)
87. Q.a Draw the basic structure of N-channel enhancement MOSFET and explain the principle of
operation.
Ans: Theory. Check whether p-sub, n+ source, n+ drain, SiO2 insulator, metal contacts to
Gate/Source/Drain/Body are made.(7 Marks)
Q.b Explain how MOS structure can be used as a capacitor. Give the rough plot of capacitor-voltage
characterisitcs of the MOS capacitor.
Ans:
Theory. Include the terms flat-band condition, surface accumulation charge, surface depletion.
In the plot, accumulation, depletion and inversion regions must be shown. (8 Marks)
88. Q.a How depletion MOSFET differs from enhancement MOSFET in construction process? Explain
with suitable diagrams. Explain why depletion mode MOSFET is commonly known as "normally ON"
MOSFET.
Ans: Theory. Diffused channel is additionally built in D- MOSFET structure. Normally ON because
channel is always presents. (7 Marks)
Q.b Discuss the concept of threshold voltage in a MOSFET. What is its importance in device
operation? How can a FET be used as a voltage variable resistor? Explain with a suitable current-
voltage plot.
Ans: It is the Gate to source voltage than ensures channel development. (8 Marks)
89. Q.a Write down the advantages of MOSFET over BJT.
Ans: MOS (BJT) - one(two) type of carrier, transport by drift in channel (diffusion through base), high
frequency operation of FET compared to BJT, FETs more stable than BJT, high impedance than BJT,
FETs less noisy, etc. (6 Marks)
Q.b Draw a voltage-divider biasing circuit of MOSFET and explain the DC load line and AC load line
with suitable equations. Find the drain current and drain-to-source voltage at the Q-point .
Ans: Steps are - draw the biasing circuit, find Thevenin equivalent circuit at the input mesh, find V DS.
Define load line with the coordinates at the extreme end points, Find ac load line by shorting the
source-leg capacitor. (9 Marks)
90. Q.a Draw the circuit for obtaining drain and transfer characteristics of an N-channel MOSFET and
discuss the steps to obtain the same.
Q.b What is channel length modulation? Discuss the effect of channel length modulation parameter
Λ on the drain current with suitable expression for drain current. If the channel length modulation
parameter λ= 0, what will be ac drain resistance rd and why?
Ans: Explain how channel length L shortens when VDS increases, lambda is measured by
ΔL/L. Current is modeled as ID = K(VGS - VT)2[1 + λVDS]. If no length modulation, derivative of ID with
VDS is zero and its reciprocal defining ac drain resistance becomes infinity.(9 Marks)
91. Q.a What is pumping in the context of a laser and why is a semiconductor very suitable for
efficient pumping?
Ans: Explain population inversion by photon excitation, electron excitation and inelastic collision
methods. (4 Marks)
92. Q.a Discuss in details, the construction and working principle of PIN photodiode. What factors limit
the response time of photodiodes?
Ans: Construction - intrinsic layer is sandwiched between heavily doped p + and n+ regions. This
ensures wide depletion region, EHP generation in this region, carriers swept out due to high electric
field. Explain forward biased, reverse biased status under illumination.
Response time is limited by drift, diffusion, and junction capacitance.
(9 Marks)
Q.b Define quantum efficiency of a photodiode. How are PIN and Avalanche Photo Diode (APD)
different from each other?
Ans: Quantum efficiency - number of carriers collected for every photon = (Jop/e)/(Pop/hν). It is
normally nearly unity. If low level optical signal is to be detected, significant carrier multiplication is
needed. That is, this figure can be 2 or 3. This multiplication is achieved in APD.
(6 Marks)
93. Q.a Explain the construction and working of phototransistors. Mention the advantages and
disadvantages of phototransistors.
Ans: Sketch npn transistor with Base open and Collector is at positive potential wrt Emitter to ensure
reverse bias at collector junction.
Under dark condition, Ic = (β+1)Ico as base is open When base is illuminated by lense-focussed beam,
photo generated carriers contribute to reverse current. Thus, Ic = (β+1)[Ico + Iph].
Due to transistor action, photocurrent is multiplied by (beta +1).
Draw the Ic - Vcc plot with illumination intensity as parameter.
Adv - higher current than photodiode, less expensive, simple and miniature, fast response
Disadv - can not handle high voltages , vulnerable to surges/ spikes of electricity/em energy.
(9 Marks)
Q.b What is LED? Explain its construction and working. Why is a phototransistor an improved version
of a PIN diode? Write down the operation of an optocoupler.
Ans: Due to transistor action photocurrent gets multiplied. (6 Marks)
94. Q.a What are the methods of introducing dopant impurities in a wafer? What is ion implantation?
Mention its advantages and problems involved in ion implantation?
Ans:
Diffusion and ion implantation are the two methods of doping. Explain each process in brief.
(7 Marks)
Q.b
Mention the features in metallization scheme. Why is aluminium the preferred metal for contacts?
Ans:
The Metallization Process takes place in a vacuum evaporation chamber ( pressure is 10-6 to 10-
7 Torr. The material is placed in a basket. Using electron gun, electron beam is focused at the surface
of the material, material starts heating up and vaporizing. The vapours hit substrate and condence to
form a thing film coating. By etching process, aluminium is removed form unwanted places.
Metallization applications can be divided into three categories: gate, contact, and interconnection.
Polysilicon and silicide are frequently used in gates and interconnects in MOS devices.
Aluminum and copper are used ss contact and second-level interconnection to the outside.
In most IC’s, aluminium is the widely used metal for metallization because (i) it is a good conductor
(ii) can form mechanical bonds with silicon (iii) form low resistance, ohmic contacts with
heavily doped n-type and p-type silicon.
(4 Marks)
Q.c
Explain twin-tub process in CMOS fabrication.
Ans:
Steps are -
(i) choice of epi-layer as base of the device
(ii) N-well and P-well formation
(iii) Gate and Field oxide
(iv) Source and Drain implantation
(v) Contact cuts in both wells
(vi) Metallization
(4 Marks)