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21EC71 - Module 1 4 2

The document discusses two types of adders: the carry-select adder and the conditional-sum adder (CSA). The carry-select adder uses duplicated small adders for different carry-in conditions and selects the appropriate output using a MUX, making it fast but somewhat wasteful. The CSA generates two sums based on different carry-in conditions and utilizes a tree of MUXes to select the correct sum, allowing for efficient handling of larger bit-widths by splitting the adder into smaller components.

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9 views3 pages

21EC71 - Module 1 4 2

The document discusses two types of adders: the carry-select adder and the conditional-sum adder (CSA). The carry-select adder uses duplicated small adders for different carry-in conditions and selects the appropriate output using a MUX, making it fast but somewhat wasteful. The CSA generates two sums based on different carry-in conditions and utilizes a tree of MUXes to select the correct sum, allowing for efficient handling of larger bit-widths by splitting the adder into smaller components.

Uploaded by

fastasystory
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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carry-select adder

• we duplicate two small adders (usually 4-bit or 8-bit adders-


often CLAs) for the cases CIN = '0' and ClN = ‘1' and then
use a MUX to select the case that we need - wasteful but
fast.
• A carry-select adder is often used as the fast adder in a
Datapath Library because its layout is regular.

9/4/20XX Presentation Title 46


Conditional-sum Adder (CSA)

• An n-bit adder that generates two sums


• One sum assumes a carry-in condition of '0'.
• The other sum assumes a carry-in condition of’ 1’.
• Can split this n-bit adder into an i-bit adder for the i LSBs and an (n-i) -bit
adder for the (n-i) MSBs.
• Both adders generate two conditional sums as well as true and complement
carry signals.
• The two (true and complement ) carry signals from the LSB adder are used to
select between the two conditional sums from the MSB adder using two-
input MUXes.
• Example: we can split a 16-bit adder using i = 8 and n = 8: then we can split one or
both 8-bit adders again and so on

9/4/20XX Presentation Title 47


Conditional-sum Adder (CSA)

• The simplest form


of an n-bit CSA that
uses n single-bit
conditional adders,
H (each with four
outputs; two
conditional sums,
true carry and
complementary
carry), together
with a tree of 2:1
MUXes (Qi_j).

9/4/20XX Presentation Title 48

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