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TL494 2

The TL494 is a pulse width modulation control circuit designed for SWITCHMODE power supply control, featuring an on-chip oscillator, error amplifiers, and adjustable deadtime control. It supports both push-pull and single-ended output configurations, with various electrical characteristics and maximum ratings specified for operation. The device includes a 5.0 V reference and is suitable for applications requiring precise control of switching power supplies.

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0% found this document useful (0 votes)
20 views10 pages

TL494 2

The TL494 is a pulse width modulation control circuit designed for SWITCHMODE power supply control, featuring an on-chip oscillator, error amplifiers, and adjustable deadtime control. It supports both push-pull and single-ended output configurations, with various electrical characteristics and maximum ratings specified for operation. The device includes a 5.0 V reference and is suitable for applications requiring precise control of switching power supplies.

Uploaded by

Jorge Susselmann
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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TL494

SWITCHMODE ™Pulse Width


Modulation Control Circuit
The TL494 is a fixed frequency, pulse width modulation control
circuit designed primarily for SWITCHMODE power supply control.
• Complete Pulse Width Modulation Control Circuitry ON Semiconductor
• On-Chip Oscillator with Master or Slave Operation
• On-Chip Error Amplifiers http://onsemi.com

• On-Chip 5.0 V Reference MARKING


• Adjustable Deadtime Control DIAGRAMS
• Uncommitted Output Transistors Rated to 500 mA Source or Sink
16
• Output Control for Push-Pull or Single-Ended Operation SO-16
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D SUFFIX L TL494xD
• Undervoltage Lockout fo AWLYWW
CASE 751B
u uu u uu uu
MAXIMUM RATINGS (Full operating ambient temperature range applies, 1
unless otherwise noted.)

Rating Symbol TL494C TL494I Unit


16
Power Supply Voltage v cc 42 V
PDIP-16
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N SUFFIX } TL494xN
> °> °

Collector Output Voltage 42 V


CASE 648 0 AWLYYWW
CM

u u u u u iir n u
Collector Output Current 500 mA 1
le i, !c 2
(Each transistor) (Note 1) 1

Amplifier Input Voltage Range VIR -0 .3 to +42 V x = C or I


A = Assembly Location
Power Dissipation @ Ta < 45°C Pd 1000 mW
WL, L = Wafer Lot
Thermal Resistance, r bja 80 °C/W YY, Y = Year
Junction-to-Ambient WW, W = Work Week
Operating Junction Temperature Tj 125 °C
Storage Temperature Range Tstg -5 5 to +125 °C
Operating Ambient Temperature Ta °C ORDERING INFORMATION
Range
TL494C 0 to +70 Device Package Shipping
TL494I -4 0 to +85
TL494CD SO-16 48 Units/Rail
Derating Ambient Temperature Ta 45 °C
TL494CDR2 SO-16 2500 Tape & Reel
1. Maximum thermal limits must be observed.
TL494CN PDIP-16 500 Units/Rail
PIN CONNECTIONS
TL494IN PDIP-16 500 Units/Rail

Noninv Noninv
Input Input

|nv n r_ Inv
Input l L Input

sen/PWN n r _
imp Input 1-2- Vref
Deadtime Output
Contro
i
Vcc

C2

E2

E1

(Top View)

© Semiconductor Components Industries, LLC, 2000 1718 Publication Order Number:


July, 2000 - Rev. 2 TL494/D
TL494

RECOMMENDED OPERATING CONDITIONS


C haracteristics Symbol Min Typ Max Unit

Power Supply Voltage v cc 7.0 15 40 V

Collector Output Voltage V C1, V C2 - 30 40 V

Collector Output Current (Each transistor) ■ ci. Ic2 - - 200 mA

>

(N
o
Amplified Input Voltage -0.3 - V

o
o
I
V jn

Current Into Feedback Terminal ■fb - - 0.3 mA

Reference Output Current Iref - - 10 mA

Timing Resistor R t 1.8 30 500 kL2

Timing Capacitor C t 0.0047 0.001 10 pF

Oscillator Frequency fosc 1.0 40 200 kHz

ELECTRICAL CHARACTERISTICS (Vc c = 15 V, CT = 0.01 pF, R j = 12 kO, unless otherwise noted.)


For typical values Ta = 25°C, for min/max values Ta is the operating ambient temperature range that applies, unless otherwise noted.

C haracteristics Sym bol Min Typ Max Unit

REFERENCE SECTION
Reference Voltage (lo = 1.0 mA) ^ re f 4.75 5.0 5.25 V

Line Regulation (Vc c = 7.0 V to 40 V) R egiine - 2.0 25 mV

Load Regulation (lo = 1.0 mA to 10 mA) R egioad - 3.0 15 mV

Short Circuit Output Current (Vref = 0 V) is c 15 35 75 mA

OUTPUT SECTION
Collector Off-State Current ■c(off) - 2.0 100 pA
(Vc c = 40 V, VCE = 40 V)

Emitter Off-State Current ■E(off) - - -1 0 0 pA


Vc c = 40 V, Vc = 40 V, VE = 0 V)

Collector-Emitter Saturation Voltage (Note 2) V


Common-Emitter (VE = 0 V, Iq = 200 mA) v sat(C) - 1.1 1.3
Emitter-Follower (Vc = 15 V, lE = -20 0 mA) v sat(E) - 1.5 2.5

Output Control Pin Current


Low State (Vo c < 0.4 V) ta d - 10 - pA
High State (Vo c = Vref) bcH - 0.2 3.5 mA

Output Voltage Rise Time tr ns


Common-Emitter (See Figure 12) - 100 200
Emitter-Follower (See Figure 13) - 100 200
Output Voltage Fall Time tf ns
Common-Emitter (See Figure 12) - 25 100
Emitter-Follower (See Figure 13) - 40 100

2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.

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TL494

ELECTRICAL CHARACTERISTICS (Vcc = 15 V, C j = 0.01 j.iF, R j = 12 kO, unless otherwise noted.)


For typical values Ta = 25°C, for min/max values Ta is the operating ambient temperature range that applies, unless otherwise noted.

Characteristics Symbol Min Typ Max Unit

ERROR AMPLIFIER SECTION


Input Offset Voltage (Vo (pin 3) = 2.5 V) V|0 - 2.0 10 mV

Input Offset Current (Vo (pin 3) = 2.5 V) ho - 5.0 250 nA

Input Bias Current (Vo (pin 3) = 2.5 V) ■lB - -0.1 -1.0 pA

Input Common Mode Voltage Range (Vcc = 40 V, Ta = 25°C) V ICR -0 .3 to V cc-2.0 V

Open Loop Voltage Gain (AVo = 3.0 V, Vo = 0.5 V to 3.5 V, R|_ = 2.0 kO) A VOL 70 95 - dB

Unity-Gain Crossover Frequency (Vo = 0.5 V to 3.5 V, R|_ = 2.0 kO) fc - - 350 - kHz

Phase Margin at Unity-Gain (Vo = 0.5 V to 3.5 V, R|_ = 2.0 kO) - 65 - deg.

Common Mode Rejection Ratio (Vcc = 40 V) CMRR 65 90 - dB

Power Supply Rejection Ratio (AVcc = 33 V, Vo = 2.5 V, R|_ = 2.0 kO) PSRR - 100 - dB

Output Sink Current (Vo (pin 3) = 0.7 V) ■o- 0.3 0.7 - mA

Output Source Current (V q (pin 3) = 3.5 V) ■o+ 2.0 -4 .0 - mA

PWM COMPARATOR SECTION (Test Circuit Figure 11)


Input Threshold Voltage (Zero Duty Cycle) VTH - 2.5 4.5 V

Input Sink Current (V(p,n 3) = 0.7 V) 11- 0.3 0.7 - mA

DEADTIME CONTROL SECTION (Test Circuit Figure 11)


Input Bias Current (Pin 4) (Vp,n 4 = 0 V to 5.25 V) !|B (DT) - - 2.0 -1 0 pA

Maximum Duty Cycle, Each Output, Push-Pull Mode DCmax %


(VPin 4 = 0 V, CT = 0.01 pF, Rt = 12 k£2) 45 48 50
(VPin 4 = 0 V, CT = 0.001 pF, RT = 30 kO) - 45 50

Input Threshold Voltage (Pin 4) Vth V


(Zero Duty Cycle) - 2.8 3.3
(Maximum Duty Cycle) 0 -

OSCILLATOR SECTION
Frequency (C j = 0.001 pF, R j = 30 kO) fosc - 40 - kHz
^_w

Standard Deviation of Frequency* (C j = 0.001 pF, R j = 30 kO) - 3.0 - %


0
0
o
>
<
^0

<

Frequency Change with Voltage (Vcc = 7.0 V to 40 V, Ta = 25°C) - 0.1 - %


</)
0
I—
<
^0

<

Frequency Change with Temperature (ATa = T|0Wto Thigh) - 12 %


(f)
0

(C- =0.01 pF. R- = 12 k<>)

UNDERVOLTAGE LOCKOUT SECTION


Turn-On Threshold (Vcc increasing, lref = 1.0 mA) Vth 5.5 6.43 7.0 V

TOTAL DEVICE
Standby Supply Current (Pin 6 at Vref, All other inputs and outputs open) !c c mA
(VCC = 15 V) - 5.5 10
(VCC = 40 V) - 7.0 15

Average Supply Current mA


(CT = 0.01 pF, Rt = 12 kL2, V(Pin 4) = 2.0 V) 7.0
(VCc = 15 V) (See Figure 12) " "

/ S(Xn -X)2
* Standard deviation is a measure of the statistical distribution about the mean as derived from the formula, c / n=1
1/ n "-" i

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TL494

Output Control Vcc

1 Comparator Input 2 Output

This device contains 46 active transistors.

Figure 1. Representative Block Diagram

Figure 2. Timing Diagram

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TL494

APPLICATIONS INFORMATION
Description coimnon mode input range from -0.3 V to (Vcc - 2V), and
The TL494 is a fixed-frequency pulse width modulation may be used to sense power-supply output voltage and
control circuit, incorporating the primary building blocks current. The error-amplifier outputs are active high and are
required for the control of a switching power supply. (See ORed together at the noninverting input of the pulse-width
Figure 1.) An internal-linear sawtooth oscillator is modulator comparator. With this configuration, the
frequency- programmable by two external components, R| amplifier that demands minimum output on time, dominates
and Cj. The approximate oscillator frequency is determined control of the loop.
by: When capacitor Ct is discharged, a positive pulse is
generated on the output of the deadtime comparator, which
f - 11 clocks the pulse-steering flip-flop and inhibits the output
osc ^ 7^ 7 transistors, Q1 and Q2. With the output-control connected
For more information refer to Figure 3.
to the reference line, the pulse-steering flip-flop directs the
modulated pulses to each of the two output transistors
alternately for push-pull operation. The output frequency is
Output pulse width modulation is accomplished by
equal to half that of the oscillator. Output drive can also be
comparison of the positive sawtooth waveform across
taken from Q1 or Q2, when single-ended operation with a
capacitor Cj- to either of two control signals. The NOR gates,
maximum on-time of less than 50% is required. This is
which drive output transistors Q1 and Q2, are enabled only
desirable when the output transformer has a ringback
when the flip-flop clock-input line is in its low state. This
winding with a catch diode used for snubbing. When higher
happens only during that portion of time when the sawtooth
output-drive currents are required for single-ended
voltage is greater than the control signals. Therefore, an
operation, Q1 and Q2 may be connected in parallel, and the
increase in control-signal amplitude causes a corresponding
output-mode pin must be tied to ground to disable the
linear decrease of output pulse width. (Refer to the Timing
flip-flop. The output frequency will now be equal to that of
Diagram shown in Figure 2.)
the oscillator.
The control signals are external inputs that can be fed into
The TL494 has an internal 5.0 V reference capable of
the deadtime control, the error amplifier inputs, or the
sourcing up to 10 mA of load current for external bias
feedback input. The deadtime control comparator has an
circuits. The reference has an internal accuracy of +5.0%
effective 120 mV input offset which limits the minimum
with a typical thermal drift of less than 50 mV over an
output deadtime to approximately the first 4% of the
operating temperature range of 0° to 70°C.
sawtooth-cycle time. This would result in a maximum duty
cycle on a given output of 96% with the output control
grounded, and 48% with it connected to the reference line.
Additional deadtime may be imposed on the output by
setting the deadtime-control input to a fixed voltage,
ranging between 0 V to 3.3 V.

Functional Table
Input/Output fout
Output Function
Controls fosc
Grounded Single-ended PWM @ Q1 and Q2 1.0

@ Vref Push-pull Operation 0.5

The pulse width modulator comparator provides a means


for the error amplifiers to adjust the output pulse width from
the maximum percent on-time, established by the deadtime
Figure 3. Oscillator Frequency versus
control input, down to zero, as the voltage at the feedback Timing Resistance
pin varies from 0.5 V to 3.5 V Both error amplifiers have a

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TL494

A VOL> OPEN LOOP VOLTAGE GAIN (dB)

500 k 1.0 k 10 k 100 k 500 k


fosc, OSCILLATOR FREQUENCY (Hz)

Figure 4. Open Loop Voltage Gain and Figure 5. Percent Deadtime versus
Phase versus Frequency Oscillator Frequency
% DC, PERCENT DUTY CYCLE (EACH OUTPUT)

<5
<

<
cc

0 1.0 2.0 3.0 3.5


VDT, DEADTIME CONTROL VOLTAGE (IV) lEi EMITTER CURRENT (mA)

Figure 6. Percent Duty Cycle versus Figure 7. Emitter-Follower Configuration


Deadtime Control Voltage Output Saturation Voltage versus
Emitter Current
VcE(sat). SATURATION VOLTAGE (V)

0 100 200 300 400 0 5.0 10 15 20 25 30 35 40


lc , COLLECTOR CURRENT (mA) Vc c , SUPPLY VOLTAGE (V)

Figure 8. Common-Emitter Configuration Figure 9. Standby Supply Current


Output Saturation Voltage versus versus Supply Voltage
Collector Current

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TL494

Feedback
Terminal
(Pin 3)

Figure 10. Error-Amplifier Characteristics Figure 11. Deadtime and Feedback Control Circuit

15V

Figure 12. Common-Emitter Configuration Figure 13. Emitter-Follower Configuration


Test Circuit and Waveform Test Circuit and Waveform

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TL494

Vref
To Output

System

Figure 14. Error-Amplifier Sensing Techniques

Figure 15. Deadtime Control Circuit Figure 16. Soft-Start Circuit

Figure 17. Output Connections for Single-Ended and Push-Pull Configurations

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TL494

Vref

I----------------1
Master

Slave
(Additional l_________ I
Circuits)

Figure 18. Slaving Two or More Control Circuits Figure 19. Operation with Vjn > 40 V Using
External Zener

+Vin = 8.0V to 20V

Figure 20. Pulse Width Modulated Push-Pull Converter

Test Conditions Results

Line Regulation Vjn = 10 V to 40 V 14 mV 0.28% L1 - 3.5 mH @ 0.3 A


T1 - Primary: 20T C.T. #28 AWG
Load Regulation Vin = 28 V, l 0 = 1.0 mA to 1.0 A 3.0 mV 0.06% Secondary: 120T C.T. #36 AWG
Core: Ferroxcube 1408P-L00-3CB
Output Ripple Vin = 28 V, l 0 = 1.0 A 65 mV pp P.A.R.D.

Short Circuit Current Vin = 28 V, Rl = 0.1 Q. 1.6 A

Efficiency Vin = 28 V, l 0 = 1.0 A 71%

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TL494

1.0mH@2A

Figure 21. Pulse Width Modulated Step-Down Converter

Test Conditions Results

Line Regulation V j n = 8.0 V to 40 V 3.0 mV 0.01%

Load Regulation V j n = 12.6 V, l 0 = 0.2 mA to 200 mA 5.0 mV 0.02%

Output Ripple Vin = 12.6 V, l 0 = 200 mA 40 mV pp RA.R.D.

Short Circuit Current Vin = 12.6 V, R l = 0.1 Q. 250 mA

Efficiency Vin = 12.6 V, l 0 = 200 mA 72%

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