ESC201 : Introduction to

Electronics

Question Set 4: Solution

Credit: Prof. B. Mazhari

Q.1a What is the minimum number of bits required to represent -32 in 2’s complement
form?
b. 11011111 is a number in 2’s complement. Is it positive or negative? What is its
magnitude?

Binary representation for 32 is 100000. we need one more bit for sign to
represent +32 in 2’s complement.

(+32)10 = (0100000)2

-32 is obtained by taking 2’s complement of +32 (−32)10 = (1100000) 2

b. The number is negative because the sign bit is 1. Its magnitude can be obtained
by taking its 2’s complement

00100001 = (33)10
Q.8 Show that the Boolean expression x + x. y is equivalent to x + y using basic postulates
and theorems of Boolean algebra

postulates
P1: x + 0 = x
P2: x + y = y + x x + x. y = ( x + x).( x + y )
P3: x.(y+z) = x.y+x.z = 1.( x + y ) = x + y
P4: x + x = 1
Q.9 Reduce the following expressions to a minimum number of literals.

a. f = ( x + y + z ).( y + z ) b. f = ( x + y ).( y + x)

c. f = ABCD + ABD + ABCD b. ( x + y ).( y + x)

= x y + xx + y y + y x
a. ( x + y + z ).( y + z ) = xy + yx
= x y + xz + y y + y z + z y + z z
c. ABCD + ABD + ABCD
= x y + xz + ( y + y z ) + ( z y + z )
= ABD + ABD
= x y + xz + y + z
= BD
= y+z
Q.10 Obtain the truth table for the following function: (x.y+z)(y+x.z) and write it as sum of
products (SOP) and product of sums (POS).

x y z f
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0 SOP: f = x. y.z + x. y.z + x. y.z + x. y.z
1 0 1 1
1 1 0 1
1 1 1 1

PoS: f = ( x + y + z ).( x + y + z ).( x + y + z ).( x + y + z )

Q.5 Implement an 8 input OR gate using only 2 input AND and 2 input OR gates

f = x1 + x2 + x3 + x4 + x5 + x6 + x7 + x8
= ( x1 + x2 ) + ( x3 + x4 ) + ( x5 + x6 ) + ( x7 + x8 )
= A1 + A2 + A3 + A4

f = ( A1 + A2 ) + ( A3 + A4 )
= B1 + B2 A1
x1
x2 B1

x3 A2
x4 f
x5 A3
x6 B2

x7 A4
x8
Q.6 Show that you can implement 2 input AND, 2 input OR and NOT gates using only 2
input NAND gates. Similarly show that you can implement 2 input AND, 2 input OR and
NOT gates using only 2 input NOR gates

Implementation using NAND gates

Implementation using NOR gates

Q.7 Implement a 2-input exclusive OR gate with only 2 input NAND gates .
x
y
f = x. y + x. y f
x
y

Using results from previous question, we can replace each gate by its NAND equivalent
x
y
f
x
Noting that 2 NOT gates in series cancel
y

x
y
f
x
y
Q.8 Figure below shows a block diagram of a comparator. From the description given ,
obtain first the truth table for outputs y1 , y2 and y3, then the Boolean expression and
finally the gate netlist. Both inputs are 1-bit.

x1 y1
Comparator y2
x2
y3
y1 is 1 if and only if x1 > x2
y2 is 1 if and only if x1 = x2
y3 is 1 if and only if x1 < x2

x1 x2 y1 y2 y3
y2 = x1. x2 + x1.x2 y3 = x1. x2
0 0 0 1
0
0
1
y1 = x1. x2
0 1 0
1 0 1 0 0
x1
1 1 0 1 0 x1
y3
x2 x2

x1 y2
y1 x1
x2
x2
Q.9 Simplify the following 4-variable functions into sum-of-products form using K-map.

a.  (1,5, 6, 7,14) b.  (0, 4, 6,8)

c.  (0,1, 4, 6,8,9,14) d.  (1, 4, 7,11,13,14)
b)
a) x3x4
x3x4 x1x2 00 01 11 10
x1x2 00 01 11 10
00 1 0 0 0
00 0 1 0 0

01 1 0 0 1
01 0 1 1 1
11 0 0 0 0
11 0 0 0 1

10 0 0 0 0 10 1 0 0 0

F = x1 x3 x4 + x1 x2 x3 + x2 x3 x4 F = x2 x3 x4 + x1 x2 x4
c) d)
x3x4 x3x4
x1x2 00 01 11 10 x1x2 00 01 11 10

00 1 1 0 0 00 0 1 0 0

01 1 0 0 1 F = x2 x3 + x1 x3 x4 + x2 x3 x4 01 1 0 1 0

11 0 0 0 1 11 0 1 0 1

10 1 1 0 0 10 0 0 1 0

Cannot be minimized
Q.11 For the Boolean expression given below, implement it using two levels of logic first as
AND-OR and then as OR-AND.

F (a, b, c, d ) = (ab + cd )(ab + cd + ac )

a
b
c
d
a
b F
F = abcd + abc + abcd c

a
b
c
d

F = (a + b + c + d ).(a + b + c).(a + b + c + d ) Implement F and then invert it.

a
b
c
d
a
b F
c

a
b
c
d
An alternative is to obtain PoS from K-map

F = abcd + abc + abcd

cd
ab 00 01 11 10 b
c
00 0 0
b
01 0 0 0 c F

11 0 0 0 0 b
d
10 0 0 0 0
a

F = a.(b + c).(b + c).(b + d )

Q.12 Design a combinational circuit with 3 inputs and 1 output
(a) The output is 1 when the binary value of the inputs is less than 3. The output is 0
otherwise
(b) The output is 1 when the binary value of inputs is an odd number.

x y z f
0 0 0 1
yz
0 0 1 1 x 00 01 11 10
0 1 0 1 1 1 0 1
0
0
1
1
0
1
0
0
0 1 0 0 0 0
F = x y + xz
1 0 1 0
1 1 0 0
1 1 1 0 x
y F

z
b.

x y z f
0 0 0 0
0 0 1 1 yz
x 00 01 11 10
0 1 0 0
0 1 1 1 0 0 1 1 0 F=z
1 0 0 0
1 0 1 1 0
1 0 1 1
1 1 0 0
1 1 1 1
Q.13 Design a half subtractor circuit with inputs x and y and outputs Diff. and Bout. The circuit
subtracts the bits x-y and places the result in Diff. and borrow in Bout

x y D B
0 0 0 0 x
D
0 1 1 1 y
1 0 1 0
B
1 1 0 0
Q.14 Construct a 4-to-16 line decoder with five 2-to-4 line decoders with enable input

A0 2
0 2/4
y0-y3
1
A1 2
E

0 2/4
2
y0-y3
A2 2
0 2/4 2
1

1 E
A3 2
E 0 2/4
1 2
y0-y3
1
2
E

2
0 2/4
y0-y3
1
2
E
Q.15 Implement the following function using a decoder: F ( A, B, C ) =  (3,5, 6)

3/8 y0
y1
E y2
y3
y4
2
A 2 y5 F
1
B 2 y6
0
C 2 y7

Q.16 Implement the above function using a multiplexer

A B C F
0 0 0 0
0 00 F=0
0 0 1 0
C 01
F 0 1 0 0
F=C
C 10 0 1 1 1

C 11 1 0 0 0
F=C
1 0 1 1
1 1 0 1
A B 1 1 1 0
F=C