EEE240 Fundamental of Digital Logic Design
Lab # 02: Boolean Function Implementation using Universal Gates
Safia Mahnoor
Name Eman Fatima
SP24-BAI-046
Registration No. SP24-BAI-015
BSAI-2
Class
Dr. Muhammad Rizwan Azam
Instructor’s Name
Lab Assessment
Post Lab Total
In-Lab
Data Presentation Data Analysis Writing Style
Pre-Lab:
• Introduction to Universal Logic Gates:
Universal gates are logic gates that can be used to implement any
Boolean function or logic circuit. Universal gates play a crucial role in digital logic
design, as they have the unique property of being able to construct any other type
of logic gate (AND, OR, NOT, XOR, etc.).
The two primary universal gates are:
1. NAND Gate
2. NOR Gate
• Objectives:
The main objectives of this experiment are:
1) To learn how to implement basic and complex Boolean functions using only
universal gates (NAND or NOR).
2) To optimize and verify circuit designs based on Boolean expressions, ensuring
minimal gate usage and correct functionality.
In-Lab:
We will perform this lab task in two parts. Firstly, we will implement logic
gates using only NAND gate and in the second part, we will use only NOR gate.
Implementation of gates using only NAND gate:
1) NOT Gate:
A NOT gate can be implemented by connecting both inputs of a
NAND gate to the same input.
X = ~A
Proteus Simulation:
Verification by Truth Table:
A X= ~A
0 1
1 0
2) AND Gate:
An AND gate can be constructed using two NAND gates. First,
perform NAND on both inputs, then NAND the result with itself to invert it to get
AND behavior.
X=A.B
Proteus Simulation:
Verification by Truth Table:
A B X=A.B
0 0 0
0 1 0
1 0 0
1 1 1
3) OR Gate:
To implement an OR gate using NAND gates, use the combination of
three NAND gates. First, invert both inputs using two separate NAND gates, then
NAND the results.
X=A+B
Proteus Simulation:
Verification by Truth Table:
A B X=A+B
0 0 0
0 1 1
1 0 1
1 1 1
4) XOR Gate:
XOR gate implementation requires four NAND gates.
X = A .(~B) + (~A). B
Proteus Simulation:
Verification by Truth Table:
A B X=A.(~B) + (~A). B
0 0 0
0 1 1
1 0 1
1 1 0
5) XNOR Gate:
XNOR gate implementation requires five NAND gates.
X = ~(A .(~B) + (~A). B)
Proteus Simulation:
Verification by Truth Table:
A B X= ~(A.(~B) + (~A). B)
0 0 1
0 1 0
1 0 0
1 1 1
Implementation of any Boolean function using only NAND gates:
X(A , B) = A´B
Proteus Simulation:
Verification by Truth Table:
A B A´ X=A´B
0 0 1 0
0 1 1 1
1 0 0 0
1 1 0 0
Implementation of gates using only NOR gate:
1) NOT Gate:
A NOT gate can be implemented by connecting both inputs of a NOR
gate to the same input.
X = ~A
Proteus Simulation:
Verification by Truth Table:
A X= ~A
0 1
1 0
2) AND Gate:
To implement an AND gate using NOR gates, use the combination of
three NOR gates. First, invert both inputs using NOR gates, then NOR the results.
X=A.B
Proteus Simulation:
Verification by Truth Table:
A B X=A.B
0 0 0
0 1 0
1 0 0
1 1 1
3) OR Gate:
An OR gate can be constructed using two NOR gates. First, perform
NOR on both inputs, then NOR the result with itself to invert it to get OR
behavior.
X=A+B
Proteus Simulation:
Verification by Truth Table:
A B X=A+B
0 0 0
0 1 1
1 0 1
1 1 1
Post-Lab:
Implementation of gates using only NOR gate:
4) XOR Gate:
XOR gate implementation requires five NOR gates.
X = A .(~B) + (~A). B
Proteus Simulation:
Verification by Truth Table:
A B X=A.(~B) + (~A). B
0 0 0
0 1 1
1 0 1
1 1 0
5) XNOR Gate:
XNOR gate implementation requires four NOR gates.
X = ~(A .(~B) + (~A). B)
Proteus Simulation:
Verification by Truth Table:
A B X= ~(A.(~B) + (~A). B)
0 0 1
0 1 0
1 0 0
1 1 1
6) NAND Gate:
XNOR gate implementation requires four NOR gates.
X = ~(A . B)
Proteus Simulation:
Verification by Truth Table:
A B X= ~(A.B)
0 0 1
0 1 1
1 0 1
1 1 0
• Conclusion:
By combining multiple NAND or NOR gates, it is possible to
construct all other basic logic gates like AND, OR, NOT, XOR, etc. This property
makes them invaluable in digital electronics. Their universality also highlights
their importance in practical applications, such as in memory design, processors,
and programmable logic devices. Thus, mastering their implementation is essential
for efficient digital system design.
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