TDA7561

Multifunction quad power amplifier with built-in diagnostics features

Datasheet  production data

Features
■ Multipower BCD technology
■ DMOS power output
■ High output power capability 4 x 25 W / 4  @
14.4 V, 1 kHz, 10 % THD, 4 x 35 W EIAJ
■ Max. output power 4 x 60 W / 2  '!0'03
'!0'03

■ Full I2C
bus driving: Flexiwatt25 Flexiwatt25
– Standby (vertical) (horizontal)
– Independent front/rear soft play/mute
– Selectable gain 26 dB - 12 dB (for low noise
line output function)
– I2C bus digital diagnostics
Thanks to the DMOS output stage the TDA7561
■ Full fault protection has a very low distortion allowing a clear powerful
■ DC offset detection sound.
■ Four independent short circuit protection This device is equipped with a full diagnostics
■ Clipping detector array that communicates the status of each
speaker through the I2C bus.The possibility to
■ ESD protection control the configuration and behaviour of the
device by means of the I2C bus makes TDA7561
Description a very flexible machine.

The TDA7561 is a BCD technology quad bridge

type of car radio amplifier in Flexiwatt25 package
specially intended for car radio applications.

Table 1. Device summary

Order code Package Packing

TDA7561 Flexiwatt25 (vertical) Tube

TDA7561H Flexiwatt25 (horizontal) Tube

September 2013 Doc ID 8326 Rev 6 1/27

This is information on a product in full production. www.st.com 1
Contents TDA7561

Contents

1 Block diagram and test/application diagram . . . . . . . . . . . . . . . . . . . . . 5

2 Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4 Diagnostics functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.1 Turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.2 Permanent diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3 Output DC offset detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5 Multiple faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1 Faults availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.1 I2C programming/reading sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.2 I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.2.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.2.2 Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.2.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.2.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7 Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

8 Examples of bytes sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2/27 Doc ID 8326 Rev 6

TDA7561 List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Double fault table for turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 6. IB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 7. IB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 8. DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 9. DB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 10. DB3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 11. DB4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Doc ID 8326 Rev 6 3/27

List of figures TDA7561

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Test and application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Pins connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Quiescent current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Output power vs. supply voltage, RL = 2  
Figure 6. Output power vs. supply voltage, RL = 4  
Figure 7. Distortion vs output power, RL = 2 
Figure 8. Distortion vs output power, RL = 4 
Figure 9. Distortion vs. frequency, RL = 2  
Figure 10. Distortion vs. frequency, RL = 4  
Figure 11. Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Supply voltage rejection vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 13. Power dissipation and efficiency vs. output power (4, SINE). . . . . . . . . . . . . . . . . . . . . . 11
Figure 14. Power dissipation vs. average output power (audio program simulation, 4) . . . . . . . . . . 11
Figure 15. Power dissipation vs. average output power (audio program simulation, 2
Figure 16. Turn-on diagnostic: working principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 17. SVR and output behaviour (case 1: without turn-on diagnostic). . . . . . . . . . . . . . . . . . . . . 12
Figure 18. SVR and output pin behaviour (case 2: with turn-on diagnostic) . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Short circuit detection thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Load detection thresholds - high gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Load detection threshold - low gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 22. Restart timing without diagnostic enable (permanent) - Each 1 mS time,
a sampling of the fault is done . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Restart timing with diagnostic enable (permanent). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Data validity on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. Timing diagram on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. Acknowledge on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 27. Flexivatt25 (vertical) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . 24
Figure 28. Flexivatt25 (horizontal) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . 25

4/27 Doc ID 8326 Rev 6

TDA7561 Block diagram and test/application diagram

1 Block diagram and test/application diagram

Figure 1. Block diagram

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Doc ID 8326 Rev 6 5/27

Pins description TDA7561

2 Pins description

Figure 3. Pins connection diagram (top view)

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6/27 Doc ID 8326 Rev 6

TDA7561 Electrical specifications

3 Electrical specifications

3.1 Absolute maximum ratings

Table 2. Absolute maximum ratings
Symbol Parameter Value Unit

Vop Operating supply voltage 18 V

VS DC supply voltage 28 V
Vpeak Peak supply voltage (for t = 50 ms) 50 V
VCK CK pin voltage 6 V
VDATA Data pin voltage 6 V
IO Output peak current (not repetitive t = 100 ms) 8 A
IO Output peak current (repetitive f > 10 Hz) 6 A
Ptot Power dissipation Tcase = 70 °C 85 W
Tstg, Tj Storage and junction temperature -55 to 150 °C

3.2 Thermal data

Table 3. Thermal data
Symbol Parameter Value Unit

Rth j-case Thermal resistance junction-to-case Max. 1 °C/W

3.3 Electrical characteristics

Refer to the test circuit, VS = 14.4 V; RL = 4 ; f = 1 kHz; Tamb = 25 °C; unless otherwise specified.

Table 4. Electrical characteristics

Symbol Parameter Test condition Min. Typ. Max. Unit

Power amplifier

VS Supply voltage range - 8 - 18 V

Id Total quiescent drain current - - 150 300 mA
EIAJ (VS = 13.7 V) 32 35 - W
THD = 10% 22 25 - W
THD = 1% - 20 - W
PO Output power RL = 2 ; EIAJ (VS = 13.7 V) 50 55 - W
RL = 2 ; THD 10% 32 38 - W
RL = 2 ; THD 1% - 30 - W
RL = 2 ; Max. power - 60 - W

Doc ID 8326 Rev 6 7/27

Electrical specifications TDA7561

Table 4. Electrical characteristics (continued)

Symbol Parameter Test condition Min. Typ. Max. Unit

PO = 1 W to 10 W - 0.04 0.1 %
THD Total harmonic distortion
GV = 12 dB; VO = 0.1 to 5 VRMS - 0.02 0.05 %
CT Cross talk f = 1 kHz to 10 kHz, Rg = 600  50 60 - dB
RIN Input impedance - 80 100 130 k
GV1 Voltage gain 1 - 25 26 27 dB
GV1 Voltage gain match 1 - -1 - 1 dB
GV2 Voltage gain 2 - 11 12 13 dB
GV2 Voltage gain match 2 - -1 - 1 dB
EIN1 Output noise voltage 1 Rg = 600 , 20 Hz to 22 kHz - 35 80 µV
Rg = 600 ; GV = 12 dB
EIN2 Output noise voltage 2 - 12 20 µV
20 Hz to 22 kHz
f = 100 Hz to 10 kHz;
SVR Supply voltage rejection 50 60 - dB
Vr = 1 Vpk; Rg = 600 
BW Power bandwidth - 100 - - kHz
ASB Standby attenuation - 90 110 - dB
ISB Standby current - - 25 100 µA
AM Mute attenuation - 80 100 - dB
VOS Offset voltage Mute & play -100 0 100 mV
VAM Min. supply mute threshold - 7 7.5 8 V
TON Turn-on delay D2/D1 (IB1) 0 to 1 - 20 40 ms
TOFF Turn-off delay D2/D1 (IB1) 1 to 0 - 20 40 ms
CDLK Clip det. high leakage current CD off - 0 15 µA
CDSAT Clip det. sat. voltage CD on; ICD = 1 mA - 150 300 mV
CDTHD Clip det. THD level VS > 10 V - 1 2 %

Turn on diagnostics 1 (Power amplifier mode)

Short to GND det. (below this

Power amplifier in standby
Pgnd limit, the Output is considered in - - 1.2 V
condition
short circuit to GND)
Short to Vs det. (above this limit,
Pvs the output is considered in short - Vs -1.2 - V
circuit to VS)
Normal operation thresholds.
Pnop (Within these limits, the Output - 1.8 - Vs -1.8 V
is considered without faults).
Lsc Shorted load det. - - - 0.5 
Lop Open load det. - 130 - 
Lnop Normal load det. - 1.5 - 70 

8/27 Doc ID 8326 Rev 6

TDA7561 Electrical specifications

Table 4. Electrical characteristics (continued)

Symbol Parameter Test condition Min. Typ. Max. Unit

Turn-on diagnostics 2 (Line driver mode)

Short to GND det. (below this

Pgnd limit, the Output is considered in Power amplifier in standby - - 1.2 V
short circuit to GND)
Short to Vs det. (above this limit,
Pvs the output is considered in short - Vs -1.2 - - V
circuit to VS)
Normal operation thresholds
Pnop (within these limits, the output is - 1.8 - Vs -1.8 V
considered without faults).
Lsc Shorted load det. - - - 1.5 
Lop Open load det. - 400 - - 
Lnop Normal load det. - 4.5 - 200 

Permanent diagnostics 2 (Power amplifier mode or line driver mode)

Short to GND det. (below this Power amplifier in mute or play,

Pgnd limit, the Output is considered in one or more short circuits - - 1.2 V
short circuit to GND) protection activated
Short to Vs det. (above this limit,
Pvs the output is considered in short - Vs -1.2 - - V
circuit to VS)
Normal operation thresholds.
Pnop (within these limits, the output is - 1.8 - Vs -1.8 V
considered without faults)
Power amplifier mode - - 0.5 
LSC Shorted load det.
Line driver mode - - 1.5 
Power amplifier in play, AC Input
VO Offset detection 1.5 2 2.5 V
signals = 0

I2C bus interface

fSCL Clock frequency - - 400 - kHz

VIL Input low voltage - - - 1.5 V
VIH Input high voltage - 2.3 - - V

Doc ID 8326 Rev 6 9/27

Electrical specifications TDA7561

3.4 Electrical characteristics curves

Figure 4. Quiescent current vs. supply Figure 5. Output power vs. supply voltage,
voltage RL = 2 
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6S 6 '!0'03

Figure 6. Output power vs. supply voltage, Figure 7. Distortion vs output power,
RL = 4  RL = 2 

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Figure 8. Distortion vs output power, Figure 9. Distortion vs. frequency, RL = 2 

RL = 4 

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0O 7 '!0'03 F (Z '!0'03

10/27 Doc ID 8326 Rev 6

TDA7561 Electrical specifications

Figure 10. Distortion vs. frequency, RL = 4  Figure 11. Crosstalk vs. frequency

4($   #2/33 4!,+ D"

 

6S    6 
2,   /HM
0O   7 



6S   6
2,   /HM
 0O   7
2G   /HM





 
       
F (Z F (Z '!0'03
'!0'03

Figure 12. Supply voltage rejection vs. Figure 13. Power dissipation and efficiency
frequency vs. output power (4, SINE)

362 D" 0TOT 7 H 

  

 
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6S   6
 2,  X /HM 
F  +(Z 3).%

 

  
0TOT
  

2G   /HM  
 6R IPPLE   6 PK
 

 

  
                 
F (Z '!0'03
0O 7 '!0'03

Figure 14. Power dissipation vs. average output Figure 15. Power dissipation vs. average output
power (audio program simulation, 4) power (audio program simulation, 2

0TOT 7 0TOT 7
 

 

6S   6  6S   6
 2,  X /HM 2,  X  /HM
'!533)!. ./)3% #,)0 '!533)!. ./)3% #,)0
34!24  34!24








 

 
              
0O 7 '!0'03 0O 7 '!0'03

Doc ID 8326 Rev 6 11/27

Diagnostics functional description TDA7561

4 Diagnostics functional description

4.1 Turn-on diagnostic

It is activated at the turn-on (standby out) under I2C bus request. Detectable output faults
are:
● Short to GND
● Short to Vs
● Short across the speaker
● Open speaker
To verify if any of the above misconnections are in place, a subsonic (inaudible) current
pulse (Figure 16) is internally generated, sent through the speaker(s) and sunk back.The
Turn On diagnostic status is internally stored until a successive diagnostic pulse is
requested (after a I2C reading).
If the "standby out" and "diag. enable" commands are both given through a single
programming step, the pulse takes place first (power stage still in stand-by mode, low,
outputs = high impedance).
Afterwards, when the Amplifier is biased, the permanent diagnostic takes place. The
previous Turn-on state is kept until a short appears at the outputs.

Figure 16. Turn-on diagnostic: working principle

9Va9 , P$

,VRXUFH ,VRXUFH

,VLQN

,VLQN
aPV W PV
0HDVXUHWLPH
'!0'03

Figure 17 and 18 show SVR and output waveforms at the turn-on (stand-by out) with and
without turn-on diagnostic.

Figure 17. SVR and output behaviour (case 1: without turn-on diagnostic)

6SVR
/UT
0ERMANENT DIAGNOSTIC
ACQUISITION TIME M3 4YP

$IAGNOSTIC %NABLE T
"IAS POWER AMP TURN ON
0ERMANENT &! 5,4
EVENT 2EAD $ATA

)#" $!4! 0ERMANENT $IAGNOSTICS DATA OUTPUT

PERMITTED TIME '!0'03

12/27 Doc ID 8326 Rev 6

TDA7561 Diagnostics functional description

Figure 18. SVR and output pin behaviour (case 2: with turn-on diagnostic)

6 S VR
/UT 4URN ON DIAGNOSTIC
0ERMANENT DIAGNOSTIC
ACQUISITION TIME  M3 4YP
ACQUISITION TIME  M3 4YP

T
$IAGNOSTIC %NABLE 4URN ON $ IAGNOSTICS DATA OUTPUT
$IAGNOSTIC %NABLE
&!5,4
4URN ON PERMITTED TIME EVENT
0ERMANENT

"IAS POWER AMP TURN ON 2EAD $ATA 0ERMANENT $IAGNOSTIC DATA OUTPUT
) # " $ !4! PERMITTED TIME PERMITTED TIME
'!0'03

The information related to the outputs status is read and memorized at the end of the
current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the
process. As for short to GND / Vs the fault-detection thresholds remain unchanged from 26
dB to 12 dB gain setting. They are as follows:

Figure 19. Short circuit detection thresholds

3# TO '.$ X .ORMAL /PERATION X 3# TO 6S

6 6 6 63 6 63 6 63

'!0'03

Concerning short across the speaker / open speaker, the threshold varies from 26 dB to 12
dB gain setting, since different loads are expected (either normal speaker's impedance or
high impedance). The values in case of 26 dB gain are as follows:

Figure 20. Load detection thresholds - high gain setting

3# ACROSS ,OAD X .ORMAL /PERATION X /PEN ,OAD

6 7 7 7 7 )NFINITE

'!0'03

If the line-driver mode (Gv = 12 dB and line driver mode diagnostic = 1) is selected, the
same thresholds will change as follows:

Figure 21. Load detection threshold - low gain setting

3# ACROSS ,OAD X .ORMAL /PERATION X /PEN ,OAD

7 7 7 7 7 INFINITE

'!0'03

Doc ID 8326 Rev 6 13/27

Diagnostics functional description TDA7561

4.2 Permanent diagnostics

Detectable conventional faults are:
● Short to GND
● Short to Vs
● Short across the speaker
The following additional features are provided:
● Output offset detection
The TDA7561 has 2 operating statuses:
1. Restart mode. The diagnostic is not enabled. Each audio channel operates
independently from each other. If any of the a.m. faults occurs, only the channel(s)
interested is shut down. A check of the output status is made every 1 ms (Figure 22).
Restart takes place when the overload is removed.
2. Diagnostic mode. It is enabled via I2C bus and self activates if an output overload (such
to cause the intervention of the short-circuit protection) occurs to the speakers outputs.
Once activated, the diagnostics procedure develops as follows (Figure 23):
– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a
check of the output status is made after 1ms: if normal situation (no overloads) is
detected, the diagnostic is not performed and the channel returns back active.
– Instead, if an overload is detected during the check after 1 ms, then a diagnostic
cycle having a duration of about 100 ms is started.
– After a diagnostic cycle, the audio channel interested by the fault is switched to
restart mode. The relevant data are stored inside the device and can be read by
the microprocessor. When one cycle has terminated, the next one is activated by
an I2C reading. This is to ensure continuous diagnostics throughout the car-radio
operating time.
– To check the status of the device a sampling system is needed. The timing is
chosen at microprocessor level (over half a second is recommended).

Figure 22. Restart timing without diagnostic enable (permanent) - Each 1 mS time, a
sampling of the fault is done
/UT
 M3 M3 M3 M3 M3

T
/VERCURRENT AND SHOR T
CIRCUIT PROTECTION INTERVENTION 3HORT CI RCUI T REMOVED
IE SHORT CIRCUI T T O '.$ '!0'03

Figure 23. Restart timing with diagnostic enable (permanent)

 M3 M3 M3 M3

/VERCURRENT AND SHORT

3HO RT CIRCUIT REMOVED
CIRCUIT PROTECTI ON IN TERVENTI ON
IE S HORT C IRCUI T TO '.$ '!0'03

14/27 Doc ID 8326 Rev 6

TDA7561 Diagnostics functional description

4.3 Output DC offset detection

Any DC output offset exceeding ±2 V are signalled out. This inconvenient might occur as a
consequence of initially defective or aged and worn-out input capacitors feeding a DC
component to the inputs, so putting the speakers at risk of overheating.
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
The test is run with selectable time duration by microprocessor (from a "start" to a "stop"
command):
● Start = Last reading operation or setting IB1 - D5 - (offset enable) to 1
● Stop = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature
is disabled if any overloads leading to activation of the short-circuit protection occurs in the
process.

Doc ID 8326 Rev 6 15/27

Multiple faults TDA7561

5 Multiple faults

When more misconnections are simultaneously in place at the audio outputs, it is

guaranteed that at least one of them is initially read out. The others are notified after
successive cycles of I2C reading and faults removal, provided that the diagnostic is enabled.
This is true for both kinds of diagnostic (turn on and permanent).
The table below shows all the couples of possible double-fault. It should be taken into
account that a short circuit with the 4 ohm speaker unconnected is considered as double
fault.

Table 5. Double fault table for turn-on diagnostic

S. GND (so) S. GND (sk) S. Vs S. Across L. Open L.

S. Vs + S.
S. GND (so) S. GND S. GND S. GND S. GND
GND
S. GND (sk) / S. GND S. Vs S. GND Open L. (*)
S. Vs / / S. Vs S. Vs S. Vs
S. Across L. / / / S. Across L. N.A.
Open L. / / / / Open L. (*)

S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2
outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More
precisely, so = CH+, sk = CH-.
In permanent diagnostic the table is the same, with only a difference concerning Open
Load(*), which is not among the recognizable faults. Should an Open Load be present during
the device's normal working, it would be detected at a subsequent Turn on Diagnostic cycle
(i.e. at the successive Car Radio Turn on).

5.1 Faults availability

All the results coming from I2C bus, by read operations, are the consequence of
measurements inside a defined period of time. If the fault is stable throughout the whole
period, it will be sent out.
To guarantee always resident functions, every kind of diagnostic cycles (Turn-on,
Permanent, Offset) will be reactivate after any I2C reading operation. So, when the
microprocessor reads the I2C, a new cycle will be able to start, but the read data will come
from the previous diag. cycle (i.e. The device is in turn-on state, with a short to GND, then
the short is removed and micro reads I2C. The short to GND is still present in bytes,
because it is the result of the previous cycle. If another I2C reading operation occurs, the
bytes do not show the short). In general to observe a change in diagnostic bytes, two I2C
reading operations are necessary.

16/27 Doc ID 8326 Rev 6

TDA7561 I2C bus

6 I2C bus

6.1 I2C programming/reading sequence

A correct turn on/off sequence respectful of the diagnostic timings and producing no audible
noises could be as follows (after battery connection):
● Turn-on: (Standby out + Diag enable) --- 500 ms (min) --- Muting out
● Turn-off: Muting in --- 20 ms --- (Diag disable + Standby in)
● Car radio installation: Diag enable (write) --- 200 ms --- I2C read (repeat until All faults
disappear).
● Offset test: Device in Play (no signal) -- Offset enable - 30 ms - I2C reading (repeat I2C
reading until high-offset message disappears).

6.2 I2C bus interface

Data transmission from microprocessor to the TDA7561 and viceversa takes place through
the 2 wires I2C bus interface, consisting of the two lines SDA and SCL (pull-up resistors to
positive supply voltage must be connected).

6.2.1 Data validity

As shown by Figure 24, the data on the SDA line must be stable during the high period of
the clock.
The High and Low state of the data line can only change when the clock signal on the SCL
line is Low.

6.2.2 Start and stop conditions

As shown by Figure 25 a start condition is a High to Low transition of the SDA line while SCL
is HIGH.
The stop condition is a Low to High transition of the SDA line while SCL is High.

6.2.3 Byte format

Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first.

Doc ID 8326 Rev 6 17/27

I2C bus TDA7561

6.2.4 Acknowledge
The transmitter puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see Figure 26). The receive the acknowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock
pulse.

Transmitter:
– master (µP) when it writes an address to the TDA7561
– slave (TDA7561) when the µP reads a data byte from TDA7561

Receiver:
– slave (TDA7561) when the µP writes an address to the TDA7561
– master (µP) when it reads a data byte from TDA7561

Figure 24. Data validity on the I2C bus

3$!

3#,

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6!,)$ !,,/7%$ '!0'03

Figure 25. Timing diagram on the I2C bus

3#,

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3$!

34!24 34/0 '!0'03

Figure 26. Acknowledge on the I2C bus

3#,      

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34!24 &2/- 2%#%)6%2 '!0'03

18/27 Doc ID 8326 Rev 6

TDA7561 Software specifications

7 Software specifications

All the functions of the TDA7561 are activated by I2C interface.

The bit 0 of the "Address byte" defines if the next bytes are write instruction (from µP to
TDA7561) or read instruction (from TDA7561 to µP).

Chip address

D7 D0

1 1 0 1 1 0 0 X D8 Hex

X = 0 Write to device
X = 1 Read from device
If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.

Table 6. IB1
Bit Instruction decoding bit

D7 X
Diagnostic enable (D6 = 1)
D6
Diagnostic defeat (D6 = 0)
Offset detection enable (D5 = 1)
D5
Offset detection defeat (D5 = 0)
Front channel
D4 Gain = 26dB (D4 = 0)
Gain = 12dB (D4 = 1)
Rear channel
D3 Gain = 26dB (D3 = 0)
Gain = 12dB (D3 = 1)
Mute front channels (D2 = 0)
D2
Unmute front channels (D2 = 1)
Mute rear channels (D1 = 0)
D1
Unmute rear channels (D1 = 1)
D0 X

Doc ID 8326 Rev 6 19/27

Software specifications TDA7561

Table 7. IB2
Bit Instruction decoding bit

D7 X
D6 Used for testing
D5 Used for testing
Standby on - Amplifier not working - (D4 = 0)
D4
Standby off - Amplifier working - (D4 = 1)
Power amplifier mode diagnostic (D3 = 0)
D3
Line driver mode diagnostic (D3 = 1)
D2 X
D1 X
D0 X

If R/W = 1, the TDA7561 sends 4 "Diagnostics Bytes" to µP: DB1, DB2, DB3 and DB4.

Table 8. DB1
Bit Instruction decoding bit

D7 Thermal warning active (D7 = 1)

Diag. cycle not activated or not terminated (D6 = 0)
D6
Diag. cycle terminated (D6 = 1)
D5 X
Channel LFTurn-on diagnostic (D4 = 0)
D4
Permanent diagnostic (D4 = 1)
Channel LF
D3 Normal load (D3 = 0)
Short load (D3 = 1)
Channel LFTurn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
D2
Offset diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1 Channel LFNo short to Vcc (D1 = 0)Short to Vcc (D1 = 1)
D0 Channel LFNo short to GND (D1 = 0)Short to GND (D1 = 1)

20/27 Doc ID 8326 Rev 6

TDA7561 Software specifications

Table 9. DB2
Bit Instruction decoding bit

Offset detection not activated (D7 = 0)

D7
Offset detection activated (D7 = 1)
D6 X
D5 X
Channel LRTurn-on diagnostic (D4 = 0)
D4
Permanent diagnostic (D4 = 1)
Channel LRNormal load (D3 = 0)
D3
Short load (D3 = 1)
Channel LRTurn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
D2
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel LR
D1 No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
Channel LR
D0 No short to GND (D1 = 0)
Short to GND (D1 = 1)

Table 10. DB3

Bit Instruction decoding bit

D7 Standby status (= IB1 - D4)

D6 Diagnostic status (= IB1 - D6)
D5 X
Channel RFTurn-on diagnostic (D4 = 0)
D4
Permanent diagnostic (D4 = 1)
Channel RFNormal load (D3 = 0)
D3
Short load (D3 = 1)
Channel RF
Turn-on diag.: No open load (D2 = 0)
D2 Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel RFNo short to Vcc (D1 = 0)
D1
Short to Vcc (D1 = 1)
Channel RFNo short to GND (D1 = 0)
D0
Short to GND (D1 = 1)

Doc ID 8326 Rev 6 21/27

Software specifications TDA7561

Table 11. DB4

Bit Instruction decoding bit

D7 X
D6 X
D5 X
Channel RR
D4 Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel RR
D3 Normal load (D3 = 0)
Short load (D3 = 1)
Channel RR
Turn-on diag.: No open load (D2 = 0)
D2 Open load detection (D2 = 1)
Permanent diag.:No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1 Channel RRNo short to Vcc (D1 = 0) Short to Vcc (D1 = 1)
D0 Channel RRNo short to GND (D1 = 0) Short to GND (D1 = 1)

22/27 Doc ID 8326 Rev 6

TDA7561 Examples of bytes sequence

8 Examples of bytes sequence

1 - Turn-on diagnostic - Write operation

Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP

2 - Turn-on diagnostic - Read operation

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP

The delay from 1 to 2 can be selected by software, starting from 1 ms

3a - Turn-on of the power amplifier with 26 dB gain, mute on, diagnostic defeat.

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP
X000000X XXX1X0XX

3b - Turn-off of the power amplifier

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP
X0XXXXXX XXX0XXXX

4 - Offset detection procedure enable

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP
XX1XX11X XXX1X0XX

5 - Offset detection procedure stop and reading operation (the results are valid only for the
offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4).

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP

● The purpose of this test is to check if a DC offset (2V typ.) is present on the outputs,
produced by input capacitor with anomalous leakage current or humidity between pins.
● The delay from 4 to 5 can be selected by software, starting from 1 ms.

Doc ID 8326 Rev 6 23/27

Package information TDA7561

9 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

Figure 27. Flexivatt25 (vertical) mechanical data and package dimensions

MM INCH
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24/27 Doc ID 8326 Rev 6

TDA7561 Package information

Figure 28. Flexivatt25 (horizontal) mechanical data and package dimensions

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Doc ID 8326 Rev 6 25/27

Revision history TDA7561

10 Revision history

Table 12. Document revision history

Date Revision Changes

December 2002 4 -
Document reformatted.
Added Table 1: Device summary on page 1.
17-May-2012 5
Added Figure 28: Flexivatt25 (horizontal) mechanical data and
package dimensions on page 25.
16-Sep-2103 6 Updated Disclaimer.

26/27 Doc ID 8326 Rev 6

TDA7561

Please Read Carefully:

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Doc ID 8326 Rev 6 27/27

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