M27C256B-10F1.

M27C256B

256 Kbit (32Kb × 8) UV EPROM and OTP EPROM

Feature summary
■ 5V ± 10% supply voltage in Read operation
■ Access time: 45ns
■ Low power consumption:
28

( s )
ct
– Active Current 30mA at 5MHz 1

– Standby Current 100µA

■ Programming voltage: 12.75V ± 0.25V
FDIP28W (F)

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■ Programming time: 100µs/Word
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■ Electronic signature
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let
– Manufacturer Code: 20h 28

– Device Code: 8Dh

so
1
■ ECOPACK® packages available

O b PDIP28 (B)

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PLCC32 (C)

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May 2006 Rev 2 1/24

www.st.com 1
 Contents M27C256B

Contents

1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
)
System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
( s
ct
2.5 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6
u
PRESTO II programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
d
2.7
r o
Program inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8 P
Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
e
2.9 t
Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
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2.10
o
Erasure operation (applies for UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 11
s
3
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Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

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4
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DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

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5
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Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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6
P
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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 M27C256B List of tables

List of tables

Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 2. Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 3. Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 5. AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 6. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 7. Read mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 8. Programming mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 9. Read mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 10.
Table 11. Programming mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
( s )
Read mode AC characteristics 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 12. FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"),

u ct
package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 13. PDIP28 - 28 pin Plastic DIP, 600 mils width, package mechanical data . . . . . . . . . . . . . . 20
o d
Table 14. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package

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mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 15.
Table 16.
t e
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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 List of figures M27C256B

List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. LCC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Programming flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. AC testing input output waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. AC testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Read mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 8. Programming and Verify modes AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 9. FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window, package outline . . . . . . . . . . . . . 19
Figure 10.
Figure 11.
PDIP28 - 28 pin Plastic DIP, 600 mils width, package outline . . . . . . . . . . . . . . . . . . . . . . 20
PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package outline. . . . . . . . . . . 21
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M27C256B Summary description

1 Summary description

The M27C256B is a 256 Kbit EPROM offered in the two ranges UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited for microprocessor systems and is
organized as 32,768 by 8 bits.
The FDIP28W (window ceramic frit-seal package) has a transparent lid which allows the
user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be
written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C256B is offered in PDIP28 and PLCC32 packages.
In order to meet environmental requirements, ST offers the M27C256B in ECOPACK®
packages.
( s )
ct
ECOPACK packages are Lead-free. The category of second Level Interconnect is marked
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o d
on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.

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ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Figure 1. Logic diagram

e t e
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VCC

b s VPP

O
)-
15 8
A0-A14 Q0-Q7

t ( s
c
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E M27C256B

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ol
bs
VSS
AI00755B

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 Summary description M27C256B

Table 1. Signal names

A0-A14 Address Inputs
Q0-Q7 Data Outputs
E Chip Enable
G Output Enable
VPP Program Supply
VCC Supply Voltage
VSS Ground
NC Not Connected Internally
DU Don’t Use

( s )
Figure 2. DIP connections

uct
VPP 1 28 VCC
o d
A12
A7
2
3
27
26
A14
A13
P r
A6
A5
4
5
25
24
e t e
A8
A9
A4 6
o
23 l A11
A3
A2
7
8
b s
M27C256B
22
21
G
A10

-
A1
O
9 20 E

(s ) A0
Q0
10
11
19
18
Q7
Q6

c t Q1 12 17 Q5

du Q2
VSS
13
14
16
15
Q4
Q3

r o AI00756

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 M27C256B Summary description

Figure 3. LCC connections

VCC
VPP
A12

A14
A13
DU
A7
1 32
A6 A8
A5 A9
A4 A11
A3 NC
A2 9 M27C256B 25 G
A1 A10
A0 E
NC
Q0
Q7
Q6
( s )
ct
17
Q1
Q2
u
VSS
DU
Q3
Q4
Q5
o d
r
AI00757

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 Device operation M27C256B

2 Device operation

The operating modes of the M27C256B are listed in the Operating Modes. A single power
supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9
for Electronic Signature.

2.1 Read mode

The M27C256B has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E) is the power control and should be used for
device selection. Output Enable (G) is the output control and should be used to gate data to

s )
the output pins, independent of device selection. Assuming that the addresses are stable,
(
ct
the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is
available at the output after delay of tGLQV from the falling edge of G, assuming that E has
been low and the addresses have been stable for at least tAVQV-tGLQV.
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2.2 Standby mode
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The M27C256B has a standby mode which reduces the supply current from 30mA to

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100µA. The M27C256B is placed in the standby mode by applying a CMOS high signal to
the E input. When in the standby mode, the outputs are in a high impedance state,
independent of the G input.
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2.3 Two-line output control

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Because EPROMs are usually used in larger memory arrays, this product features a 2 line
u
control function which accommodates the use of multiple memory connection. The two line
d
●
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control function allows:
the lowest possible memory power dissipation,
●
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complete assurance that output bus contention will not occur.

l e t
For the most efficient use of these two control lines, E should be decoded and used as the

s o primary device selecting function, while G should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This

O b ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is desired from a particular memory device.

8/24
 M27C256B Device operation

2.4 System considerations

The power switching characteristics of Advance CMOS EPROMs require careful decoupling
of the devices. The supply current, ICC, has three segments that are of interest to the system
designer: the standby current level, the active current level, and transient current peaks that
are produced by the falling and rising edges of E. The magnitude of this transient current
peaks is dependent on the capacitive and inductive loading of the device at the output. The
associated transient voltage peaks can be suppressed by complying with the two line output
control and by properly selected decoupling capacitors. It is recommended that a 0.1µF
ceramic capacitor be used on every device between VCC and VSS. This should be a high
frequency capacitor of low inherent inductance and should be placed as close to the device
as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between VCC and
VSS for every eight devices. The bulk capacitor should be located near the power supply

( s )
connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused

ct
by the inductive effects of PCB traces.

2.5 Programming d u
r o
e P
When delivered (and after each erasure for UV EPROM), all bits of the M27C256B are in the
"1" state. Data is introduced by selectively programming "0"s into the desired bit locations.

e t
Although only "0"s will be programmed, both "1"s and "0"s can be present in the data word.
l
The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The

s o
M27C256B is in the programming mode when VPP input is at 12.75V, G is at VIH and E is

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pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output
pins. The levels required for the address and data inputs are TTL. VCC is specified to be
6.25V ± 0.25 V.

) -
2.6
c t (s
PRESTO II programming algorithm

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PRESTO II Programming Algorithm allows to program the whole array with a guaranteed

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margin, in a typical time of 3.5 seconds. Programming with PRESTO II involves the

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application of a sequence of 100µs program pulses to each byte until a correct verify occurs
(see Figure 4.). During programming and verify operation, a MARGIN MODE circuit is

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automatically activated in order to guarantee that each cell is programmed with enough
margin. No overprogram pulse is applied since the verify in MARGIN MODE provides

s o necessary margin to each programmed cell.

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 Device operation M27C256B

Figure 4. Programming flowchart

VCC = 6.25V, VPP = 12.75V

n=0

E = 100µs Pulse

NO

++n NO
= 25 VERIFY ++ Addr

YES YES

FAIL
Last
Addr
NO

( s )
YES

uct
CHECK ALL BYTES

o d
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1st: VCC = 6V
2nd: VCC = 4.2V

e P
t
AI00760B

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2.7 Program inhibit
b s
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Programming of multiple M27C256Bs in parallel with different data is also easily
accomplished. Except for E, all like inputs including G of the parallel M27C256B may be

(s )
common. A TTL low level pulse applied to a M27C256B's E input, with VPP at 12.75V, will
program that M27C256B. A high level E input inhibits the other M27C256Bs from being
programmed.
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2.8
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Program Verifyo
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A verify (read) should be performed on the programmed bits to determine that they were

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correctly programmed. The verify is accomplished with G at VIL, E at VIH, VPP at 12.75V and
VCC at 6.25V.

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2.9 Electronic signature
The Electronic Signature (ES) mode allows the reading out of a binary code from an
EPROM that will identify its manufacturer and type. This mode is intended for use by
programming equipment to automatically match the device to be programmed with its
corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C
ambient temperature range that is required when programming the M27C256B. To activate
the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of
the M27C256B, with VCC = VPP = 5V. Two identifier bytes may then be sequenced from the
device outputs by toggling address line A0 from VIL to VIH. All other address lines must be
held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer
code and byte 1 (A0 = VIH) the device identifier code. For the STMicroelectronics
M27C256B, these two identifier bytes are given in Table 3 and can be read-out on outputs
Q7 to Q0.

10/24
M27C256B Device operation

2.10 Erasure operation (applies for UV EPROM)

The erasure characteristics of the M27C256B is such that erasure begins when the cells are
exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted
that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å
range. Research shows that constant exposure to room level fluorescent lighting could
erase a typical M27C256B in about 3 years, while it would take approximately 1 week to
cause erasure when exposed to direct sunlight. If the M27C256B is to be exposed to these
types of lighting conditions for extended periods of time, it is suggested that opaque labels
be put over the M27C256B window to prevent unintentional erasure. The recommended
erasure procedure for the M27C256B is exposure to short wave ultraviolet light which has
wavelength 2537Å. The integrated dose (i.e. UV intensity x exposure time) for erasure
should be a minimum of 15 W-sec/cm2. The erasure time with this dosage is approximately
15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M27C256B

( s )
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should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps
have a filter on their tubes which should be removed before erasure.

Table 2. Operating modes(1)

d u
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Mode E G A9
Pr VPP Q7-Q0

ete
Read VIL VIL X VCC Data Out

ol
Output Disable VIL VIH X VCC Hi-Z

bs
Program VIL Pulse VIH X VPP Data In
Verify VIH VIL X VPP Data Out
Program Inhibit VIH
- O VIH X VPP Hi-Z
Standby

( s )
VIH X X VCC Hi-Z
Electronic Signature
c t VIL VIL VID VCC Codes

u
1. X = VIH or VIL, VID = 12V ± 0.5V.

d
Table 3.
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Electronic signature

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Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

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Manufacturer’s

e
Code
VIL 0 0 1 0 0 0 0 0 20h

o
bs
Device Code VIH 1 0 0 0 1 1 0 1 8Dh

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 Maximum rating M27C256B

3 Maximum rating

Stressing the device above the rating listed in the Absolute Maximum Ratings table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

TA Ambient Operating Temperature(1) –40 to 125

( s )°C

t
uc
TBIAS Temperature Under Bias –50 to 125 °C

od
TSTG Storage Temperature –65 to 150 °C

Pr
VIO(2) Input or Output Voltage (except A9) –2 to 7 V
VCC Supply Voltage –2 to 7 V
VA9(2) A9 Voltage

e t e –2 to 13.5 V
VPP Program Supply Voltage
o l –2 to 14 V
1. Depends on range.

b s
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than

than 20ns.
- O
20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less

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 M27C256B DC and AC parameters

4 DC and AC parameters

This section summarizes the operating and measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC Characteristic tables that
follow are derived from tests performed under the Measurement Conditions summarized in
the relevant tables. Designers should check that the operating conditions in their circuit
match the measurement conditions when relying on the quoted parameters.

Table 5. AC measurement conditions

High Speed Standard

≤10ns ≤20ns
Input Rise and Fall Times
Input Pulse Voltages 0 to 3V
( s
0.4V to 2.4V )
Input and Output Timing Ref.
Voltages
1.5V
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0.8V and 2V

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Figure 5. AC testing input output waveform
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High Speed

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3V

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0V
b s 1.5V

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)
Standard

(s
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2.4V
2.0V

d u 0.4V
0.8V

o
Pr
AI01822

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DC and AC parameters M27C256B

Figure 6. AC testing load circuit

1.3V

1N914

3.3kΩ

DEVICE
UNDER OUT
TEST
CL

( s )
ct
CL = 30pF for High Speed

u
CL = 100pF for Standard
CL includes JIG capacitance AI01823B

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Table 6. Capacitance(1) (2)
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e
let
Symbol Parameter Test Condition Min Max Unit

CIN Input Capacitance VIN = 0V 6 pF

COUT Output Capacitance
s o VOUT = 0V 12 pF
1. Sampled only, not 100% tested.
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2. (TA = 25 °C, f = 1 MHz)

) -
Table 7.

t ( s
Read mode DC characteristics(1) (2)
Symbol

u c
Parameter Test Condition

0V ≤VIN ≤VCC
Min Max Unit

ILI

o d
Input Leakage Current ±10 µA

Pr
ILO Output Leakage Current 0V ≤VOUT ≤VCC ±10 µA
E = VIL, G = VIL,

e t e ICC Supply Current

IOUT = 0mA, f = 5MHz
30 mA

ol
ICC1 Supply Current (Standby) TTL E = VIH 1 mA

bs
Supply Current (Standby)
ICC2 E > VCC – 0.2V 100 µA
CMOS

O IPP
VIL
Program Current
Input Low Voltage
VPP = VCC
–0.3
100
0.8
µA
V
VIH(3) Input High Voltage 2 VCC + 1 V
VOL Output Low Voltage IOL = 2.1mA 0.4 V
Output High Voltage TTL IOH = –1mA 3.6 V
VOH
Output High Voltage CMOS IOH = –100µA VCC – 0.7V V
1. TA = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC.
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
3. Maximum DC voltage on Output is VCC +0.5V.

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 M27C256B DC and AC parameters

Table 8. Programming mode DC characteristics(1) (2)

Symbol Parameter Test Condition Min Max Unit

ILI Input Leakage Current VIL ≤VIN ≤VIH ±10 µA

ICC Supply Current 50 mA
IPP Program Current E = VIL 50 mA
VIL Input Low Voltage –0.3 0.8 V
VIH Input High Voltage 2 VCC + 0.5 V
VOL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High Voltage TTL IOH = –1mA 3.6 V
VID A9 Voltage 11.5 12.5

( sV)
1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V.
c t
u
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

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 DC and AC parameters M27C256B

Figure 7. Read mode AC waveforms

A0-A14 VALID VALID

tAVQV tAXQX

tEHQZ
tGLQV

tELQV tGHQZ

Hi-Z
Q0-Q7

( s ) AI00758B

Table 9. Read mode AC characteristics(1) (2)

u ct
M27C256B
o d
Symbol Alt Parameter
Test
Condition
-45(3)
P
-60 r -70 -80 Unit

t e
Min Max Min Max Min Max Min Max
e
Address Valid to E = VIL,
o l
bs
tAVQV tACC 45 60 70 80 ns
Output Valid G = VIL

-O
Chip Enable Low
tELQV tCE G = VIL 45 60 70 80 ns
to Output Valid

tGLQV tOE
( s )
Output Enable Low
E = VIL 25 30 35 40 ns

ct
to Output Valid
Chip Enable High

du
tEHQZ(4) tDF G = VIL 0 25 0 30 0 30 0 30 ns
to Output Hi-Z

tGHQZ(4)
r o
tDF
Output Enable
E = VIL 0 25 0 30 0 30 0 30 ns

P High to Output Hi-Z

ete
Address Transition
E = VIL,
tAXQX tOH to Output 0 0 0 0 ns

o l Transition
G = VIL

b s 1. TA = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

O 3. Speed obtained with High Speed AC measurement conditions.

4. Sampled only, not 100% tested.

16/24
 M27C256B DC and AC parameters

Read mode AC characteristics 2(1) (2)

)

Table 10.
M27C256B
Test
Symbol Alt Parameter -90 -10 -12 -15/-20/-25 Unit
Condition
Min Max Min Max Min Max Min Max

Address Valid to E = VIL,

tAVQV tACC 90 100 120 150 ns
Output Valid G = VIL
Chip Enable Low
tELQV tCE G = VIL 90 100 120 150 ns
to Output Valid
Output Enable
tGLQV tOE Low to Output
Valid
E = VIL 40 50 60

( s )65 ns

tEHQZ(3) tDF
Chip Enable High
to Output Hi-Z
G = VIL 0 30 0 30 0 40

u
0
ct 50 ns

Output Enable
o d
Pr
tGHQZ(3) tDF High to Output E = VIL 0 30 0 30 0 40 0 50 ns
Hi-Z
Address
E = VIL,
e t e
ol
tAXQX tOH Transition to 0 0 0 0 ns
G = VIL
Output Transition

b s
1. TA = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC

3. Sampled only, not 100% tested.

- O
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

(s )
c t
d u
r o
e P
l e t
so
O b

17/24
DC and AC parameters M27C256B

Figure 8. Programming and Verify modes AC waveforms

A0-A14 VALID

tAVEL

Q0-Q7 DATA IN DATA OUT

tQVEL tEHQX

VPP

tVPHEL tGLQV tGHQZ

VCC

tVCHEL tGHAX

E
( s )
tELEH tQXGL

u ct
G

o d
PROGRAM
P r
VERIFY

e
AI00759

Table 11. Programming mode AC characteristics(1) (2)

l e t
o
bs
Test
Symbol Alt Parameter Min Max Unit
Condition

tAVEL tAS
- O
Address Valid to Chip Enable Low 2 µs

)
t(s
tQVEL tDS Input Valid to Chip Enable Low 2 µs
tVPHEL
tVCHEL
tVPS
tVCS
u c
VPP High to Chip Enable Low
VCC High to Chip Enable Low
2
2
µs
µs
d
ro
tELEH tPW Chip Enable Program Pulse Width 95 105 µs

e P
tEHQX tDH Chip Enable High to Input Transition 2 µs

let
tQXGL tOES Input Transition to Output Enable Low 2 µs
tGLQV tOE Output Enable Low to Output Valid 100 ns

s o tGHQZ tDFP Output Enable High to Output Hi-Z 0 130 ns

Ob tGHAX tAH Output Enable High to Address Transition 0 ns

1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V.
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

18/24
M27C256B Package mechanical

5 Package mechanical

Figure 9. FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window, package outline

A2 A3 A

A1 L α
B1 B e C
eA
D2
eB
D
S
N

( s )
∅ E1 E

u ct
d
1

o
FDIPW-a

1. Drawing is not to scale.

P r
Table 12.
package mechanical data
e te
FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"),

millimeters
o l inches
Symbol
Typ Min
b s Max Typ Min Max

O
)-
A 5.72 0.225

t(s
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3
u c 3.89 4.50 0.153 0.177
d
ro
B 0.41 0.56 0.016 0.022

e P
B1 1.45 – – 0.057 – –

let
C 0.23 0.30 0.009 0.012
D 36.50 37.34 1.437 1.470

s o D2 33.02 – – 1.300 – –

Ob E
E1
15.24 –
13.06 13.36
– 0.600
0.514
– –
0.526
e 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 16.18 18.03 0.637 0.710
L 3.18 4.10 0.125 0.161
S 1.52 2.49 0.060 0.098
∅ 7.11 – – 0.280 – –
α 4° 11° 4° 11°
N 28 28

19/24
Package mechanical M27C256B

Figure 10. PDIP28 - 28 pin Plastic DIP, 600 mils width, package outline

A2 A

A1 L α
B1 B e1 C
eA
D2 eB

D
S
N

E1 E

1
PDIP

( s )
u ct
d
1. Drawing is not to scale.

Table 13. PDIP28 - 28 pin Plastic DIP, 600 mils width, package mechanical data
r o
millimeters
e P inches
Symbol
Typ Min Max
l e t
Typ Min Max

A 4.445
s o 0.1750
A1 0.630

O b 0.0248

)-
A2 3.810 3.050 4.570 0.1500 0.1201 0.1799
B 0.450 0.0177
B1 1.270
t ( s 0.0500
c
du
C 0.230 0.310 0.0091 0.0122

ro
D 36.830 36.580 37.080 1.4500 1.4402 1.4598

e P
D2 33.020 – – 1.3000 – –

l e t E
E1
15.240
13.720 12.700 14.480
0.6000
0.5402 0.5000 0.5701

o
bs
e1 2.540 – – 0.1000 – –
eA 15.000 14.800 15.200 0.5906 0.5827 0.5984

O eB 15.200 16.680 0.5984 0.6567

L 3.300 0.1299
S 1.78 2.08 0.070 0.082
α 0° 10° 0° 10°
N 28 28

20/24
M27C256B Package mechanical

Figure 11. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package
outline
D A1
D1 A2

1 N
B1
E2

e
E3 E1 E F
B
0.51 (.020) E2

1.14 (.045)

D3 A

( s )
R CP

u ct
D2 D2
o d
Pr
PLCC-A

e
1. Drawing is not to scale.

e t
ol
Table 14. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package
mechanical data
millimeters
b s inches
Symbol
O
)-
Typ Min Max Typ Min Max

t(s
A 3.17 3.56 0.125 0.140
A1 1.53 2.41 0.060 0.095
A2
u c 0.38 – 0.015 –
d
ro
B 0.33 0.53 0.013 0.021

e P
B1 0.66 0.81 0.026 0.032

let
CP 0.10 0.004
D 12.32 12.57 0.485 0.495

s o D1 11.35 11.51 0.447 0.453

Ob D2
D3 7.62
4.78
–
5.66
– 0.300
0.188
–
0.223
–
E 14.86 15.11 0.585 0.595
E1 13.89 14.05 0.547 0.553
E2 6.05 6.93 0.238 0.273
E3 10.16 – – 0.400 – –
e 1.27 – – 0.050 – –
F 0.00 0.13 0.000 0.005
R 0.89 – – 0.035 – –
N 32 32

21/24
 Part numbering M27C256B

6 Part numbering

Table 15. Ordering information scheme

Example: M27C256B -70 X C 1 TR

Device Type
M27

Supply Voltage
C = 5V

( s )
ct
Device Function
256B = 256 Kbit (32Kb x 8)

d u
Speed
-45 (1)= 45 ns ro
-60 = 60 ns
e P
-70 = 70 ns
-80 = 80 ns
l e t
-90 = 90 ns
s o
-10 = 100 ns
-12 = 120 ns
O b
-15 = 150 ns
) -
(s
-20 = 200 ns
-25 = 250 ns

c t
VCC Tolerance
d u
blank = ± 10%
r o
P
X = ± 5%

e
l e t
Package
F = FDIP28W

s o B = PDIP28

O b C = PLCC32

Temperature Range
1 = 0 to 70 °C
3 = –40 to 125 °C
6 = –40 to 85 °C

Options
TR = Tape & Reel Packing
1. High Speed, see AC Characteristics section for further information.

For a list of available options (Speed, Package, etc) or for further information on any aspect
of this device, please contact the STMicroelectronics Sales Office nearest to you.

22/24
 M27C256B Revision history

7 Revision history

Table 16. Document revision history

Date Version Revision Details

July 1998 1.0 First Issue

20-Sep-2000 1.1 AN620 Reference removed
29-Nov-2000 1.2 PLCC codification changed (Table 15.)
02-Apr-2001 1.3 FDIP28W mechanical dimensions changed (Table 12.)
Package mechanical data clarified for PDIP28 (Table 13.),
29-Aug-2002 1.4

s )
PLCC32 (Table 14., Figure 11.) and TSOP28 (Table 15., Figure 13.)

(
ct
Document converted to new template (sections added, information
18-May-2006 2
moved).

d u
TSOP28 package removed. Packages are ECOPACK® compliant. X

o
option removed from Table 15: Ordering information scheme.
r
e P
l e t
s o
O b
) -
c t (s
d u
r o
e P
l e t
so
O b

23/24
 M27C256B

( s )
ct
Please Read Carefully:

d u
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the

r o
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time, without notice.
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Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no

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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this

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) -
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24/24
 M27C256B-10F1.

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