IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

5, MAY 2013 2285

Efficiency-Oriented Optimal Design of the LLC

Resonant Converter Based on Peak Gain Placement
Xiang Fang, Student Member, IEEE, Haibing Hu, Member, IEEE, Frank Chen, Student Member, IEEE,
Utsav Somani, Student Member, IEEE, Emil Auadisian, Student Member, IEEE, John Shen, Fellow, IEEE,
and Issa Batarseh, Fellow, IEEE

Abstract—The LLC resonant converter topology is widely used

in dc–dc converter applications due to its advantages in achieving
high efficiency and high power density. However, due to the com-
plexity in the analysis, the converter lacks a clear design guideline
on the selection of resonant tank parameters. In this paper, an opti-
mization method is developed based on the operation mode analysis
and peak gain placement. Following this approach, the converter
can minimize the conduction loss while maintaining the required
gain range. A 400-W, 400-V output and 25–38 V input LLC con-
verter is built using the proposed method, which achieves above
98% peak efficiency. As a comparison, the conventional searching Fig. 1. Full-bridge LLC resonant converter.
method is used to reselect the LLC parameters for the same specifi-
cations, and the experimental results show that the optimal design
has better performance.
Index Terms—Converter design, dc–dc power conversion,
optimization, resonant converter.

I. INTRODUCTION
O MEET the growing demand for smaller size and lower
T power losses in switched power supply applications, the
converter is pushed to operate in high frequency range, but the
switching loss has been a major obstacle to this pursuit. Many
converter topologies and techniques have been proposed and
developed to address this issue. Among them, the LLC resonant
Fig. 2. Voltage gain characteristic of the LLC with m = (L m +L r )/L r = 4,
dc–dc converter with the ZVS capability for a wide voltage gain where p o n = Po Zr /(nV o )2 is the normalized load power.
or load range is recognized as a favorable topology to achieve
both high operating frequency and high power efficiency [1]–[5].
As illustrated in Fig. 1, the resonant tank of an LLC con- converter exhibits improved dc characteristics over SRC with
verter has three L–C components: Lr and Cr in series, and increased gain range and ZVS operation region for vast load
Lm in parallel to the transformer primary-side input. The par- variations. A typical gain characteristic plot is shown in Fig. 2.
allel inductor is denoted as Lm for the reason that it is usually It can be seen that the gain
√ can rise above 1 below the resonant
implemented by the magnetizing inductor of the transformer. frequency (fr = 1/(2π Lr Cr )), and for the frequency above
For series resonant converters (SRC), the magnetizing inductor the peak gain points the converter can achieve ZVS [1]. Also,
not only exists but has much larger inductance than Lr , while all gain curves cross unity at the resonance (fs = fr ), and the
for LLC converters Lm has a comparable value with Lr and gain deviation caused by load variation around the resonance is
can participate in the resonance [6]. With the added Lm , the small. It indicates that the converter is capable of regulating for
a wide output load change with a relatively narrow switching
Manuscript received March 28, 2012; revised May 26, 2012 and July 15, frequency range if the operating point is set around the resonant
2012; accepted July 21, 2012. Date of current version November 22, 2012. point.
Recommended for publication by Associate Editor J. Choi. However, the LLC resonant behavior is complicated to an-
X. Fang, F. Chen, U. Somani, E. Auadisian, J. Shen, and I. Batarseh are with
the Department of Electrical Engineering and Computer Science, University alyze for its various operation modes [6]–[8]. The frequency-
of Central Florida, Orlando, FL 32826 USA (e-mail: fangx03@gmail.com; domain analysis method, fundamental harmonic approximation
Frankchen@eecs.ucf.edu; somani.utsav@gmail.com; auadisian@gmail.com; (FHA), is a commonly used simple method to obtain the volt-
johnshen@eecs.ucf.edu; Issa.Batarseh@ucf.edu).
H. Hu is with the Nanjing University of Aeronautics and Astronautics, Nan- age gain through solving the equivalent ac circuit of the res-
jing, 210016, China, and was also with the University of Central Florida from onant tank, but the accuracy is unsatisfying for practical de-
2009 to 2012, Orlando, FL 32826 USA (e-mail: huhaibing@163.com). sign [9]–[11]. Other approaches like state-plane or time-domain
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. analysis are based on the exact model of the converter to provide
Digital Object Identifier 10.1109/TPEL.2012.2211895 precise description of the circuit behavior, but they are usually
0885-8993/$31.00 © 2012 IEEE
2286 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 5, MAY 2013

not very intuitive to interpret and difficult to use [12]–[16]. Due

to lack of convenient analysis tools, previous design methods
often rely on circuit simulation or graphical design tools
[17]–[22]. Also, the existing optimal designs in choosing the
L–C components usually provide ranges or boundaries of the
values, but are not explicit about determining the parameters.
In this paper, a design method on finding the optimal set of the
L–C parameters is developed that minimizes the power losses
and meets the gain requirement.
Based on the operation mode analysis method in [6], the
precise converter waveforms can be solved and, therefore, can
be employed to study the waveform change trends with the
change of circuit parameters. The correlations between resonant
currents and L–C tank parameters are explored in this paper, and
a converter optimization criterion about minimizing the currents
is proposed. According to this criterion and design specification,
the peak gain point is designated as the key parameter in a
converter design as it indicates the max gain capability and the
lower limit of the switching frequency. By properly setting the
peak gain in the way that the LLC reaches its peak gain under the
full load and minimum switching frequency condition and this
peak value equals to the required gain for the minimum input
voltage, the optimal resonant tank design can be achieved. The
design procedure requires solving the peak gain of the LLC, of
which a numerical approximation given in [6] can be utilized to
facilitate the design.
To demonstrate the effectiveness of the proposed optimal de-
sign method, an LLC converter prototype is designed and built to
make a comparison with the conventional method; another set of
resonant parameters are reselected using the searching method.
The comparison shows that the optimal designed converter has
higher overall efficiency, whose peak efficiency reaches above
98%.

II. OPERATION ANALYSIS

The operation of the LLC converter varies in different modes
as the resonant tank formed by Lr , Cr , and Lm could shift
between different resonant stages, which are determined by the
switching frequency and load condition. As not all the modes
possess the ZVS capability or the wide gain range and therefore
some modes should be avoided in the converter’s operation,
we focus on the major operation modes which are preferable
in the converter operation rather than cover all the possible
modes. Fig. 3. Operation waveforms of the LLC in one switching cycle with m = 5,
When the switching frequency
√ is equal to the resonant fre- p o n = 0.6: (a) P mode (fn = 1), (b) PO mode (fn = 0.7), (c) PON mode (fn =
0.6).
quency (fs = fr = 1/(2π Lr Cr )), the LLC operates in the
simplest mode as there is only one single resonant stage, where
Lm is always clamped to the output and only Lr and Cr are
in resonance. The single stage is denoted as stage P in the half impedance of the resonant tank) can be expressed as
cycle where Q1 and Q3 are turned ON, and Q2 and Q4 turned ir P n (θ) = Ir P n sin(θ + θP 0 )
OFF; the resonant inductor current ir and capacitor voltage vC
are pure sinusoidal and the magnetizing current im is linearly im P n (θ) = Im P n + θ/(m − 1)
increasing and will form a triangle waveform for the whole cycle vC P n (θ) = −Ir P n cos(θ + θP 0 ) − 1 + 1/M (1)
as shown in Fig. 3(a). The normalized ir , im , vC in stage P of the
half cycle (the voltage variables are normalized by nVo , where where θ = 2πfr t, m = (Lm + Lr )/Lr , M = nVo /Vin ,
n is the transformer’s turns ratio; 
the current variables are nor- Ir P n is the normalized magnitude of the sinusoidal Lr cur-
malized by nVo /Zr , where Zr = Lr /Cr is the characteristic rent in stage P, θP 0 is the initial phase angle of ir P n , Im P n is
FANG et al.: EFFICIENCY-ORIENTED OPTIMAL DESIGN OF THE LLC RESONANT CONVERTER BASED ON PEAK GAIN PLACEMENT 2287

the initial Lm current when stage P starts, and the subscript P should not be lower than the peak gain point, or otherwise the
denotes that these variables are assigned for stage P. From the control loop will not be stable.
symmetry conditions, in one half cycle, the start value of ir , im , The peak gain point is the ZVS/ZCS boundary, where the res-
or vC is in opposite to its end value, which is onant current ir crosses zero at the switching instants. Applying
this zero current condition to mode equation, the peak gain and
ir P n (0) = −ir P n (π)
the corresponding load power can be solved. The peak gain
im P n (0) = −im P n (π) decreases as an inductor ratio m or load condition pon increases
The expressions of the resonant variables (ir , im , vC , vm ) in
vC P n (0) = −vC P n (π). (2)
stages N and O, and the boundary conditions for solving PO and
It can be derived that the normalized voltage gain is always PON mode equations are given in the Appendix.
equal to 1 (M = nVo /Vin = 1) and the current parameters of ir Under the zero-load condition, the converter will operate only
and im are given by in stage O as there is no energy delivery to the output. In this
 O mode, all input current is circulating in the resonant tank. To
π 1 avoid turning ON the rectifier, the voltage across the magnetiz-
Ir P n = p2on + (3)
2 (m − 1)2 ing inductor vm should be within the limit of ±nVo . This con-
π dition places constraint on the maximum input voltage, which
Im P n = − (4) can be expressed in terms of the normalized gain M as
2(m − 1)
nVO m−1
where pon = Po Zr /(nVo )2 is the normalized output load power. M= ≥ √ . (5)
V in m cos[π/(2 mfn )]
Because the unity gain is load-independent, the LLC converter
is often designed to work at resonance for the normal operation The inequality marks the lower limit of the gain under the
condition in order to narrow the operating frequency range [6], zero-load condition. The detailed derivation can be found in the
[13], [23]. Appendix.
As the switching frequency decreases below fr , a second
resonant stage denoted as stage O appears after stage P in the III. RESONANT CURRENTS ANALYSIS
half cycle, and the LLC moves into the PO operation mode
The L–C parameter configuration of the resonant tank is
[see Fig. 3(b)]. At the end of stage P, as ir and im converge
closely related to the resonant and magnetizing currents, and
and |vm |<nVo , the rectifier diodes are all turned OFF and the
mainly decides the conduction loss. By properly setting the in-
LLC enters stage O. In stage O, Lm and Lr , Cr are together
ductor and capacitor values, the optimal set can be achieved
in resonance; the output is cut off from the resonant tank; thus,
for minimal conduction losses. It is important to find out the
ir and im are equal and in sinusoidal wave shape. Because of
relation between L–C values and the currents.
the nonlinearity introduced in the mode equations by stage O,
The LLC operates in P mode when the switching frequency
there is no closed-form solution for ir , im , vC . However, with
is at the resonant point. In P mode, the resonant current ir is
the help of numerical software, the resonant variables and the
pure sinusoidal, of which the magnitude Ir P n is given by (3);
gain can be solved given the inductor ratio m and the switching
the magnetizing current im waveform is in triangle wave shape
frequency and load condition. From the analysis, it is found
with zero dc offset, and Im P n given by (4) is the negative peak
that the whole PO mode is within ZVS region, which greatly
value of the triangle wave. The RMS of the currents ir and im
reduces the switching loss of switching MOSFETs, and the volt-
are, therefore, given by
age gain in this mode increases monotonically with the decrease 
of switching frequency, which ensures the closed-loop stabil- π 1
ity [6]. In addition, since the output current remains zero during Ir RM Sn = √ p2on + (6)
2 2 (m − 1)2
stage O, the secondary-side diodes achieve the ZCS condition,
and hence, there is no reverse recovery loss when the switches π
Im RM Sn = √ . (7)
are switched. Therefore, PO mode is usually considered as the 2 3(m − 1)
major preferable operation mode.
The normalized RMS currents are related to the inductor ratio
If the load increases or the switching frequency decreases
m and the normalized load power pon . It appears that for a given
further, the LLC might have a third stage (stage N) after stage
load condition, the RMS currents will be lower if m increases,
O. At the end of stage O, as vm falls down to −nVo diodes
and so does the conductions loss. To denormalize the current
D2 and D3 are turned ON and Lm is clamped to −nVo . As
parameter, it should be multiplied by (nVo /Zr ); regarding the
shown in Fig. 3(c), the resonant tank current ir in stage N varies
load power, pon can also be denormalized in the similar manner.
sinusoidally below the linearly decreasing im . Before ir and im
Then, the actual RMS currents become
converge again, the half switching cycle ends with Q1 and Q3 
turned OFF. Since the output current is not zero at the switching π Po2 (nVo )2
instants, the secondary-side diodes have reverse recovery loss. Ir RM S = √ + (8)
2 2 (nVo ) 2 (m − 1)2 Zr2
Also, the gain–frequency relation is no longer monotonic—the
gain curve may reach its peak in this mode. Therefore, the π nVo
Im RM S = √ . (9)
converter may operate in this mode but the switching frequency 2 3(m − 1) Zr
2288 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 5, MAY 2013

Fig. 5. In /po n under different frequency and load conditions (m = 5).

Fig. 4. Normalized RMS currents under different frequency and load condi-
tions (m = 5).
comparing to the resonant current, as im indicates the base level
of the circulating current in the tank and is mainly determined
In a converter design, the output voltage is given as one of the by the clamped output voltage and the magnetizing inductance.
specifications. Thus, the actual RMS currents are also connected In order to analyze how different tank parameters affect the
to the transformer turns ratio n and the characteristic impedance power performance, the actual RMS currents for different con-
Zr . figurations should be compared under the same load power level.
When the converter is operating in other modes, there are no The actual current can be expressed as follows:
simple expressions for the RMS currents. The correlation be-
tween the currents and the circuit parameters is implicit. There- nVo Po In
I = In = . (11)
fore, the study of the currents and the interrelated resonant tank Zr nVo pon
configuration is carried out with recourse to the numerical com- The characteristic impedance is linked to the normalized load
puting tools. The precise current and voltage waveforms can be power by the following equation:
solved numerically from the mode equations using MATLAB,
(nVo )2
and hence, the RMS of these waveforms can be calculated. Zr = pon . (12)
From the current waveforms, the normalized RMS currents can Po
be expressed as follows: For the same load power and output voltage rating, Po and
  nVo are constants. Therefore, the actual current can be directly
π /f
Ir RM Sn = fπn 0 n i2r n dθ reflected by In /pon , and pon is proportional to Zr . The relation
  (10)
π /f between In /pon and fn is shown in Fig. 5. It can be observed that
Im RM Sn = fπn 0 n i2m n dθ.
for both ir and im , In /pon over a range of frequency is generally
The RMS currents for different load and frequency condi- smaller for an increased pon . In other words, the actual RMS
tions are plotted in Fig. 4 for a fixed m (= 5). It can be seen currents will decrease with larger tank impedance Zr . For a
that at the resonant point (fn = 1) ir ’s RMS is proportional certain load power and inductor ratio m, the LLC with a greater
to pon , while the magnetizing current im has the same RMS Zr value is beneficial as the conduction loss will be lower.
value, which match the description of (6) and (7); in the above- If we fix the normalized load power (pon = 0.6) and let
resonance (fn >1) region, Ir RM Sn is almost independent of the the inductor ratio m vary, another plot of the normalized RMS
frequency change, while Im RM Sn decreases at an increased fre- currents can be obtained as shown in Fig. 6. Since pon is fixed,
quency but is independent of the pon differences; in below- the normalized currents here can indicate the actual current level.
resonance (fn <1) region, Ir RM Sn increases as the frequency It can be seen that both RMS currents, Ir RM Sn and Im RM Sn ,
decreases at first but may reach the peak and starts to decreases will decrease as m increases over the entire frequency changing
slowly, while Im RM Sn generally increases with the frequency range.
decreasing but the changing rate varies for different loads. Gen- From the aforementioned discussion, the resonant tank
erally, the magnetizing current is less affected by the load change configuration and current correlation is revealed. Generally
FANG et al.: EFFICIENCY-ORIENTED OPTIMAL DESIGN OF THE LLC RESONANT CONVERTER BASED ON PEAK GAIN PLACEMENT 2289

For a specified operation frequency range above the peak

gain point, the gain increases monotonically with the decrease
of frequency or load as shown in Fig. 2. It indicates that at
the minimum frequency the converter shows its max gain ca-
pability, whereas the converter reaches its lowest gain at the
maximum frequency. From the design perspective, it requires
that the converter is capable of dealing with the lowest Vin con-
dition at the lowest frequency and the highest Vin condition at
the highest frequency. As regarding to different load conditions,
the gain curve at full load has the lowest gain comparing to other
lighter load condition for the same frequency, and if the gain
requirement for min Vin is met under full load, the converter
can automatically regulate the output at any other load condi-
tion. Under the zero-load condition, the lower boundary of the
gain given in placeholder the highest gain comparing to other
heavier load condition for the same frequency, and therefore the
zero-load boundary gain should be low enough for the max Vin
condition.
In general, the LLC design should meet the following two
criteria: the gain under the maximum frequency and zero-load
condition is low enough for the maximum input voltage; the gain
under the minimum frequency and full-load condition should
be high enough for the minimum input. Therefore, the required
max gain can be expressed by the minimum and maximum input
voltages as

Vin m ax
Mm ax,req = Mm ax,full = Mm in,0
Vin m in
Fig. 6. Normalized RMS currents under different frequency and load condi-
tions (p o n = 0.6). Vin m ax m−1
= √ (13)
Vin m in m cos[π/(2 mfn m ax )]
speaking, the RMS currents would be lower as well as the
where Mm ax,full is the max gain at full load and minimum fn ,
conduction losses if the inductor ratio m or the characteristic
and Mm in,0 is the lower gain limit at zero load and max fn .
impedance Zr is increased. In the LLC design, this relationship
After knowing the required gain range, we can find the reso-
is very useful in guiding the L–C selecting to improve the power
nant tank that gives the maximum allowable (m−1)Zr . Its max-
efficiency. However, the design specifications will put more con-
imum can be achieved by properly setting the peak gain point
straints on the resonant tank setting like the input voltage range
position of a normalized gain curve equal the required max gain
or the frequency variation range, and these restraints should be
defined by (13) at fn m in and then letting the corresponding pon
taken into account with the L–C and ir , im relation to get the
of the curve equal to the normalized full-load power. The rea-
optimal design.
son for such peak gain placement is that the increase of inductor
ratio m or load pon results in a lower gain curve. (Note that
IV. PEAK GAIN PLACEMENT DESIGN
pon is proportional to Zr for a given Vo and Pfull as referred
In the LLC design, one major consideration is to maximize the to (12).) In other words, the peak gain will be lower than the
efficiency while satisfying the gain requirement for the specified required for a bigger (m−1)Zr . To explain this correlation, a
input voltage range. It is found from the operation analysis partially enlarged gain plot is shown in Fig. 7 as an example. It
that the RMS currents of ir and im at resonant frequency are can be seen that increasing pon (i.e., Zr ) will reduce the peak
inversely proportional to (m−1)Zr if Vo and fr are specified. gain and increase the peak gain frequency, while increasing m
Although the RMS currents do not hold when the frequency will decrease the peak gain and frequency.
is below fr , Lm/n can still be used as a parameter to roughly In summary, the peak gain point placement method is por-
indicate the RMS value of im or ir , which will decrease if trayed in Fig. 8. The gain curve examples in Fig. 8 are obtained
(m−1)Zr increases. Hence, increasing (m−1)Zr can reduce the under the following configurations: m = 6.3, pon full = 0.48,
circulating current and therefore reduce the conduction loss. fn m in = 0.57, fn m ax = 1.14.
However, the converter with a bigger m value has a lower voltage The peak gain point information can be extracted from the
gain. There is a tradeoff between minimizing the conduction loss PON mode equations and the peak gain condition, and further-
and maintaining the desired gain range. The goal of the optimal more, the peak gain approximation method in [6] can apply here
design is to find the maximum (m−1)Zr under the gain and to facilitate the design procedure. The required max gain in (13)
frequency range limitation. is a function of m, whereas the peak gain is also a function of m
2290 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 5, MAY 2013

Fig. 7. DC gain curves near the peak (marked with asterisks) for different m
and p o n .

Fig. 9. Peak gain placement design procedure.

TABLE I
LLC PROTOTYPE CIRCUIT COMPONENTS
Fig. 8. Peak gain point placement method for the optimal design.

for a given fn m in . Therefore, an equation of m can be obtained

by letting Mm ax,req equal Mpk , from which the inductor ratio
m can be solved.
After determining m, the turns ratio can then be calculated
by n = Mm in,0 Vinm ax /Vo , or n = Mm ax,full Vinm in /Vo . The cor-
responding normalized load pon at the peak gain can then be
obtained from the peak-gain-and-load correlation, which is as-
signed as the normalized power for the full-load condition, since
for a larger pon the peak gain will be lower than the required
max gain. With the obtained m and pon , the circuit components’ 38 V, the operating frequency range is from 80 to 160 kHz,
parameters are given as and the resonant frequency is set to 140 kHz. From (5) and
(12), the inductor ratio is solved as m = 6.33. The normalized
(nVo )2 pon 1
Lr = , Cr = , Lm = (m − 1)Lr . peak gain at full load is equal to 1.5, and therefore, the turns
2πfr Pfull (2πfr )2 Lr ratio can also be calculated by the following expression: n =
(14)
Mm ax,full Vinm in /Vo = 0.0938. The corresponding load condition
This optimization procedure is illustrated in Fig. 9, in which
for the peak gain point is calculated as pon = 0.48, which is
it can be seen that it is a straightforward flow without recursive
designated as the normalized full load. Therefore, the resonant
loop. This peak gain setting method focuses on optimizing the
tank parameters can be calculated by (13) as follows: Lr =
converter configuration under the full-load condition. For a wide
1.91 μH, Cr = 676 nF, and Lm = 10.2 μH.
range of Vin , the gain range is one major concern in the con-
verter design, and since the full-load condition gives the lowest
gain range, it can be considered as the worst case scenario. In V. EXPERIMENTS
addition, the converter’s output current is also at its maximum To demonstrate the optimal design method, the 400-W, 400-V
level at full load, and causes more conduction losses. If the de- output full-bridge LLC converter with 25–38 V input voltage
sign meets all the specifications at full load within the assigned range was built. Following the proposed procedure, the cir-
frequency region, the converter in all other conditions will qual- cuit parameters are designed and chosen as follows: n = 5:55,
ify automatically. Also, by improving the efficiency of full-load Lr = 1.9 μH, Cr = 680 nF, Lm 1 = 10 μH. The switching
operation, the converter will benefit from the LLC configuration MOSFETs, rectifier diodes, and other key circuit components
for other lesser load conditions. of the converter circuit are listed in Table I.
As an example, we designed a 400-W, 400-V output rating Some samples of the experimental waveforms in different Vin
LLC converter prototype. The input voltage varies from 25 to and load conditions are shown in Fig. 10, which are in line with
FANG et al.: EFFICIENCY-ORIENTED OPTIMAL DESIGN OF THE LLC RESONANT CONVERTER BASED ON PEAK GAIN PLACEMENT 2291

Fig. 11. Step load response of the LLC prototype (top channel: V o , mid
channel: ir , bottom channel: V Q 3 ). (a) V in = 30 V, load step-up from 25 to
400 W. (b) V in = 30 V, load step-down from 400 to 25 W.

Fig. 12. LLC converter prototype efficiency at different input voltages.

the operation mode descriptions. Also, the load step response

waveforms are shown in Fig. 11. The power efficiency is mea-
sured using a power analyzer at different input voltage levels and
load conditions, and the results are shown in Fig. 12. Note that
the driving loss is not included in the measured efficiency data,
which is about 0.5 W depending on the switching frequency.
The efficiency for a higher input voltage level is higher for the
same load power, since according to the law of power balance
the input average current is reduced for an increased Vin and so
does the conduction loss.
As a comparison, we design another group of parameters
with a preset smaller resonant capacitance Cr = 470 nF. Thus,
Lr is also determined as the resonant frequency is fixed, and
Fig. 10. Sample experimental waveforms of the LLC converter prototype. Lm is the only undetermined L–C parameter. A larger Lm is
(a) V in = 25 V, P o = 0 W. (b) V in = 25 V, Po = 400 W. (c) V in = 38 V, Po
= 0 W. (d) V in = 38 V, Po = 400 W.
2292 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 5, MAY 2013

TABLE II
LLC RESONANT TANK PARAMETER COMPARISON

Fig. 14. Denormalized resonant currents comparison at V in = 25 V, P o =

400 W for one cycle: (a) ir 1 ,im 1 (solid lines) with proposed optimal design
parameters; (b) ir 2 ,im 2 (dash lines) with reduced C r parameters.

Fig. 13. Gain plots at full-load and zero-load conditions for the two design:
(a) with proposed optimal design parameters; (b) with reduced C r parameters.
Fig. 15. Power loss breakdown of the LLC converter at V in = 35 V:
(a) proposed optimal design; (b) reduced C r design.
preferable in design, as the resonant current level is lower and
thus the efficiency is higher. But the gain will be lower at a
larger Lm and may fail the gain requirement for the design. ment design methodology. All other circuit components remain
Therefore, a maximum Lm exists. To make it a fair comparison, the same. The new LLC resonant tank parameters are compared
the one-parameter swept searching method is used: we swept with the proposed optimal parameters in Table II.
the magnetizing inductance value and verified it by circuit simu- To verify the comparison designs, the gain curves for the two
lation software to see if it met the max gain requirement in order sets of parameters are plotted in Fig. 13. Note that the normal-
to find the max Lm . Since Lm = (m−1)Lr = (m−1)Zr /ω r , the ized full-load powers for the two designs are different, as Lr and
maximization of Lm is the same as increasing (m−1)Zr as high Cr are different for the two designs and pon = Po Zr /(nVo )2 .
as possible, which is the optimal target of the peak gain place- For the optimal design, pon = 0.51 at full load; for the reduced
FANG et al.: EFFICIENCY-ORIENTED OPTIMAL DESIGN OF THE LLC RESONANT CONVERTER BASED ON PEAK GAIN PLACEMENT 2293

the core loss as a smaller magnetizing current im indicates a

narrower current variation through the transformer. Therefore,
it is universally beneficial for either the conduction loss or core
loss to have the current reduced. To demonstrate this, we plot
the power loss breakdown for the two sets of parameters at Vin
= 35 V from simulation as shown in Fig. 15. The core loss is
estimated using curve-fitting and the datasheet of 3C95 (the core
material). It can be seen that the conduction loss is dominant,
and the optimal design has lower losses.
The efficiency curves of the two designs are plotted in Fig. 16.
Although the two designs have comparable efficiency under the
low input voltage condition, the LLC converter with optimal
parameters outperforms the reduced-Cr one at high Vin . At
heavy load, the efficiency curves for the two sets of parameter are
converged, while the performance advantages for optimal design
are mostly shown under the medium and light-load conditions.
It is because the magnetizing current im is mainly determined by
Lm and less affected by the load power, and im is the dominant
portion accounting for the conduction loss at light load. Since
the optimal LLC resonant tank has a higher Lm , the efficiency
improvement appears in the light-load region. It can be seen that
the LLC with optimal parameters has generally higher efficiency
than the other design, especially in mid- and low-load regions.
The peak efficiency of the LLC prototype achieves above 98%.

VI. CONCLUSION
In this paper, an optimal design procedure for the LLC reso-
nant converter is presented, which is by settling the peak voltage
gain for the required max gain for the full-load and minimum
switching frequency condition. The peak gain is obtained based
on the operation mode analysis. The major operation modes that
possess the ZVS capability and control stability are examined
and the mode condition for the peak gain point is specified in the
analysis. In addition, the influence of varying the resonant circuit
parameters on the RMS currents in the resonant tanks is studied
and discussed to corroborate the proposed design optimization.
The design method was implemented in the experimental pro-
totype and compared with other parameters obtained from the
searching method, whose results verify the analysis and show
that the optimal design has better performance.

Fig. 16. Efficiency comparison at different input voltages: (a) V in = 25 V,

(b) V in = 30 V, (c) V in = 35 V.

APPENDIX
Cr design, pon = 0.73 at full load. The gain requirements for
The normalized resonant current and voltage expressions of
both designs are the same as Mm ax,req ≥nVo /Vinm in = 1.455 (n
Stage N are as follows:
= 1/11 for both). It can be seen that the two designs satisfy the
gain requirement.
Also, as an example, the denormalized resonant currents ir ,
im at Vin = 25 V, Po = 400 W condition for both designs are ir N n (θ) = Ir N n sin(θ + θN 0 )
plotted in Fig. 14.
im N n (θ) = Im N n − θ/(m − 1)
It is clearly seen that the optimal design has a lower resonant
current level. The design with larger m and pon (or Zr ) has lower vC N n (θ) = −Ir N n cos(θ + θN 0 ) + 1 + 1/M. (A1)
currents and thus lower conduction loss. Also, it helps reduce
2294 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 5, MAY 2013

The normalized resonant current and voltage expressions of Equations (A3) and (A7)–(A10) are sufficient to solve all the
Stage O are as follows: unknown parameters and gain, provided fn and pon .
√ The peak gain zero current condition is
ir O n (θ) = im O n (θ) = Ir O n sin(θ/ m + θO 0 )
√ √ ir P n (0) = ir N n (θN ) = 0. (A11)
vC O n (θ) = − mIr O n cos(θ/ m + θO 0 ) + 1/M
m−1 √ With the added peak gain condition (A11), the peak gain and
vm O n (θ) = √ Ir O n cos(θ/ m + θO 0 ). (A2) the other unknowns can be solved without knowing pon . The
m
power balance condition (A9) can be used as an expression to
PO mode boundary conditions: calculate the corresponding pon at the peak gain point.
The continuity conditions between stages P and O are The O mode (zero-load) boundary conditions are as follows:
ir P n (θP ) = ir O n (0) ir O n (0) = −ir O n (π/fn )
im P n (θP ) = ir O n (0) vC O n (0) = −vC O n (π/fn ). (A12)
vC P n (θP ) = vC O n (0). (A3) Note that θO = π/fn as stage O is the only stage in the half
cycle. To prevent entering stage P or N, the constraint condition
The symmetry conditions of the half switching cycle are
on vm is |vm |<nVo . By substituting (A2) into (A7) and applying
ir P n (0) = −ir O n (θO ) the vm constraint, the gain limit for zero load can be expressed
as
im P n (0) = −im O n (θO )
m−1
vC P n (0) = −vC O n (θO ). (A4) M≥ √ . (A13)
m cos[π/(2 mfn )]
The power balance condition is If input voltage exceeds the limit, the converter will not be
 able to maintain in O mode at the same output voltage level.
fn θ P
pon = (ir P n − im P n )dθ. (A5)
π 0 REFERENCES
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[15] N. H. Kutkut, C. Q. Lee, and I. Batarseh, “A generalized program for Frank Chen (S’11) received the B.S. degree in elec-
extracting the control characteristics of resonant converters via the state- trical engineering from Tongji University, Shanghai,
plane diagram,” IEEE Trans. Power Electron., vol. 13, no. 1, pp. 58–66, China, in 1999. He is currently working toward the
Jan. 1998. Ph.D. degree in electrical engineering at the Univer-
[16] J. H. Cheng and A. F. Witulski, “Analytic solutions for LLCC parallel sity of Central Florida, Orlando.
resonant converter simplify use of two-and three-element converters,” He worked with Delta Power Electronics Center,
IEEE Trans. Power Electron., vol. 13, no. 2, pp. 235–243, Mar. 1998. Shanghai, China as a research and development engi-
[17] B. Lu, W. Liu, Y. Liang, F. C. Lee, and J. D. van Wyk, “Optimal design neer from 2001 to 2005. In 2006, he joined the STMi-
methodology for LLC resonant converter,” in Proc. IEEE Appl. Power croelectronics Greater China as a senior application
Electron. Conf. Expo., Mar. 2006, vol. 2, p. 6. engineer. His research interests cover the modeling
[18] T. Liu, Z. Zhou, A. Xiong, J. Zeng, and J. Ying, “A novel precise de- and design of DC/DC converters, renewable energy,
sign method for LLC series resonant converter,” in Proc. 28th Annu. Int. and soft switching techniques. He holds one US. Patent. He has authored and
Telecommun. Energy Conf.,, 2006, pp. 1–6. coauthored more than ten technical papers published in journals and conference
[19] X. Xie, J. Zhang, C. Zhao, Z. Zhao, and Z. Qian, “Analysis and opti- proceedings.
mization of LLC resonant converter with a novel over-current protection
circuit,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 435–443, Mar.
2007.
[20] C. Oeder, A. Bucher, J. Stahl, and T. Duerbaum, “A comparison of differ-
ent design methods for the multiresonant LLC converter with capacitive
output filter,” in Proc. IEEE COMPEL Conf., Jun. 2010, pp. 1–7.
[21] G. Ivensky, S. Bronshtein, and A. Abramovitz, “Approximate analysis of
resonant LLC DC–DC converter,” IEEE Trans. Power Electron., vol. 26, Utsav Somani (S’11) received the B.S. degree in
no. 11, pp. 3274–3284, Nov. 2011. electronics engineering from the University of Pune,
[22] M. P. Foster, C. R. Gould, A. J. Gilbert, D. A. Stone, and C. M. Bingham, Maharashtra, India, in 2010. He is curently working
“Analysis of CLL voltage-output resonant converters using describing toward his doctorate in Electrical Engineering with
functions,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1772–1781, specialization in Power Electronics at the University
Jul. 2008. of Central Florida, Orlando.
[23] B.-C. Kim, K.-B. Park, C.-E. Kim, B.-H. Lee, and G.-W. Moon, “LLC He is a Research Assistant with Florida Power
resonant converter with adaptive link-voltage variation for a high-power- Electronics Center, University of Central Florida,
density adapter,” IEEE Trans. Power Electron., vol. 25, no. 9, pp. 2248– where he is engaged in the prototyping DC/DC con-
2252, Sep. 2010. verters and DC/AC inverters. His research interests
include applications of DC/DC converters in renew-
able energy and hybrid electric vehicles.

Xiang Fang (S’11) received the B.S. degree in elec- Emil Auadisian (S’07) received the B.S. degree in electronics engineering from
trical engineering from Tsinghua University, Beijing, Princess Sumaya University for Technology, Amman, Jordan, in 2009. He is
China, in 2007. He is curently working toward the currently working toward the Ph.D. degree in power electronics at the University
Ph.D. degree in power electronics from the Univer- of Central Florida, Orlando.
sity of Central Florida, Orlando. He is a Research Assistant with Florida Power Electronics Center, University
He is a Research Assistant with Florida Power of Central Florida, where he is engaged in designing a communication scheme
Electronics Center, University of Central Florida, between PV micro-inverter. His research interests include renewable energy
where he is engaged in the modeling and design of conversion, and power electronics.
DC/DC resonant converters. His research interests
include renewable energy conversion, DC/DC con-
version, and resonant power conversion.

Z. John Shen (S’90–M’94–SM’02–F’11) received

the B.S. degree in electrical engineering from Ts-
inghua University, Beijing, China, in 1987, and the
M.S. and Ph.D. degrees in electrical engineering from
Haibing Hu (M’09) received the B.S. degree from Rensselaer Polytechnic Institute, Troy, NY, in 1991
Hunan University of Technology, China, in 1995, the and 1994, respectively.
M.S and Ph.D. degrees in electrical engineering from Between 1994 and 1999, he held a number of tech-
Zhejiang University, China, in 2003 and 2007, re- nical positions, including Senior Principal Staff Sci-
spectively. entist with Motorola Semiconductor Products Sec-
From 2007 to 2009, he was an Assistant Professor tor, Phoenix, AZ. Between 1999 and 2004, he was
in the Department of Control Engineering, Nanjing with the University of Michigan-Dearborn, Dearborn.
University of Aeronautics and Astronautics, where Since 2004, he has been with the University of Central Florida, Orlando, where
he is currently an Associate Professor. From 2009 he is currently a Professor of electrical engineering, the Director of the Power
to 2012, he joined the Department of Electrical En- Semiconductor Research Laboratory, and the Associate Director of Florida
gineering, University of Central Florida as a Post- Power Electronics Center. His current research interests include power semi-
Doctoral Research Fellow. His research interests cover digital control in power conductor devices and integrated circuits, power electronics, automotive elec-
electronics, multilevel inverter, digital control system integration for power elec- tronics, nanotechnology, and renewable-energy systems. He has authored or
tronics andapplying power electronics to distributed energy systems and power coauthored over 100 journal and referred conference publications. He is the
quality. He has authored and coauthored more than 70 technical papers pub- holder of 12 issued and several pending or provisional U.S. patents. He is the
lished in journals and conference proceedings. inventor of the worlds first submilliohm power metaloxidesemiconductor field-
effect transistor.
2296 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 5, MAY 2013

Dr. Shen served as an Associate Editor of the IEEE TRANSACTIONS ON Issa Batarseh (F’06) received the B.S.E.E. degree
POWER ELECTRONICS between 2006 and 2009. He served as the Technical Pro- in electrical and computer engineering, and the M.S.
gram Chair of the second IEEE Energy Conversion Congress and Expo in 2010, and Ph.D. degrees in electrical engineering, in 1983,
the 38th IEEE Power Electronics Specialists Conference in 2007, and the first 1985, and 1990, respectively, all from the University
IEEE Vehicle Power and Propulsion Conference in 2005. He currently serves of Illinois, Chicago.
as the Vice President of Products of the IEEE Power Electronics Society. He He is currently a Professor of electrical engi-
has also served on numerous IEEE conference and workshop organizing com- neering with the School of Electrical Engineering
mittees, and international editorial boards. He is a recipient of the 2003 U.S. and Computer Science, University of Central Florida
National Science Foundation CAREER Award, the 2006 Transaction Prize Pa- (UCF), Orlando, FL. From 1989 to 1990, he was a
per Award of the IEEE TRANSACTIONS ON POWER ELECTRONICS from the IEEE Visiting Assistant Professor with Purdue University,
Power Electronics Society, the 2003 IEEE Best Automotive Electronics Paper Calumet, IN before joining the Department of Elec-
Award from the IEEE TRANSACTIONSONS ON VEHICULAR TECHNOLOGY, and trical and Computer Engineering, UCF, in 1991. His research interests include
the 1996 Motorola Science and Technology Award. power electronics, developing high-frequency energy conversion systems to
improve power density, efficiency, and performance, the analysis and design of
high-frequency solar and wind energy conversion topologies, and power factor
correction techniques. He is the author or coauthor of more than 60 refereed
journals and 300 conference papers in addition to 14 U.S. patents. He is also an
author of a textbook entitled Power Electronic Circuits (New York: John Wiley,
2003).
Dr. Batarseh is a Registered Professional Engineer in the State of Florida
and a Fellow Member of IEE. He has served as a Chairman for IEEE PESC07
conference and was the Chair of the IEEE Power Engineering Chapter, and the
IEEE Orlando Section.