Duration: 60 min Digital Electronics Branch: EE 2022-26

Commonly used Memory

Chips, ROM as a PLD

Submitted To: Submitted By:

Michael Carter Sameer
Memory and Programmable Logic

Memory Device:

Device to which binary information is transferred for storage, and

from which information is available for processing as needed.

Memory Unit:
Memory unit is a collection of cells capable of storing a
large quantity of binary information.

In digital systems, there are two types of memories:

1. RAM
2. ROM
 Memory and Programmable Logic

1. Random – Access Memory (RAM)

RAM is the place in a computer where the operating system , application programs, and
data in current use are kept so that they can be quickly reached by the computer's
processor.

2. Read-Only Memory (ROM)

ROM is a type of memory that is as fast as RAM, but has two important differences: It
can not be changed, and it retains its contents even when the computer is shut off. It is
generally used to start your computer up and load the operating system.

Using a ROM as a PLD: A programmable logic device or PLD is an electronic component

used to build digital circuits . Before the PLD can be used in a circuit it must be
programmed.
Examples of PLDs : programmable logic array (PLA), programmable array logic (PAL),
and field-programmable logic gate array (FPGA). (PAL: Program. AND, fixed OR, PLA:
Program. AND/OR)
Random- Access Memory
Memory unit: Stores binary information in groups of bits called words.

Memory word: group of 1’s and 0’s and may represent a number, character(s), instruction, or other
binary-coded information.

Most computer memories use words that are multiples of 8 bits (byte ).
32-bit word -> 4 bytes
Random- Access Memory
Each word in memory is assigned an address 0 up to 2𝑘 – 1 (k = # of address lines).

Fig: Content of a 1024 X 16 Memory

RAM: Write and Read Operations

To transfer a new word to be stored into memory:

1. Apply the binary address of the word to address lines.
2. Apply the data bits that must be stored in memory to the data input lines.
3. Activate the write input.

To transfer a stored word out of memory:

1. Apply the binary address of the word to address lines.
2. Activate the read input.
Memory Types

Integrated circuit RAM units are available in two possible operating modes: static and dynamic.

Static RAM (SRAM) consists of internal latches that store the binary information. The stored
information remains valid as long as power is applied to the unit.

Dynamic RAM (DRAM) stores the binary information in the form of electric charges on capacitors
provided by the MOS transistors. The charge on the capacitors tends to decay with time and the
capacitors must be periodically recharged by refreshing of the dynamic memory every few milliseconds.

• DRAM offers reduced power consumption, large integration of units on chip.

• SRAM is faster; has shorter read and write cycles, SRAM is used in cache. Disadvantages: high power
consumption, low density, expensive.
Physical size of memory decreases

Memory access time increases

Memory Hierarchy
Volatile vs Non-Volatile Memory

• RAM (static and dynamic) is said to be volatile, since information is lost when
power is turned off.
• Non-volatile memory retains its information even when power is turned off.

1. Magnetic disks: stored data is represented by the direction of magnetization.

2. CD: compact disc is a piece of polycarbonate (a type of plastic) on which a spiral
track has been impressed. This spiral track is a series of indentations ("pits")
separated by flat areas ("land").
3. ROM: The internal storage elements are set to their values once and after that
are only read.
EPROMS and PROMS

Erasable Programmable Read-Only Memory (EPROM) is a special type of memory

that retains its contents until it is exposed to ultraviolet light.

To write to EPROM, you need a special device called a PROM Programmer or PROM
burner (programmer). An EPROM differs from a PROM in that a PROM can be written
to only once and cannot be erased.

EPROMs are widely used in personal computers since they enable the manufacturer
to change the contents of the PROM before the computer is actually shipped. This
means that bugs can be removed and new versions installed shortly before delivery.
EEPROMS and FLASH

Electrically Erasable Programmable Read-Only Memory (EEPROM), is like EPROM

except that the previously programmed connections can be erased with an electrical
signal.

Flash memory is a type of EEPROM. Information stored in flash memory is usually

written in blocks rather than a byte or word at a time.

Virtual Memory?
With virtual memory, the computer can look for areas of RAM that have not been
used recently and copy them onto the hard disk. This frees up space in RAM to load
the new application. Because it does this automatically, you don't even know it is
happening, and it makes your computer feel like is has unlimited RAM space even
though it has only 1 GB installed
RAM Memory Cell

Fig: Memory Cell

The storage part of the cell is modeled by an SR latch with associated gates.

A 1 in the read/write input provides the read operation by forming a path from the
latch to the output. A 0 in the read/write input provides the write operation by
forming a path from the input to latch.
4 X 4 RAM

Fig: Diagram of a 4 X 4 RAM

WRITE operation: the data available in the input lines are transferred into the four
binary cells of the selected word. The memory cells that are not selected are disabled.
READ Operation: the four bits of the selected word go through OR gates to the output
terminals.
Commercial RAM

Commercial RAM -> thousands of words, with each word 1 - 64 bits.

A memory with 2𝑘 words of n bits/word requires k address lines that go into a
k x 2𝑘 decoder.

Fig: Diagram of a 4 X 4 RAM

Two Dimensional Decoding

The idea of two-dimensional decoding is to arrange the memory cells in an array that
is as close as possible to square. Use two k/2-input decoders instead of one k-input
decoder. One decoder performs the row selection and the other the column selection
in a two dimensional matrix configuration.

Fig: Two-Dimensional structure for a 1k-Words Memory

Read-Only Memory (ROM)

Read-only memory is a memory device in which permanent binary information is

stored.

Fig: ROM Block Diagram

The number of words in a ROM is determined from the k address input lines needed
to specify the 2𝑘 words.
Read-Only Memory (ROM)

A 32 x 8 ROM consists of 32 words of 8 bits each. The five input lines are decoded by
into 32 distinct outputs (memory addresses) using a 25 x 8 decoder. Each OR gate has
32 input connections -> 32 x 8 ROM has internal connections 32 x 8. In general,
a 2𝑘 x n ROM will have k x 2𝑘 decoder and n OR gates with 2𝑘 x n internal
connections.

Fig: Internal logic pf 32 X 8 ROM

Read-Only Memory (ROM)

A programmable connection (a crosspoint) between two lines is logically equivalent to

a switch that can be closed (two lines are connected) or open (two lines are
disconnected). A switch can be a fuse that normally connects the two points, but can
be opened by blowing the fuse using a high voltage pulse.

Fig: Internal logic pf 32 X 8 ROM

Programming Read-Only Memory

Fig: Programming the ROM

Output 𝐴6 can be expressed in sum of min terms

as: 𝐴6 (𝐼4 , 𝐼3 , 𝐼2 , 𝐼1 , 𝐼0 ) = σ (2,...,29,30)
Constructing 256K X 8 RAM

1. How many 64K x 8 RAM chips are needed to provide a memory

capacity of 256KB?
2. How many lines of the address must be used to access 256K bytes?
How many of these lines are connected to the address inputs of all
chips?
3. How many lines must be decoded for the chip select inputs of all
chips?
64K X 8 RAM Chip

Capacity: 64K words of 8 bits each

Fig: 64K X 8 RAM

How many chips are needed to construct 256K x 8?

What is the size of the decoder?

256K X 8 RAM Chip
8

• We can put four 64K x 8 chips

together to make a 256K x 8 16

memory.
• For 256K words, we need 18
address lines.
➢ The two most significant
address lines go to the
decoder, which selects one of
the four 64K x 8 RAM chips.
➢ The other 16 address lines
are shared by the 64K x 8
chips.
• The 64K x 8 chips also share WR
and DATA inputs.
• This assumes the 64K x 8 chips
have three-state outputs. 8

Fig: 256K X 8 RAM

256K X 8 RAM Chip
8

• There are 256K words of memory,

spread out among the four smaller 16

64K x 8 RAM chips.

• When the two most significant bits
of the address are 00, the bottom
RAM chip is selected. It holds data
for the first 64K addresses.
• The next chip up is enabled when
the address starts with 01. It holds
data for the second 64K addresses.
• The third chip up holds data for the
next 64K addresses.
• The final chip contains the data of
the final 64K addresses.

Fig: 256K X 8 RAM

32 X 8 ROM Chip
128 X 8 ROM Chip
Programmable Logic Device(PLD)

Programmable logic devices (PLD) are designed with configurable logic

and flip-flops linked together with programmable interconnect.

PLDs provide specific functions, including

• Device-to-device interfacing.
• Data communication
• Signal processing
• Data display
• Timing and control operations, and almost every other function a
system must perform
Programmable Logic Device(PLD)