8051 microcontroller

18EC46
 Course Outcomes (Cos):

Course Outcomes

C306.1 Describe the architectural features of 8051 microcontrollers, Memory organisation and external memory interfacing..

C306.2
Understand the addressing modes of 8051,Instruction set and to write assembly programs

C306.3
Apply the knowledge of stack and subroutines in writing assembly programs involving loops and to interface LED switch.

C306.4
Analyze timer and counter operations of 8051 and write assembly and c progarm for serial communication.

C306.5
Describe interrupt operations and to write assemble program to interface ADC,LCD,stepper motor to 8051.
 CO-PO mapping
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2

C306.1
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C306.2
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C306.3
3 3 3

C306.4
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C306.5

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 OUTLINE
Module -1 8051 Microcontroller:
Microprocessor Vs Microcontroller, Embedded
Systems, Embedded Microcontrollers, 8051
Architecture- Registers, Pin diagram, I/O ports
functions, Internal Memory organization.
External Memory (ROM & RAM) interfacing.
 Microcontroller vs. General Purpose
Microprocessor
• General-purpose microprocessors contains
• No RAM
• No ROM
• No I/O ports ‰
• Microcontroller has
• CPU (microprocessor)
• RAM ,ROM, I/O ports, Timer, ADC and
other peripherals
Choosing a Microcontroller
Overview of 8051 microcontroller
Block diagram
Registers
PSW register
Register banks
PIN DIAGRAM
INTERNAL MEMORY ORGANIZATION
Internal memory organization..
 Memory Capacity
• The number of bits that a semiconductor
memory chip can store
– Called chip capacity
• It can be in units of Kbits (kilobits),
Mbits (megabits), and so on
– This must be distinguished from the storage
capacity of computer systems
• While the memory capacity of a memory IC
chip is always given bits, the memory capacity
of a computer system is given in bytes
– 16M memory chip – 16 megabits
– A computer comes with 16M memory – 16
megabytes
 Memory Organization
• Memory chips are organized into a
number of locations within the IC
– Each location can hold 1 bit, 4 bits, 8 bits, or
even 16 bits
• The number of locations within a memory IC
depends on the address pins
• The number of bits that each location can hold is
always equal to the number of data pins
– A memory chip contain 2x location, where x is the
number of address pins
– Each location contains y bits, where y is the number of
data pins on the chip
– The entire chip will contain 2x × y bits
 Speed
• One of the most important characteristics of
a memory chip is the speed at which its data
can be accessed
– To access the data, the address is presented
to the address pins
– The READ pin is activated
• After a certain amount of time has elapsed, the data
shows up at the data pins
• The shorter this elapsed time, the better, and
consequently, the more expensive the memory chip
– The speed of the memory chip is
commonly referred to as its access time
 ROM (Read-only Memory)
• ROM is a type of memory that does not
lose its contents when the power is
turned off
– ROM is also called nonvolatile memory
– There are different types of read-only
memory
• PROM
• EPROM
• EEPROM
• Flash EPROM
• Mask ROM
 PROM (Programmable ROM)
• PROM refers to the kind of ROM that the
user can burn information into
– PROM is a user-programmable memory
• For every bit of the PROM, there exists a fuse
• If the information burned into PROM is wrong,
that PROM must be discarded since its internal
fuses are blown permanently
• PROM is also referred to as OTP (one-time
programmable) Programming ROM, also called
burning ROM
• It requires special equipment called a ROM
burner or ROM programmer
EPROM (Erasable Programmable ROM)
• EPROM was invented to allow making changes
in the contents of PROM after it is burned
– In EPROM, one can program the memory chip and
erase it thousands of times
– A widely used EPROM is called UVEPROM
• UV stands for ultra-violet
– They have a window that is used to shine ultraviolet (UV)
radiation to erase its contents
• The only problem with UV-EPROM is that erasing its
contents can take up to 20 minutes
EPROM (Erasable Programmable ROM)
(cont.)
• To program a UV-EPROM chip, the following
steps must be taken:
– Its contents must be erased
• Removed from its socket on the system board
• Placed in EPROM erasure equipment to expose it to
UV
radiation for 15-20 minutes
– Program the chip
• Place it in the ROM burner
– To burn code or data into EPROM, the ROM burner uses
12.5 volts, Vpp, or higher, depending on the EPROM type
– Place it back into its system board socket
EPROM (Erasable Programmable ROM)
(cont.)
• There is an EPROM programmer (burner)
• There is also separate EPROM erasure equipment
– The major disadvantage is that it cannot be
programmed while in the system board
• Notice the pattern of the IC numbers
– Ex. 27128-25 refers to UV-EPROM that has a capacity
of 128K bits and access time of 250 nanoseconds
– 27xx always refers to UV-EPROM chips
 EEPROM (Electrically Erasable
Programmable ROM)
• EEPROM has several advantage:
– Its method of erasure is electrical and instant
• As opposed to the 20-minute erasure time required for
UVEPROM
– One can select which byte to be erased
• In contrast to UV-EPROM, in which the entire contents
of ROM are erased
– One can program and erase its contents while it is
still in the system board
• The designer incorporate into the system board the
circuitry to program the EEPROM
 Flash Memory EPROM
• Flash EPROM has become a popular user-
programmable memory chip since the
early 1990s
– The process of erasure of the entire contents
takes less than a second, or might in a flash
• The erasure method is electrical
• It is commonly called flash memory
– The major difference between EEPROM and
flash memory is
• Flash memory’s contents are erased, then the
entire device is erased
 Flash Memory EPROM (cont.)
– There are some flash memories are recently made so
that the erasure can be done block by block
• One can erase a desired section or byte on
EEPROM
• It is believed that flash memory will
replace part of the hard disk as a mass
storage medium
– The flash memory can be programmed while
it is in its socket on the system board
– Widely used as a way to upgrade PC BIOS
ROM
 Flash Memory EPROM (cont.)
– Flash memory is semiconductor memory
with access time in the range of 100 ns
• Compared with disk access time in the
range of
tens of milliseconds
– Flash memory’s program/erase cycles must
become infinite, like hard disks
• Program/erase cycle refers to the number of
times that a chip can be erased and programmed
before it becomes unusable
• The program/erase cycle is 100,000 for flash and
EEPROM, 1000 for UV-EPROM
 RAM (Random Access Memory)
• RAM memory is called volatile memory
– Since cutting off the power to the IC will result in the
loss of data
– Sometimes RAM is also referred to as RAWM (read
and write memory)
• In contrast to ROM, which cannot be written to
• There are three types of RAM
– Static RAM (SRAM)
– NV-RAM (nonvolatile RAM)
– Dynamic RAM (DRAM)
 SRAM (Static RAM)
• Storage cells in static RAM memory are
made of flip-flops
– They do not require refreshing in order to
keep their data
– The problem with the use of flip-flops for
storage cells is:
• Each cell require at least 6 transistors to
build, and the cell holds only 1 bit of data
• In recent years, the cells have been made of 4
transistors, given birth to a high-capacity SRAM
– Still too many
– Its capacity is far below DRAM
 NV-RAM (Nonvolatile RAM)
• It combines the best of RAM and ROM
– The read and write ability of RAM, plus
the nonvolatility of ROM
– NV-RAM chip internally is made of the following
components
• It uses extremely power-efficient SRAM cells built out
of CMOS
• It uses an internal lithium battery as a backup energy
source
• It uses an intelligent control circuitry
– The main job of this control circuitry is to
monitor the Vcc pin constantly to detect loss of the
external power supply
 Memory Address Decoding
• The CPU provides the address of the data
– It is the job of the decoding circuitry to locate
the selected memory block
– Memory chips have one or more pins called
CS (chip select)
• Must be activated for the memory’s contents to
be accessed
• Sometimes the chip select is also referred to
as chip enable (CE)
• In connecting a memory chip to the CPU,
note the following points:
Memory Address Decoding (cont.)
– The data bus of the CPU is connected directly
to the data pins of the memory chip
– Control signals RD (read) and WR (memory
write) from the CPU are connected to the OE
(output enable) and WE (write enable) pins
of the memory chip
– In the case of the address buses:
• The lower bits of the address from the CPU
go directly to the memory chip address pins
• The upper ones are used to activate the CS pin of
the memory chip
Memory Address Decoding (cont.)
• Memories are divided into blocks
– The output of the decoder selects a given
memory block
• Using simple logic gates
• Using the 74LS138
• Using programmable logics
• The simplest way of decoding circuitry is
the use of NAND or other gates
– The output of a NAND gate is active low
– The CS pin is also active low
• Makes them a perfect match
 Using 74LS138 3-8 Decoder
• This is one of the most widely used
address decoders
– The 3 inputs A, B, and C generate 8 active-
low outputs Y0 – Y7
– Each Y output is connected to CS of a
memory chip
• Allowing control of 8 memory blocks by a
single 74LS138
– A, B, and C select which output is activated
• There are three additional inputs, G2A, G2B, and
G1
– G2A and G2B are both active low, and G1 is active
high
 Using 74LS138 3-8 Decoder (cont.)
• If any one of the
inputs G1, G2A, or
G2B is not
connected to an
address signal,
they must be
activated
permanently either
by Vcc or ground
– Depending on
the activation
level
 Using Programmable Logic
• Other widely used decoders are
programmable logic chips
– Such as PAL and GAL chips
• One disadvantage of these chips is that one must have
access to a PAL/GAL software and burner
– The 74LS138 needs neither of these
• The advantage of these chips is that they are much
more versatile since they can be programmed for any
combination of address ranges
 Interfacing External ROM
• The 8031 chip is a ROMless version of the
8051
– It is exactly like any member of the 8051
family as far as executing the instructions and
features are concerned
• It must be connected to external ROM memory
containing the program code
– 8031 is ideal for many systems where the on-
chip ROM of 8051 is not sufficient
• Since 8051 allows the program size to be as large
as 64K bytes
 EA Pin
• For 8751/89C51/DS5000-based system,
connect the EA pin to Vcc
– To indicate that the program code is stored
in the
microcontroller’s on-chip ROM
• To indicate that the program code is stored in
external ROM, EA must be connected to GND
 P0 and P2 in Providing Address
• 8031/51 is capable of accessing up to 64K
bytes of program code
– Since the PC (program counter) is 16-bit
– In the 8031/51, port 0 and port 2 provide the
16-bit address to access external memory
• P0 provides the lower 8 bit address A0 – A7
• P2 provides the upper 8 bit address A8 – A15
– P0 is also used to provide the 8-bit data bus
D0 – D7
• P0 is used for both the address and data paths
– Address/data multiplexing
 ALE Pin
• ALE (address latch enable) pin is an
output pin for 8031/51
– ALE = 0, P0 is used for data path
– ALE = 1, P0 is used for address path
• To extract the address from the P0
pins
– Connect P0 to a 74LS373
– Use the ALE pin to latch the address
• Normally ALE = 0, and P0 is used as a
data bus
– Sending data out or bringing data in
• To use P0 as an address bus, it puts the
addresses A0 – A7 on the P0 pins and activates
 PSEN Pin
• PSEN (program store enable) signal is an
output signal for the 8031/51
– It must be connected to the OE pin of a ROM
containing the program code
• When the EA pin is connected to GND, the
8031/51 fetches opcode from external ROM by
using PSEN
• In systems based on the 8751/89C51/
DS5000 where EA is connected to Vcc
– These chips do not activate the PSEN pin
• The on-chip ROM contains program code
 Data Memory Space
• 8051 has 128K bytes of address space
– 64K bytes are set aside for program code
• Program space is accessed using the
program counter (PC) to locate and fetch
instructions
• We can place data in the code space
– Used the instruction MOVC A,@A+DPTR to get data,
where C stands for code
– The other 64K bytes are set aside for data
• The data memory space is accessed using the
DPTR register and an instruction called
MOVX
– X stands for eXternal – The data memory space must
be implemented externally
 External ROM for Data
• We use RD to connect the 8031/51
to external ROM containing data
– For the ROM containing the program code,
PSEN is used to fetch the code
 External Data RAM
• To connect the 8051 to an external SRAM,
we must use both RD (P3.7) and WR
(P3.6)
• In writing data to external data RAM, we
use the instruction MOVX @DPTR,A
Single External ROM for Code and Data
• An 8031-based system connected to a single
64K×8 (27512) external ROM chip
– The single external ROM chip is used for both program
code and data storage
• For example, the space 0000 – 7FFFH is allocated to program
code
• Address space 8000H – FFFFH is set aside for data
• In accessing the data, we use the MOVX instruction
– To allow a single ROM chip to provide both
program code space and data space, we use an
AND gate to signal the OE
A15

64K×8
 Interfacing to Large External Memory
• In some applications we need a large amount
of memory to store data
– The 8051 can support only 64K bytes of external
data memory since DPTR is 16-bit
– To solve this problem
• Connect A0 – A15 of the 8051 directly to the
external
memory’s A0 – A15 pins
• Use some of the P1 pins to access the 64K bytes
blocks inside the single 256K×8 memory chip
 References

1. “The 8051 Microcontroller and Embedded Systems – using assembly and C”,
Muhammad Ali Mazidi and Janice Gillespie Mazidi and Rollin D.
McKinlay; PHI, 2006 / Pearson, 2006.

2.“The 8051 Microcontroller”, Kenneth J. Ayala, 3rd Edition, Thomson/Cengage