CAUVERY INSTITUTE OF TECHNOLOGY
ELECTRONICS AND COMMUNICTAION ENGINEERING DEPARTMENT
Python Programming for Machine Learning Applications
[BEC657D]
6th SEMESTER,
EVEN 2025
Prepared by
TEJASWINI H S
Assistant Professor
Dept. of ECE
CIT, Mandya
ELECTRONICS AND COMMUNICTAION ENGINEERING
DEPARTMENT
CAUVERY INSTITUTE OF TECHNOLOGY
ELECTRONICS AND COMMUNICTAION ENGINEERING DEPARTMENT
INDEX
Expt. No. Title of Experiments Page No.
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Experiment No: 1
Aim: Design and test a high-level collect or Modulator circuit and Demodulation the signal using
diode detector.
Apparatus Required:
Sl. No Components Quantity
1 Transistor SL100 01
2 Resistor 22KΩ(pot), 47KΩ 01
3 Capacitor:1µF,0.1µF 03
4 Inductor 01
5 Breadboard Connecting wire 01
6 CRO(40MHz),Signal generator(1MHz), DC supply(30V) 01
Circuit Diagram of AM:
Circuit Diagram Demodulator:
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Waveforms:
where, A=Vmax and B= Vmin
From Vmax−Vmin
waveform modulation index, μ is given by μ=
Vmax +Vmin
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Design:
The amplitude modulation definition is, amplitude of the carrier signal is proportional to (in
accordance with) the amplitude of the input modulating signal.
Amplitude modulation (AM) in a tuned amplifier circuit using a bipolar junction transistor(BJT)
involves varying the amplitude of an input signal to carry information. The BJT acts as an
amplifier, and the tuned circuit filters out unwanted frequencies, leaving only the desired
modulated signal. By adjusting the biasing of the BJT, the modulation depth can be controlled,
allowing for faithful reproduction of the modulating signal. Overall, the tuned amplifier circuit
amplifies the modulated signal while filtering out noise and unwanted frequencies, enabling
efficient transmission or reception of modulated signals.
The detector is a demodulator, It recovers the original signal (what was the modulating signal at
the transmitter end) from the received AM signal. The detector consists of a simple half-wave
rectifier which rectifies the received AM signal. This is followed by a low pass filter which
removes (bypasses) the high-frequency carrier waveform the received signal. The resultant
output of the low pass filter will be the original input (modulating) signal.
Tabular Column:
Fc= Hz, Fm= Hz
Vmax Vminin Modulation
V −V
Index Amplitude of Amplitude of
max min Vmax−Vmin Vmax+Vmin
in Volts μ=
V +V Vm= V c=
volts 2 2
max min
Note: Make sure Amplitude of carrier signal Vc is constant
Procedure
1. Rig up the circuit as shown in the figure.
2. Set the amplitude of c(t)=2Vp and m(t)=2Vp using different signal generator.
3. Set the frequency of m(t)=100Hz&c(t)=1KHz to get the AM wave.
4. Note down the Vmax &Vmin.
5. Calculate the modulation index µ along with values of Vm&Vc
6. Repeat step number 4 and 5 for various value of Vmax &Vmin by varying
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amplitude of modulating signal m(t).
Result: Design and verification of Amplitude modulation and demodulation circuit is done and
recorded the values.
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ExperimentNo: 2
Aim: Test the Balanced Modulator/Lattice Modulator (Diode ring)
Apparatus Required:
Sl No Components Quantity
1 D1,D2,D3,D4-0A79or1N914 04
2 Two-trifler-winding Transformers 1:2 turns ratio Hexa-Path Magnetics 02
transformer with either HP3, HP4, HP5, or HP6 winding layout is needed
3 Breadboard, Connecting wire 01
4 CRO(40MHz), Signal generator(1MHz),DC supply(30V) 01
Circuit Diagram:
Waveforms:
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Theory:
A Diode Ring Modulator, also known as a Lattice Modulator, is a type of balanced modulator
commonly used in electronic communications. Its primary function is to produce double-
sideband suppressed-carrier (DSBSC) signals, which involve suppressing the radio frequency
carrier while preserving the sum and difference frequencies at the output. This modulation
technique allows for efficient transmission of information while conserving power.
The Diode Ring Modulator typically consists of four diodes arranged in a ring configuration,
hence the name "ring modulator."These diodes are interconnected in such a way that they form a
closed loop or ring structure. The input signals, usually the carrier signal and the modulating
signal, are applied to opposite pairs of diodes in the ring.
The output waveform of the Diode Ring Modulator lacks the carrier signal but contains all the
information present in traditional amplitude modulated (AM) signal. This makes it an efficient
means of transmitting information, especially in applications where power saving is crucial.
Procedure
1. Connections are made as shown in figure
2. Apply modulating signal (Sine Wave Vm=2Vp)with frequency fm=1KHz,andcarrier signal
(Square Wave Vmc = 3Vp) with frequency fc = 10KHz (fc = 10fm).
3. Observe the phase reversal of180oat each Zero Crossing modulating signal in the output
DSBSC signal.
Result: Balanced Modulator using Diode ring is tested.
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Experiment No: 3
Aim: Design a Frequency modulator using VCO and FM demodulator using PL L(UseIC566
and IC565)
Apparatus Required:
Sl No Components Quantity
1 PLL565 01
2 Resistor,12K,12K,1KΩ 01
3 Capacitor:10uF,0.01uF,0.01uF 01
4 Breadboard, Connecting wire 01
5 CRO(40MHz),Signal generator(1MHz), DC supply(30V) 01
Circuit Diagram:
Modulation Demodulation
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TabularColumn
Acin(v) Amin (v) FmaxinHz FmininHz ∆f mi
Theory
Procedure
1. Setup the FM generator circuit and apply 5Vpp, 1KHz sine wave input and observe
the output.
2. Note maximum and minimum frequency fmax and fmin of FM output. Calculate
frequency deviation ∆ f =f max −f min . Calculate the modulation index mi=∆ f /f m
where f mis modulating signal frequency.
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3. Setup FM demodulator and apply the FM signal to it. Observe the demodulated output.
Result: Frequency Modulation and demodulation circuit using PLL is verified.
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Experiment No:4
Design and plot the frequency response of Pre-emphasis and De-emphasis Circuit
Aim: Design and plot the frequency response of Pre-emphasis and De-emphasis Circuits
Theory
The pre-emphasis and de-emphasis help to improve the quality of any communication especially audio
signals on the transmitter and receiver sides. The presence of noise is also an issue in FM and we know
that noise usually has higher amplitude and higher frequency. When the amplitude of a high-frequency
noise is higher than the current component in the modulation signal, it causes high-frequency interference.
To deal with this issue, most FM circuits use a technique called pre-emphasis during transmission and de-
emphasis during receiving. Pre-emphasis and de-emphasis circuits are commonly used in FM transmitters
and receivers to improve the output signal-to-noise ratio. The pre-emphasis circuit is actually a high pass
filter and de-emphasis circuit a low pass filter. The amount of pre-emphasis and de-emphasis used is
defined by the time constant of a simple RC filter circuit. Simple pre-emphasis and de-emphasis circuits
using op-amp are given in the diagram
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Tabular Column
Frequency Fin Hz Output VoltageVo Output=20log(Vo
in Volts
100
200
Procedure
1 Test all the components and probes.
2 Setup the pre-emphasis circuit on a breadboard as shown in figure.
3 Feed a sine wave as input=1V.
4 Vary the frequency from100Hzto100KHz on step of 500Hz and noted own the values of the
corresponding output voltage on a tabular column.
5 Plot frequency response on a graph sheet with log f on x-axis and gain in dB on y axis.
6 Mark the cut-off frequencies corresponding to 3dB points.
7 Repeat the above steps for de-emphasis circuit.
Result: Designed and verified and plotted the frequency response of Pre-emphasis and De-emphasis
Circuit
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Experiment No: 5
Aim: Design and test BJT/FET Mixer
Apparatus Required:
Sl No Components Quantity
1 TransistorSL100 01
2 Resistors 47K,10K,470, 2.2K,22K,10KΩ 01
3 Capacitors:1uF, 47uF,4.7uF,47uF, 0.01uF 01
4 Breadboard Connecting wire -
5 CRO(40MHz), Signal generator(1MHz), DC supply(30V) -
Circuit Diagram:
Design:
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Note: Choose coupling capacitors in such way that Reactance of coupling capacitors Xc1 and Xc5 should be
less than 15Ω
Tabular Column
FrequncyF1inHz FrequencyF2inHz Output frequency∆f=f1−f2inHz
16Hz 14Hz
16Hz 13Hz
16Hz 12Hz
16Hz 11Hz
16Hz 10Hz
16Hz 09Hz
Theory
In electronics, a mixer, or frequency mixer, is an electrical circuit that creates new frequencies
from two signals applied to it. In its most common application, two signals are appliedto a mixer,
and it produces new signals at the sum and difference of the original frequencies. Active mixers
use an amplifying device (such as a transistor or vacuum tube) that may increase the strength of
the product signal. Active mixers improve isolation between the ports, but may have higher noise
and more power consumption. Mixers may also be classified by their topology:
An unbalanced mixer, in addition to producing a product signal, allows both input signals
to pass through and appear as components in the output.
A single balanced mixer is arranged with one of its inputs applied to a balanced
(differential) circuit so that either the local oscillator (LO) or signal input (RF) is
suppressed at the output, but not both.
A double balanced mixer has both its inputs applied to differential circuits, so that neither
of the input signals and only the product signal appears at the output.[1] Double balanced
mixers are more complex and require higher drive levels than unbalanced and single
balanced designs.
Procedure
1. Connections are made as shown in the circuit diagram.
2. Apply the input signals as mentioned in the circuit diagram.
3. Observe the output waveform sin CRO
4. Measure the output frequency, it has to be equal to∆f=f1−f2
5. Repeatthesteps3 and 4 bydecreasingfrequencyofV2in the stepof1KHz.
Result: BJT frequency Mixer is designed and tested.
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ExperimentNo:6
Aim: Design and test Pulse sampling, flattop sampling and reconstruction
Apparatus Required:
Sl No Components Quantity
1 n-EMOSFET(TRS740),OP-AMP(μA741) 1
2 Resistor22KΩ,10KΩ(POT),47KΩ 1
3 Breadboard, connecting wires 1
4 CRO, Function Generator and DC Supply 1
5 Capacitor 0.1uF(Electrolyte) 1
Circuit Diagram
Pulse sampling circuit diagram
Reconstruction of Pulse sampling circuit diagram
Design: Sampling circuit is a voltage follower circuit and assume uA741output current is20 mA
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hence assume R and RL value is to assume 1K to 10KΩ as per availability.
Reconstruction circuit: consider frequency of message signal as fm=100Hz and this is the cutoff
frequency of LPF. Choose C=0.1uFand find R using fm=1/2πRC
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Reconstruction of Flattop sampling
Design : Sampling circuit is a voltage follower circuit and assume uA741 output current is 20 mA hence
assume R and RL value is toassume1Kto10KΩas per availability and C electrolyte capacitor of 0.1uF.
Reconstruction circuit: consider frequency of message signal as fm=100Hz and this is the cutoff
frequency of LPF.
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Waveforms
Pulse sampling Flattop sampling
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Theory
The sampling theorem can be defined as the conversion of an analog signal into a discrete form
by taking the sampling frequency as twice the input analog signal frequency. Input signal
frequency denoted by Fm and sampling signal frequency denoted by Fs. If the sampling
frequency (Fs) equals twice the input signal frequency (Fm), then such a condition is called the
Nyquist Criteria for sampling. When sampling frequency equals twice the input signal frequency
is known as “Nyquist rate”. If the sampling frequency (Fs) is less than twice the input signal
frequency, such criteria called an Aliasing effect.
In flat-top sampling or rectangular r pulse sampling, the top of the samples remains constant and
is equal to the instantaneous value of the baseband signal x(t) at the start of sampling. During
transmission, noise is introduced at top of the transmission pulse which can be easily removed if
the pulse is in the form of flat top. Here, the top of the samples are flat i.e. they have constant
amplitude. Hence, it is called as flat top sampling or practical sampling. Flat top sampling makes
use of sample and hold circuit.”
Procedure
1. Before wiring the circuit checks all the components using multimeter.
2. As per design set the values and do the connections as shown in circuit diagram.
3. Set the carrier amplitude or sampling signal to around 4Vp and frequency, fs= 1KHz.
4. Set the message signal amplitude to around 2Vp and frequency, fm=100 HZ.
5. Connect the CRO at the pin number 6 of OP-AMP and observe the waveform for both circuits.
6. Connect this output to there construction filter and observe the waveforms.
Result: Pulse sampling, flattop sampling and reconstruction circuits tested andVerified.
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Experiment No:7
Aim: Design and test Pulse amplitude modulation and demodulation.
Apparatus Required:
Sl No Components Specification
1 Transistor SL100
2 Resistor 22K,10K,47K
3 Capacitor 0.1µF
4 Breadboard Connecting wire
5 CRO(40MHz),Signal generator(1MHz), DC supply(30V)
Circuit diagram
Pulse Amplitude Modulation Circuit
Demodulation circuit
Waveforms
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Theory:
Pulse amplitude modulation is a technique in which the amplitude of each pulse is controlled by
the instantaneous amplitude of the modulation signal. It is a modulation system in which the
signal is sampled at regular intervals and each sample is made proportional to the amplitude of
the signal at the instant of sampling. This technique transmits the data by encoding in the
amplitude of a series of signal pulses. In PAM, the signal amplitudes can be changed based onthe
modulating signal. The pulse train works like a periodic switching signal toward the modulator.
Once it is switched ON, and then allows the samples of modulating signals to supply toward the
output. The pulse train’s periodic time is called the sampling period.
PAM is mostly applied in non-based modulating transmission of digital data and applications
replaced by pulse-code modulation and pulse-position modulation. Particularly all phone
modems faster than 300 bit/s use quadrature amplitude modulation.
Procedure
1. Before wiring the circuit checks all the components using Multimeter.
2. As per design set the values an other connections as shown in circuit diagram.
3. Set the pulsed carrier amplitude to around 5V(p-p) and frequency, fs=1 KHz.
4. Set the message signal amplitude to around 3V(p-p) and frequency, fm=100KHZ.
5. Check the modulated and demodulated output waveform.
Result: Pulse Amplitude Modulation circuit and its reconstruction circuit tested and verified.
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Experiment No: 8
Aim : Generation and Detection of Pulse position Modulation
Apparatus Required:
Sl No Components Quantity
1 Op-AmpµA741 02
2 555Timer 01
3 Resistor,10K,10K,10K,10K,18K 01
4 Capacitor0.1uF 01
5 Breadboard, Connecting wire -
6 CRO(40MHz),Signal generator(1MHz), DC supply(30V) 01
7 Diode1N4007 01
Circuit Diagram
Pulse Position Modulation Circuit
Op Amp IC Diagram 555Timer IC diagram
Design of Summing amplifier for PWM and PPM
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Assume R1=R2=Rf= 10KΩ because resistor value in an op-amp adder circuit helps maintain
high input impedance, ensures unity gain for each input. Higher input impedance is generally
desirable because it minimizes the loading effect on the input sources, allowing them to deliver
their signals with minimal distortion.
Design of 555 timer
Here555timerfunctionasmonostablemultivibratorwehaveT =1.1RC=1.1×18K×0.01 μ=198 μSec
For Triggering circuit RiCi<<0.0016Tt,where Tt is the time period of signal
choose Ri = 10K Ohms and Ci = 0.01uF
Waveform of PWM and PPM
Theory
Pulse width modulation (PWM) is a method of changing the duration of a pulse with
respect to the analog input. The duty cycle of a square wave is modulated to encode a
specific analog signal level. The PWM signal is digital because at any given instant
of time, the full DC supply is either ON or OFF completely. One input of the
comparator is fed by the input message or modulating signal and the other input by a
saw tooth signal which operates at carrier frequency. Considering both ±ve sides, the
maximum of the input signal should be less than that of saw tooth signal. The
comparator will compare the two signals together to generate the PWM signal at its
output as shown in the third waveform
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The PWM pulses obtained at the comparator output are applied to a monostable multivibrator.
The monostable is negative edge triggered. Hence, corresponding to each trailing edge of PWM
signal, the monostable output goes high. It remains high for a fixed time decided by its own RC
components. Thus, as the trailing edges of the PWM signal keep shifting in proportion with the
modulating signal m(t), the PPM pulses also keep shifting, as shown in Waveform of PWM and
PPM
Procedure
a. Make the connection as per Circuit diagram.
b. Set the M(t)=2VpandC(t)=2Vp amplitudes using different signal generator.
c. Vary the frequency of M(t)=100HzandC(t)=1KHz and adjust until we get proper output.
d. Observe the PWM output waveforms.
e. After getting PWM then the output of PWM is fed to triggering input of IC555timer to
result is PPM.
f.The output is taken at terminal 3 of timer 555IC.
g. The wave is observed on CRO and T off is noted during + Ve & - Ve peak of message
signal M(t).
Result: The output of the Pulse Position Modulation circuits using op amp and555timers is
verified.
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Experiment No: 9
Aim: Generation and Detection of Pulse width Modulation
Apparatus Required:
Sl No Components Quantity
1 Op-AmpµA741 02
2 555Timer 01
3 Resistor,10K,10K,10K,10K,18K 01
4 Capacitor0.1uF 01
5 Breadboard, Connecting wire -
6 CRO(40MHz),Signal generator(1MHz),DCsupply(30V) 01
7 Diode1N4007 01
Circuit Diagram
Pulse width Modulation Circuit
Op Amp IC Diagram 555 Timer IC diagram
Design of Summing amplifier for PWM and PPM
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CAUVERY INSTITUTE OF TECHNOLOGY
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Assume R1=R2=Rf= 10KΩ because resistor value in an op-amp adder circuit helps maintain
high input impedance, ensures unity gain for each input. Higher input impedance is generally
desirable because it minimizes the loading effect on the input sources, allowing them to deliver
their signals with minimal distortion.
Design of 555 timer
Here555timerfunctionasmonostablemultivibratorwehaveT =1.1RC=1.1×18K×0.01 μ=198 μSec
For Triggering circuit RiCi<<0.0016Tt,where Tt is the time period of signal
choose Ri = 10K Ohms and Ci = 0.01uF
Waveform of PWM and PPM
Theory
Pulse width modulation (PWM) is a method of changing the duration of a pulse with
respect to the analog input. The duty cycle of a square wave is modulated to encode a
specific analog signal level. The PWM signal is digital because at any given instant
of time, the full DC supply is either ON or OFF completely. One input of the
comparator is fed by the input message or modulating signal and the other input by a
saw tooth signal which operates at carrier frequency. Considering both ±ve sides, the
maximum of the input signal should be less than that of saw tooth signal. The
comparator will compare the two signals together to generate the PWM signal at its
output as shown in the third waveform
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The PWM pulses obtained at the comparator output are applied to a monostable multivibrator.
The monostable is negative edge triggered. Hence, corresponding to each trailing edge of PWM
signal, the monostable output goes high. It remains high for a fixed time decided by its own RC
components. Thus, as the trailing edges of the PWM signal keep shifting in proportion with the
modulating signal m(t), the PPM pulses also keep shifting, as shown in Waveform of PWM and
PPM
Procedure
a. Make the connection as per Circuit diagram.
b. Set the M(t)=2Vp and C(t)=2Vp amplitudes using different signal generator.
c. Vary the frequency of M(t)=100Hz and C(t)=1KHz and adjust until we get proper output.
d. Observe the PWM output waveforms.
e. After getting PWM then the output of PWM is fed to triggering input of IC555 timer to
result is PPM.
f.The output is taken at terminal 3 of timer 555IC.
g. The wave is observed on CRO and Toff is noted during +Ve & -Ve peak of message signal
M(t).
Result: The output of the Pulse width Modulation circuits using opamp and 555timers is
verified.
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Experiment No: 10
Aim: PLL Frequency Synthesizer
Apparatus Required:
Sl No Components Quantity
1 CRO, Function Generator, Breadboard 1
2 Resistance:12K, 1
3 Capacitor:0.001uF,10uFand0.01uF 1
4 RPS and connecting wires 1
Theory:
A frequency synthesizer is an electronic circuit used to generate precise and stable output
frequencies based on a reference frequency or multiple reference frequencies. It's widely used in
communication systems, radar systems, and various electronic devices. A frequency synthesizer
generates an output frequency by combining and manipulating the frequency of one or more
reference signals using various techniques such as phase-locked loops (PLLs), direct digital
synthesis (DDS), or fractional-N synthesis. Initially, the PLL is unlocked, and the output
frequency may differ from the reference frequency. The phase detector compares the phases of
the reference and output signals, generating an error voltage proportional to the phase difference.
The LPF filters and smoothes this error voltage to provide a DC voltage that represents the
frequency error. This voltage is then fed to the VCO, which adjusts its frequency in response to
minimize the phase error. As the loop continues to operate, the PLL locks, maintaining a stable
phase and frequency relationship between the reference and output signals.
Circuit Diagram
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Nature of Graph
Procedure
1. Set up the circuit and observe the output at pin4 or pin5 and noted own the VCO frequency.
It is the free running frequency f0 without any input signal.
2. Apply a signal input to pin2 either as in or square wave of 5Vpp,1KHz and vary its
frequency from low to high and note down fc1 and fL2.
3. Decrease the input frequency from a high value to low value and noted own fc2andfL1
4. Mark the obtained value on straight line. calculate lock range fL=fL2 -fL1and capture range
fc = fc2 – fc1
Result:
Free running frequency, f0 = Hz,
Lock Range fL = Hz
Capture Range fc = H
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Experiment No: 11
Data for matting and Line Code Generation
Aim: to design and generate Data formatting and Line Code Generation
Theory
Line coding is the process of converting digital data to digital signals. Serial data is to handle by
customized protocols like SPI, I2C etc. These protocols are usually based on line codes. The most
common types of line encoding are NRZ (Non-Return to Zero), Manchester code, AMI (Alternate Mark
Inversion) etc. Unipolar: presence of pulse represents a 1 and the absence of pulse represents a 0 Polar: a
High in data is represented by a positive pulse, while a Low in data is represented by a negative pulse.
Bipolar Signaling : which has three voltage levels namely +, -and 0. Such a signal is called as duo-binary
signal. 1 and 0 can be represented in various formats in different levels and waveforms. The selection ‟ of
coding technique depends on system band width, system ability to pass dc level information, error
checking facility. Non return to Zero (level): The NRZ(L) waveform simply goes low for one bit time to
represent a data „0 and high to represent data „1 ‟ ‟.For lengthy data the clock is lost in asynchronous
mode. The maximum rate at which NRZ can change is half the data clock, when alternate 0 s and 1 s are
there. DC Level: A length data will have only a dc level as its waveform, a dc voltage cannot be used in
circuits which involve transformers like telephone, AC coupled amplifiers, capacitors, filter etc.
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Waveforms
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Procedure
1. Before wiring the circuit checks all the components using multimeter and IC tester.
2. As per design set the values and do the connections as shown in circuit diagram.
3. Set the Data using mono clock pulse wherever necessary and observe the output.
4. Set the Data using mono clock pulse and continuous clock pulse wherever necessary and observe the
output.
5. Draw the output waveform.
Result: Data formatting and Line Code Generation implemented and verified.
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