Phy 202-211
Phy 202-211
ANALOGUE ELECTRONICS
Course Description: Occupation of states, distribution function, metals and insulators. Review of
semiconductor band structure, intrinsic and extrinsic semiconductors, pn junction, diode types
and applications (varactor diodes, photodiodes, light-emitting diodes, and others). Active
Components and Integrated Circuits: Transistors (NPN and PNP Transistors, Field-Effect
Transistors, Switching, Integrated Circuits (Linear Integrated Circuits, Digital Integrated Circuits)
Operational Amplifiers and feedback. Linear Circuits: Linearity, Gain, Frequency Response,
Broadband Amplifiers, Tuned Amplifiers, Power and Root Mean Square Values, Calculating
Power, Oscillators and Multipliers.
Reading Materials:
   1. N. Balkan, “Hot Electrons in Semiconductors, Physics and Devices” , Oxford University Press (1997)
   2. Anant Agarwal and Jeffrey H. Lang, “Foundations of Analog and Digital Electronic Circuits”,
      Elsevier Inc., (2005)
   3. Anil K. Maini, “Digital Electronics Principles, Devices and Applications”, John Wiley & Sons Ltd,
      (2007 )
Introduction to Semiconductors
Semiconductor materials have conductivity lying between those of conductors and insulators.
That means they do not exhibit metallic bonding. Their interatomic bonds are covalent as shown
in the Si lattice in Fig. 1.1. The energy required by the covalently bound electrons in
semiconductor materials to break loose from the bound state to become conducting electrons is
less than that required for insulators. When a bound electron in semiconductor material absorbs
sufficient energy to be available for conduction, it leaves a hole behind. Thus, creating
electron-hole pairs. For insulators, the energy required for the bound electrons to break free
from the bonds to become conducting electrons is usually extremely large. Such energy may be
so large that the insulator can be thermally destroyed before the electrons become conducting.
                                                  1
        The energy difference between the minimum energy required for an electron to be
conducting and the maximum energy of a bound electron is known as the energy gap (𝐸𝑔 ).
Accordingly, the energy gap, for semiconductors is relatively much smaller than that of insulators.
This means moderate energy is sufficient for some electrons in semiconductors to leave the
bound states and occupy the conduction states. In Fig. 1.2, the density of states (a map of energy
states per unit volume per unit energy as a function of the 𝑘 −vector) and energy band diagram
(minimum and maximum levels of the conduction and valence bands respectively separated by
the energy gap -𝐸𝑔 ) are shown for intrinsic (pure) semiconductors. The conduction band
minimum is 𝐸𝐶 while the valence band maximum is 𝐸𝑉 . Half-way between 𝐸𝐶 and 𝐸𝑉 is the Fermi
energy level (𝐸𝐹 ). This Fermi energy 𝐸𝐹 is the average energy of all charge carriers present.
                          𝐸
         Conduction
         band                                                                        𝐸𝐶
                                    𝑘       𝐸𝑔
                                                              𝐸𝑔                     𝐸𝐹
           Valence
                                                                                     𝐸𝑉
           band
(a) (b)
Fig. 1.2 Intrinsic semiconductor (a) density of states (b) band structure
                                                   2
       When doped with the group III element Boron (B), the impurity atom is short of an
electron to complete the interatomic covalent bonds with its four nearest neighbour
semiconductor atoms. It thus seeks an electron to complete its fourth covalent bond and holds
onto the seventh electron of a neighbouring semiconductor atom as shown in Fig. 1.3 (a) to leave
As
                                                                        (b)
                       (a)
Fig. 1.3 Atomic structure of doped semiconductor (a) p-type semiconductor (b) p-type semiconductor
behind a hole. A p-type semiconductor is therefore obtained. Similarly, when a group V element
(As) is implanted in an intrinsic semiconductor, only four of its valence electrons are used to
complete covalent bonds with four neighbouring semiconductor atoms. The fifth remaining
electron of the group V element is unbound and available for conduction as in Fig. 1.3 (b).
                       (a)                                              (b)
 Fig. 1.4 Extrinsic semiconductor energy band structure showing (a) donor level
 𝐸𝑑 at 0 K and about 50 K for n-type and (b) acceptor level 𝐸𝑎 at 0 K and about 50 K for p-type,
 respectively.
       From the energy band perspective, the energy states of the group V impurity atoms are
located much closer to the conduction band than to the valence band. Subsequently the unbound
electrons require only a small amount of energy to leap to the conduction band. Such impurity
atoms are known as donor atoms as they donate electrons to the conduction band. The resulting
doped semiconductor is known as n-type semiconductor. Band energies of extrinsic
semiconductors are shown in Fig. 1.4.
                                                3
        Again, in terms of energy states, the group III impurity energy levels lie at low energy
states close to the valence band and can easily be occupied by lower energy electrons in the
valence band that do not have sufficient energy to directly occupy energy states in the
conduction band as shown in Fig. 1.4 (b). Such impurity atoms are known as acceptor atoms. They
accept electrons from the valence band to create holes and the semiconductor so formed is
called p-type.
The p-n Junction
The p-n junction is a metallurgical junction between p-type and n-type semiconductors. The
majority carrier holes of high concentration in the p-type diffuse to the n-side while the majority
carrier electrons diffuse in the opposite direction from the n-type to the p-side.
Fig. 1.5 The p-n junction (a) metallurgical junction (b) electron and hole diffusion across the junction
        As electrons diffuse from the n region, positively charged donor atoms are left behind
near the junction. Similarly, as holes diffuse from the p region, they capture electrons and
become negatively charged and creating positive charge build up at the n-side of the p-n junction.
So, positive charges accumulate at the n side, close to the junction, while negative charge
accumulate at the opposite p-side near the metallurgical junction. The charge build-up continues
until the resulting electric field in the direction from the n- to the p-region is sufficient to stop
the diffusion process. At this stage, the built up charge of negative and positive charges formed
near the p-n junction becomes known as space charge (SC). This SC region is depleted of majority
charge carriers (electrons and holes) and is referred to as the depletion region.
        Density gradients still exist in the majority carrier concentration regions at each edge of
the space charge region. Thus, electron diffusion current and hole diffusion current exist at the
edges of the depletion region. However, the electric field in the in the SCR leads to drift currents
of electrons and holes in directions opposite to their corresponding diffusion currents. At thermal
equilibrium, the diffusion currents and drift currents balance each other. The depletion region,
drift and diffusion currents are shown in Fig. 1.5.
                                                     4
        The built-in voltage at the junction barrier is given by 𝑉𝑏𝑖 . When the external voltage is
applied to the p-n junction, it may be done so in two ways. If the positive terminal of the external
voltage source is applied to the p-type and the negative terminal to the n-type as shown in Fig.
1.5 then the p-n junction is said to be forward biased. When the terminals are reversed so that
the positive terminal is now applied to the n-type and the negative terminal to the p-type then
the p-n-junction is said to be reverse biased.
 Fig. 1.6 Depletion region, drift and diffusion currents and the direction of electric field at the
 junction
         Forward bias voltage (Vf) counters the in-built junction voltage. As such, if the voltage Vf
exceeds the junction voltage, majority charge carriers will flow across the junction. On the other
hand, reverse bias voltage (Vr) widens the width of the depletion region and most importantly
enhances the junction voltage to impede even further, the flow of majority charge carriers across
the barrier but favours the flow of minority charge carriers across the junction. Thus, a reverse
Fig. 1.7 The p-n junction (a) unbiased (b) forward biased and (c) reverse biased.
                                                      5
biased junction conducts a negligible small current. This behavior of a p-n junction makes it
suitable for use as a diode. A typical p-n junction I-V characteristic curve is shown below.
Increasing reverse bias voltage Vr, eventually leads to the breakdown voltage (Vzk) and the diode
begins to conduct large current under reverse bias.
Diode
By virtue of its conduction of current when forward biased and negligible conduction of current
when reverse biased, the p-n junction is ideally employed as a diode to conduct current in only
one direction. The electronic symbol of a diode is given in Fig. 1.8.
Zener Diode
This is a heavily doped p-n junction that has a similar forward biased i-v characteristic curve as
that of a forward biased diode. However, it operates under reverse bias conditions in the reverse
breakdown region. Its i-v characteristics under reverse operation differs from that of the diode.
All Zener diodes have a defined voltage determined at their manufacture. This makes it suitable for
application as a voltage stabilizer. The diode operates in a region called Zener region. In this region the
voltage across Zener diode remains constant but current changes depending on the supply voltage.
                                                    6
Light Emitting Diode (LED)
The light emitting diode is simply a forward biased p-n junction. The forward bias results in the
injection of majority carriers across the p-n junction. Holes travel from the p-side to the n-side
and electrons go from the n-side to the p-side. This results in recombination of the electrons and
holes in the vicinity of the junction and energy is released in the annihilation process as shown in
the diagram following:
 In the p-side, due to the high concentration of holes electrons require relatively higher energies
 to stay in the conduction band as compared to electrons in the n-side. Therefore, the energy
 bands in the n-side are lower than in the p-side by 𝑒𝑉0 (𝑉0 is the built-in potential). This
 prevents majority carries from further diffusing across the p-n junction. Forward biasing
 reduces 𝑉0 and majority charge carriers now easily diffuse across the p-n junction. Electrons
 thus recombine with holes around the p-n junction and within the diffusion length in the p-
 side resulting in the emission of energy. In LEDs, the energy is released as photons (light). A
 schematic and electronic symbol of the LED are shown below.
                                                 7
Photodiode
A photodiode is typically a light sensor that converts light energy into electrical energy. It is
basically a PN junction diode with one end-either the P-side or N-side exposed to light
(electromagnetic waves). When light of sufficient energy is incident on the semiconductor,
electrons are ejected from the valence band to the conduction band. This creates electron-hole
pairs. The electron-hole pairs so generated contribute to both majority and minority charge
carriers in both P- and N-type semiconductors. The minority charge carriers are swept across the
depletion region by the built-in potential to the other side of the junction where they are majority
carriers. If an external circuit is completed across the P- and N-type terminals of the P-N junction,
electrons would flow from the N-type to the P-type while holes from the P-type would flow
towards the N-type. The current generated is proportional to the incident light or radiation
power. When used in reverse biased state the photodiode is referred to as photoconductive
whereas in the unbiased state it is known as photovoltaic. The photodiode is shown below in
schematic and electronic symbol.
Varactor Diodes
A capacitor whose capacitance may be varied or controlled by an externally applied voltage is
known as a varactor. The depletion layer in a p-n junction is free of charge carriers and acts as an
insulator (dielectric) between the outer n- and p-side layers. The p-type semiconductor with
holes as majority carriers and n-type semiconductor with electrons as majority charge carriers
act as the charged plates of a capacitor carrying negative and positive charges respectively. Thus,
the diode may be considered as a capacitor with n-region and p-region forming oppositely
charged plates with the depletion zone between them as dielectric.
                                                 8
                                                                      (b) Electronic symbol
                   (a) Schematic
        Under reverse bias, the width of the depletion region can be varied by varying the reverse
bias voltage. Effectively, this changes the width of the depletion layer and hence the distance of
separation between the n-side and the p-side (capacitor plates). The capacitance is thus
controlled by varying the reverse bias voltage.
                                  C                                   C
                              p                                   n
                         B    n                               B   p
                              p                                   n
                                  E                                   E
                                  C                                       C
                          B                                        B
                                  E                                        E
                 (c) Electronic symbol of pnp            (d) Electronic symbol of npn
                                                  9
base-emitter (B-E) and the collector-base (C-B) junctions. These junctions are key to the
operation of a transistor.
Transistor Operation
                                         E                       C
                                                n    p n
                                         IE                      IC
                                                    IB B
Vcc VEE
When the transistor is so biased the B-E junction allows easy flow of majority charge carriers
across it. For the npn transistor, electrons being the majority carriers at the emitter are injected
into the thin and slightly doped base where they are minority carriers. Only a few electrons leave
the base circuit while the remaining large quantity of injected electrons flow across the reverse
biased C-B junction. The indicated direction of current flow in Fig. 1.2 is that of conventional
current. The same explanation holds for the pnp transistor except that holes are the majority
carriers.
𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵
Transistor Configuration
Although the transistor is a three terminal device it is often used to form a four-terminal circuit
of input and output terminals in which case one of its three terminals is common to both input
and output circuits. Depending on which of the three transistor terminals is common to both
input and output circuits, the transistor has three configurations known as Common Emitter
                                                    10
             C
         B                              E         C                               E
                                                                         B
 input           output         input                                                 output
             E                                B   output            input       C
(CE), Common Base (CB) and Common Collector (CC). The three configurations are shown below
in fig 1.3 for an npn transistor. All three configurations are biased in the same way as already
discussed. Note that the different configurations are differentiated by which terminals form the
input and output and the terminal common to both.
For the CE configuration the current gain is denoted by 𝛽 and given by,
𝛽 = 𝐼𝐶 /𝐼𝐵
Similarly, for the common base configuration, the current gain, 𝛼, is given by,
𝛼 = 𝐼𝐶 /𝐼𝐸 ≈ 1
Thus,
𝐼𝐶 = 𝛽𝐼𝐵 = 𝛼𝐼𝐸
Hence, using 𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 ,
                                              𝛽              𝛼
                                        𝛼 = 𝛽+1 and 𝛽 = 1−𝛼
Transistor Biasing
Practically a transistor is not biased using two separate voltage sources. It is much more efficient
to use a single source to bias both the base-emitter and the collector-base circuit. There are three
types of such bias circuits and they are; the fixed bias, emitter stabilised bias and universal bias
circuits. For our purpose we will discuss only the fixed bias circuit which is shown in fig. 1.4 for
an npn transistor.
                                                      11
                                     RB             RC IC
                                                                   Vout
                                                                                   VCC
                                               B        VCE
                                          IB
                               Vin
                                               VBE     E
The values of RB and RC are chosen for the voltage drop across RB to be greater than the voltage
drop across RC to maintain a reverse biased C-B junction. From Kirchhoff’s law
VCC  I C RC  VCE
                                                              VCE VCC
                                                    IC         
                                                              RC   RC
IC
DC load line
VCC VCE
Fig. 1.6
                                                                               1
This curve is known as the DC load line and has a gradient                       . Every point along the DC load
                                                                               RC
line is known as an operating point or quiescent point (Q-point) of the transistor. The Q-point is
defined as a set of DC bias conditions which include base current IB, collector current IC and
collector-emitter voltage VCE.
Classification of Amplifiers
Amplifiers are categorized into classes A, B, AB and C based on their operating points. The Q-
point of a transistor may lie in the middle, the extreme ends or between the middle and extreme
ends of the DC load line. Fig. 1.6 shows the classes of amplifiers and their corresponding Q-points.
                                                              12
                                       IC
                                            B
                                                 A
                                                       AB
                                                           B
                                                           VCC   VCE
Fig. 1.6
Class A
A class A amplifier is one in which the operating point and input signal are such that the current
in the output circuit (in the collector or drain electrode) flows at all times. A class A amplifier is
biased so that it conducts during the entire input cycle. It is biased ideally at the midpoint of the
DC load line. It is a highly linear amplifier with low efficiency, as much as 75% to 80% is consumed
by such an amplifier hence the low efficiency. Their power amplifiers are used to feed power to
loudspeakers in small radios.
Class B
A class B amplifier is one in which the operating point is at the extreme end of its DC load line, so
that the quiescent power is very small. Hence either the quiescent current or voltage is
approximately zero. If the signal excitation is sinusoidal, amplification takes place for only one-
half of the input cycle. Unfortunately chopping off half of each cycle of the input signal is an
extreme form of distortion which is undesirable in virtually any audio applications if any degree
of high fidelity is desired. In order for a class B amplifier to reproduce signals with reasonable
accuracy, two parallel transistors must be used. One of these transistors is an npn type to
amplifier the positive half cycles and the other is a pnp transistor to amplifier the negative half
cycles. The two amplified half cycles are then recombined across the load to produce an amplified
version of the original input wave form. This kind of dual class B amplifier circuit is known as a
push-pull amplifier.
Class AB
A class AB amplifier is one whose operating point lies between that defined for class A and class
B. Hence the output signal is zero for part but less than one half of an input sinusoidal signal cycle.
Class C
A class C amplifier is one in which the output current (or voltage) is zero for more than one half
of an input sinusoidal signal cycle and hence conducts for less than one half of each input cycle.
                                                  13
The class C mode of operation is absolutely worthless for audio applications because of its
extreme distortion but they are widely used in IF (intermediate frequency) and RF (radio
frequency) circuits.
In order to compare the relative performance of these different classes of amplifier, a figure of
merit known as the "conversion" or "theoretical" efficiency is used. This is defined as
Field effect transistors (FET) are three terminal devices like BJTs, but operate by a different
principle. The three terminals are called source, drain, and gate. They use electric field to control
current unlike BJTs that use base current to control collector current. In FETs, the gate voltage
controls the current flowing in the source-drain channel. There are two types of field-effect
transistors; Junction Field-Effect Transistor (JFET) and Metal-Oxide Semiconductor Field-Effect
Transistor (MOSFET) or Insulated-Gate Field-Effect Transistor (IGFET). The two mainly differ in
the way the gate contact is made on the source-drain channel.
        The JFET is made of a doped semiconductor rod for conducting current. One end of the
conducting channel is the source and the other end is the drain. Current flows from drain to
source. A strip of complementary semiconductor type is diffused into the middle section of the
rod to form the gate. The figure below shows a typical JFET and its circuit symbol. Its conducting
channel is n-type (n-channel JFET) with p-type gate (the channel and gate materials may be
                                                 14
The figure above shows the variations in the depletion layer at different VGS.
METAL-OXIDE INSULATOR
interchanged to obtain p-channel JFET). Thus, a p-n junction is formed between the p-type gate
and n-type drain-source channel. In normal operation, the gate-channel is reverse biased. This
prevents current flowing from gate to channel but current may flow across the channel when
                                               15
voltage is applied to drain-source. The gate-source voltage (VGS) reverse biases the gate-channel
p-n junction. The reverse bias causes widening of the depletion width and thus narrowing the
source-drain channel. Subsequently, channel resistance increases and the corresponding channel
or drain current (ID) reduces. As drain-source voltage (VDS) increases, ID increases with it. At some
large VDS, the depletion regions meet and ID saturates (remains relatively constant) and does not
increase noticeably with VDS. The voltage VDS at which ID saturates is known as the pinch-off
voltage (Vp). Further increase in VDS beyond Vp eventually causes gate-drain avalanche due to
breakdown of the gate-channel p-n junction.
In MOSFETs, the gate is insulated from the drain-source channel. So, no current flows through
the gate electrode. This means that the gate input impedance is extremely large (in the range of
109 Ω –1012 Ω). The large input impedance makes them an excellent choice for amplifier inputs.
A substrate, say p-type material (n-type may also be used), has two separate n-type regions
(source and drain) diffused into it as shown below.
        Next, the surface of the structure is covered with an insulating metal-oxide layer. The
oxide layer serves as a protective coating for the FET surface and to insulate the channel from
the gate. Metal contacts are then made to the source and drain. The contact to the metal area
covering the substrate between the source and drain (channel) is the gate terminal. Since the
drain and source are isolated by the substrate, any drain-source current in the absence of gate
voltage is extremely low because the structure is analogous to two diodes connected back-to-
back. However, the metal gate forms one plate of a capacitor and the substrate forms the other
plate with the metal-oxide as the dielectric between the plates. When positive voltage is applied
to the gate, holes are repelled from the surface of the channel and electrons are attracted to the
surface. This converts the p-type channel to an n-type and the p-n junctions disappear. A
continuous conducting channel of n-type material is then formed from source to drain and
current flows when drain-source voltage is applied. Thus, drain current flow can be modulated
(varied) by the gate voltage. In other words, the channel resistance is directly related to the gate
voltage.
        The n-channel structure may be changed to a p-channel device by reversing the material
types. Some important advantages of FETs over BJTs;
    o Unipolar device i. e. operation depends on only one type of charge carriers (holes or
        electrons)
    o Voltage controlled device (gate voltage controls drain current)
    o Very high input impedance (≈109 Ω -1012 Ω)
    o Source and drain are interchangeable in most low-frequency applications
    o Low voltage-low current operation is possible (low-power consumption)
    o Very small in size, occupies very small space in ICs
                                                 16
Amplifier Coupling
Direct coupling is a means of interconnecting two circuits such that, in addition to transferring
the AC signal (or information), the first stage also provides DC bias to the next. Thus, there is no
need for a DC blocking capacitor interconnecting the circuits. This technique is used by default in
circuits like IC op-amps, since large coupling capacitors cannot be fabricated on-chip. That said,
even discrete circuits (such as power amplifiers) employ direct coupling for improved low
frequency performance. One advantage or disadvantage (depending on application) of direct
coupling is that any DC at the input appears as a valid signal to the system, and so it will be
transferred from the input to the output (or between two directly coupled circuits). If this is not
a desired result, then the term used for the output signal is output offset error, and the
corresponding input signal is known as input offset error. The advantage of direct coupling is very
good low frequency response, often from DC (if the input/output coupling capacitors are not
used) to the highest operating frequency that the system will allow. Most industrial applications
that require monitoring of slowly changing signals (such as those from thermistors,
thermocouples, etc.) must have a very good DC amplification with minimum offset errors and
hence they have to be directly coupled throughout by default, and have offset correction or
trimming incorporated into them.
Transformer coupling is often used for impedance matching. It is generally used when the load
is small. It however has the disadvantage of poor frequency response.
Capacitive coupling is the transfer of energy within an electrical network by means of the
capacitance between circuit nodes. This coupling can be intentional or accidental. Capacitive
coupling is typically achieved by placing a capacitor in series with the signal to be coupled. In
analogue circuits a coupling capacitor is used to connect two circuits such that only the AC signal
from the first circuit can pass through to the next while DC is blocked. This technique helps to
isolate the DC bias settings of the two coupled circuits. Capacitive coupling is also known as AC
coupling and the capacitor used for the purpose is known as a coupling or DC blocking capacitor.
Capacitive coupling has the disadvantage of degrading the low frequency performance of a
system. Each coupling capacitor along with the input electrical impedance of the next stage forms
a high-pass filter and each successive filter results in a cumulative filter with a -3dB frequency
that may be higher than each individual filter. So, for adequate low frequency response the
capacitors used must have high capacitance ratings. They should be high enough that the
reactance of each is at least ten times the input impedance of each stage, at the lowest frequency
of interest. This disadvantage of capacitive coupling is largely minimized in directly coupled
designs.
Frequency Response
                                                17
Amplifier gain decreases at high frequencies and in some cases at low frequencies also. One cause
of loss of gain at high frequencies is the presence of shunt capacitance across the load. This may
be due to stray capacitance in the external circuit and what is usually more important,
capacitance within the amplifier itself. The effective load on the amplifier tends to zero as the
frequency tends to infinity.
                                                   Ro
                                                                            l
                                                                            o
                                                                            a
                                                                            d
Loss of gain at low frequencies is due to the use of certain capacitors in the circuit. Their values
are chosen so that their reactances are very small at the frequencies being used so that little of
the signal voltage is developed across them. At low frequencies however appreciable signal is
developed across them resulting in the loss of signal at the load.
The bandwidth of an amplifier is defined as the difference in frequency between the lower and
upper frequencies respectively at which the gain is 3.0 dB down on its maximum value.
The frequency response of an amplifier with capacitors in its circuitry typically exhibits a band-
pass frequency response of the form shown below
                                 Gain
                                 (dB)
                                        3.0dB
                                                bandwidth
Frequency (Hz)
The bandwidth is determined by the 3dB points which are the half-power points. If Pm is the
power associated with the maximum gain usually termed the mid-band gain, and the
corresponding output voltage is Vo then for the half power condition let the voltage be V1.
Implying,
                    V12 1    V2                         Hence, V1 
                                                                       1
                        Pm  0                                           V0  0.71V0
                     R 2     2R                                         2
                                                 18
If the bandwidth lies within the audio frequency range then the amplifier is known as an audio
amplifier.
The cut-off frequency on the low end is usually determined by the coupling and bypass capacitors
(if there are no such capacitors the low end extends all of the way to DC). The high frequency
limit is typically determined by internal capacitances in the transistor itself.
      In negative feedback, the output signal is out of phase with the input signal by 180o and
       the output signal or a portion of it is continuously fed back to the input and subtracted
       from it and the difference amplified. Negative feedback is generally used to correct
       output errors or to lower device output gain to a pre-determined level. In feedback
       amplifiers, this correction is generally for waveform distortion reduction or to establish a
       specified gain level. The figure below shows a negative feedback network.
                                                       V
                                 Vin   +        Σ            A           Vout
                                           -
                                           Vf
                                                                 β
                                                        19
    In positive feedback, the output signal is in phase with the input signal with the output
    signal or a portion of it continuously fed back to the input. The input is added to the
    feedback signal and the resulting summed signals amplified. Under certain gain
    conditions, positive feedback reinforces the input signal to the point where the output of
    the device oscillates between its maximum and minimum possible states. Under some
    circumstances, positive feedback may cause a device to latch, i.e., to reach a condition in
    which the output is locked to its maximum or minimum state. The figure below shows a
    positive feedback network.
                                                     V
                              Vin    +        Σ            A         Vout
                                         +
                                         Vf
                                                               β
    Gain Stability
    In practical amplifiers the open-loop gain A is dependent on temperature and operating
    conditions of active devices. The effect of variations in the open-loop gain A can be
    determined from the sensitivity of the closed-loop gain A f .
                      A
    From A f 
                   1  A
    dA f
           
               1  A   A  1
     dA           1  A 2   1  A 2
                            dA
    Implying dA f 
                        1  A 2
                                                      20
                dA f         1  A  dA          1      dA 
       Thus                                           
                Af           A  1  A 
                                           2
                                               1  A   A 
       The sensitivity of the the closed-loop gain A f to the open-loop gain A is defined as
                dA         Af           1
        SAf                       
          A            f
dA A 1  A
Thus for A  1 , which is generally the case, the sensitivity of A f to A becomes very small.
Implying a significant change in A will cause only a small change in A f .
• Notation
Vout: output
The power supply pins (VS+ and VS−) can be labelled in different ways. Despite different labeling,
the function remains the same. Often these pins are left out of the diagram for clarity, and the
power configuration is described or assumed from the circuit. The positions of the inverting and
                                                      21
non-inverting inputs may be reversed in diagrams where appropriate but the power supply pins
are not commonly reversed.
The following rules guiding op amp behaviour must be taken into account in op-amp circuit
analysis;
           •   Where the Op-amp circuit involves a feedback loop, the voltage difference
               between the inputs is zero.
           •   The inputs draw no current
                                                22
   Inverting amplifier
    It inverts and amplifies the input voltage (multiplies the input voltage by a negative
    constant)                 . The input impedance Zin = Rin (because V − is a virtual ground).
    A third resistor of value                   added between the non-inverting input and
    ground, while not necessary, minimizes errors due to input bias currents.
   Non-inverting amplifier
• Differential amplifier
    The differential amplifier circuit shown above is used for finding the difference of two
    voltages each multiplied by some constant (determined by the resistors)
                                            23
        The output is exactly equal to the difference in the two input voltages when R1=R2=Rf= Rg.
        A third resistor, of value    R f R,inadded between the Vin source and the non-inverting
        input, while not necessary, minimizes errors due to input bias currents.
       Voltage follower
 Summing amplifier
The output is inverted and input impedance Zn = Rn. For each input (V − is a virtual ground).
 Integrator
                                                24
    Integrates the inverted input signal over time. Thus,
                                                                 .
    (Where, Vin and Vout are functions of time, Vinitial is the output voltage of the integrator at
    time t = 0). Note that this can also be viewed as a type of electronic filter.
   Differentiator
    Where, Vin and Vout are functions of time. Note that this can also be
    viewed as a type of electronic filter.
•   Comparator
Compares two voltages and outputs one of two states depending on which is greater
                                              25
                                   Vin          -
                                                                   Vout
                                                +
                                                          R1
                                                          R2
                                                VREF
       As already seen when the voltage at the non-inverting input terminal of the comparator
       is greater than the voltage at the inverting terminal the output will be forced to positive
       saturation due to the very high open loop gain of the op-amp. Conversely, if the voltage
       at the non-inverting input is less than that at the inverting terminal then the output is
       forced to negative saturation. The transfer characteristics showing the relationship
       between the input and output voltages exhibits hysteresis and is illustrated below
OSCILLATORS
There are two main types of electronic oscillators: the harmonic oscillator and the relaxation
oscillator.
                                                26
Harmonic oscillator
The harmonic oscillator produces a sinusoidal output. The basic form of a harmonic oscillator is
an electronic amplifier with the output attached to a narrow-band electronic filter, and the
output of the filter attached to the input of the amplifier. When the power supply to the amplifier
is first switched on, the amplifier's output consists only of noise. The noise travels around the
loop, being filtered and re-amplified until it increasingly resembles the desired signal. A
piezoelectric crystal (commonly quartz) may be coupled to the filter to stabilize the frequency of
oscillation, resulting in a crystal oscillator. The wien bridge oscillator is an example of a harmonic
oscillator.
Relaxation Oscillator
A relaxation oscillator is one that does not produce sinusoidal waves. An example is one that
charges a capacitor gradually followed by a rapid discharge. It is usually implemented with a
resistor or current source, a capacitor, and some sort of "threshold" device such as a, neon lamp,
diac, unijunction transistor, or Gunn diode. The capacitor is charged through the resistor, causing
the voltage across the capacitor to approach the charging voltage on an exponential curve. In
parallel with the capacitor is the threshold device. Such devices don't conduct at all until the
voltage across them reaches some threshold (trigger) voltage. They then conduct heavily, quickly
discharging the capacitor. When the voltage across the capacitor drops to some lower threshold
voltage, the device stops conducting and the capacitor can begin charging again, repeating the
cycle. If the threshold element is a neon lamp, the circuit also provides a flash of light with each
discharge of the capacitor. The electrical output of a relaxation oscillator is usually a saw tooth
wave. If only a small portion of the exponential ramp is used (that is, if the triggering voltage of
the threshold device is much lower than the charging voltage source), the ramp will approximate
a linear ramp but if a truly linear saw tooth is required then the charging resistor should be
replaced by some sort of constant current source. An op-amp implementation that uses a
comparator to produce an output wave form that oscillates between the saturation voltages of
the op-amp is discussed below.
                                                 27
The system is in unstable equilibrium if both the inputs and outputs of the op amp are at
zero volts. The moment any sort of noise, be it thermal or electromagnetic noise brings
the output of the op amp above zero (the case of the op amp output going below zero is
also possible, and a similar argument to what follows applies), the positive feedback in
the op amp results in the output of the op amp saturating at the positive rail. In other
words, because the output of the op amp is now positive, the non-inverting input to the
op amp is also positive, and continues to increase as the output increases, due to the
voltage divider. After a short time, the output of the op amp is the positive voltage rail,
VDD.
The inverting input and the output of the op amp are linked by a series RC circuit. Because
of this, the inverting input of the op amp asymptotically approaches the op amp output
voltage with a time constant RC. At the point where voltage at the inverting input is
greater than the non-inverting input, the output of the op amp falls quickly due to positive
feedback. This is because the non-inverting input is less than the inverting input, and as
the output continues to decrease, the difference between the inputs gets more and more
negative. Again, the inverting input approaches the op amp's output voltage
asymptotically, and the cycle repeats itself once the non-inverting input is greater than
the inverting input, hence the system oscillates.
28