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Ecal Project

The document outlines the lab module for EFB 1054 Digital Electronics, focusing on designing a 4-bit parallel adder and subtractor. It includes pre-lab requirements, theoretical background, objectives, apparatus needed, and a detailed procedure for conducting the experiment. Additionally, it specifies submission guidelines, grading criteria, and penalties for late submissions and attendance.
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0% found this document useful (0 votes)
16 views9 pages

Ecal Project

The document outlines the lab module for EFB 1054 Digital Electronics, focusing on designing a 4-bit parallel adder and subtractor. It includes pre-lab requirements, theoretical background, objectives, apparatus needed, and a detailed procedure for conducting the experiment. Additionally, it specifies submission guidelines, grading criteria, and penalties for late submissions and attendance.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EFB 1054 - DIGITAL ELECTRONICS

EFB1054 Digital Electronics


Lab Module # 02: Four-bit Parallel Adder

1) 1)

Name: ID:
2) 2)

Date: Time:
NOTE:
• You are required to complete and submit the pre-lab ONE (1) day BEFORE your
lab session through ULearn. Submit your pre-lab according to the assigned group
The
pre-lab will help you to understand, design and perform the experiment.
• Submission of laboratory report is ONE (1) day AFTER your lab session through
ULearn. Submit your report according to the assigned group.
• To configure IC’s and other components in this experiment(s), it is highly recommended
to read data sheet(s) before coming to the lab session.
• Students are required to bring their own breadboards to the laboratory.
• Students are required to complete the laboratory session within 1 hour 50 minutes. The
remaining time will be used for verification and cleaning.
• Marks penalty will be given for late attendance, late submission and front cover
unavailability during submission.
• Marks distribution for this lab can be referred to at the end of this module.

1. INTRODUCTION
In this experiment, you will design a 4-bit parallel adder and a 4-bit subtractor and Ex OR
gate IC. You will start by designing a full adder at gate-level and after that extends the
design for a 4-bit parallel adder and subtractor.

2. THEORETICAL BACKGROUND
Read the following topics from your textbook “Digital Fundamentals by Floyd” for the
basicknowledge about adders and decoders:
i) 6.2 Basic Adders
ii) 6.3 Parallel Binary Adders

3. OBJECTIVES AND EXPECTED LAB OUTCOMES


i) To understand the operation of a full adder and full subtractor.
ii) To configure a digital circuit operating as a full adder and subtractor.

4. RELATED COURSE OUTCOME


This lab experiment addresses the course outcome CO 4 i.e. Design and construct
combinational logic circuits using appropriate logic design techniques.

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5. APPARATUS, EQUIPMENT AND COMPONENTS


i) Breadboard, Wires, Power supply.
ii) LED x9 (for 9 inputs: 1-bit carry-in, 4-bit A, 4-bit B)
iii) IC SN7483 (4-bit adder)
iv) IC SN7486 (ex-OR gate IC)
v) 10 kΩ resistors x9, for the LED

Pin Diagrams

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EFB 1054 - DIGITAL ELECTRONICS

Lab Module # 02: Four-bit Parallel Adder

1) 1)

Name: ID:
2) 2)

Date: Time:

6. PRE-LAB

i) Draw the gate-level implementation of a half adder. Write down the truth
table and the Boolean expressions for the output sum and carry for the circuit.

ii) Draw a full adder using half adder blocks. Write down the truth table and
the Boolean expressions for the output sum and carry for the circuit.

iii) Draw the gate-level implementation of a full adder.

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EFB 1054 - DIGITAL ELECTRONICS

iv) What are parallel adders? How many full adders are required to add two 4-bit
binary numbers?

v) Draw a 4-bit parallel adder using full adder blocks.

vi) Draw the circuit diagram of a 4-bit parallel adder using the 4-bit full adder IC
SN7483, for the output of the circuit connect LED at each output point. Verify your
circuit in Circuitverse, attach copy of the schematic file with this pre lab submission.
In your verification, show that the output from the LED obtained from the simulation
is the same as the output obtained from the truth table.

Comment by Teaching Assistant:……………………………………………………………..


…………………………………………………………………………………………………..
…………………………………………………………………………………………………..

Verified by:

(Signature) (Date)

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7. LAB EXPERIMENT

i) Make the circuit of a 4-bit adder on the breadboard as designed in your pre-lab exercise
part (vi). Properly apply VCC, GND and other input signals to the ICs (refer to datasheets).
ii) Measure the outputs from the circuit through LEDs and verify the circuit from truth table.
iii) Show the experiment output to one of the GA for the verification.

8. RESULTS

Table 1
4-bit Full Adder
Inputs Outputs (Theoretical) Outputs (Experiment)
Cin A B A+B Carry out A+B Carry out
0 0001 0101
0 1001 0001
0 0110 0010
0 0001 0111
0 1111 1111
1 0001 0101
1 1001 0000
1 0110 0010
1 0001 0111
1 1111 1111

Comments by Teaching Assistant:


………………………………………………………………………………………
………………………………………………………………………………………
………………………………………………………………………………………
………………………………………………………………………………………

Verified by:

(Signature) (Date)

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9. CONDUCTED EXPERIMENTAL PROCEDURE

10. ANALYSIS AND DISCUSSION

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11. CONCLUSION

12. LAB REPORT RUBRIC

You must submit a lab report according to the format provided below. The report is due
ONE (1) day after the conducted lab session. Prelab results are to be submitted in ULearn
ONE (1) day before the lab session together with this lab report rubric. Include the
rubric/Grading Criteria at the end of the lab report.

Penalty System Details


Deduction of 2 marks for late attendance. Absence without valid reason
Late Attendance
= 0 marks.
Late Submission Deduction of 1 mark per day. Submissions over 7 days late = 0 marks.
Cover Page Deduction of 2 marks if the cover page is missing.

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Grading Criteria

Category Unacceptable Marginal Acceptable Exceptional Marks


Very well
Preparation done prepared with
Minimum
Prelab Not prepared but with some comprehensive
preparation
(20%) (0-7) mistakes understanding of
(8-13)
(14-16) concepts.
(17-20)
Satisfactory Satisfactory
Not provided or Basic procedure description of description of
Experimental poorly detailed; provided; some methods used in methods used in
Procedure lacks clarity on details missing or experiments. experiments.
(10%) methods used. unclear Past Tensed Past Tensed
(0-3) (4-6) used. used.
(7-8) (9-10)
Results are
Minimal results Results are very
Results are not presented but
presented; clearly presented
resented or are have minor
Results & minimal and analyzed
plagiarized; no errors and could
Experiment involvement accurately;
involvement in still be improved;
(30%) during actively involved
experiment. involved in lab
experiment. in experiment.
(0-7) experiment.
(8-15) (24-30)
(16-23)
Thorough
analysis,
Minimum Analysis/discussi
No discussion, and
analysis/discussi on/conclusion
Analysis, analysis/discussi conclusion with
on is present presented but has
Discussion & on is provided, or clear
without minor errors that
Conclusion work is explanations
conclusions could be
(40%) plagiarized. using relevant
drawn. improved further.
(0-15) tools such as
(16-26) (27-32)
graphs/tables.
(33-40)
Total /100

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