1 2 3 4 5 6

+5V

A COGREEN
GREEN A

4
PIR?02 5
PIR?01 PIGREEN01 PIGREEN02

RN4D 1K
ON

3
PIR?02 6
PIR?01 GND
RN4C 1K

TP_ONL TP_RESET +5V COPOWER

POWER
POWER
1
PIPOWER01
2PIPOWER02
SCK
SCK RESET PIPOWER03
3
+5V
+3V3 4PIPOWER04
GND
+3V3 5
PIPOWER05
6PIPOWER06
USBVCC VIN 7PIPOWER07
VIN PIPOWER08
8 PIC402
GND COC4
C4
TP_MISO2 TP_RESET2 +5V 8x1F-H8.5 PIC401
100n
CO10x1F0H805
10x1F-H8.5
B AD5/SOL 10PI10x1F0H805010 SCL B
TP_PB7 TP_PB6 TP_SCL
AD4/SDA 9PI10x1F0H80509 SDA
TP_SDA
AREF 8PI10x1F0H80508
TP_AREF
7PI10x1F0H80507 GND
MOSI2 +5V
SCK 6PI10x1F0H80506 13
TP_13
ICSP TP_SCK2 COICSP
ICSP MISO 5 12
TP_MOSI2 PI10x1F0H80505
TP_12
PIR?01 PI0? COJB2
JB2 MOSI 4PI10x1F0H80504 11
1 2 1 2 TP_11
3

10K RN1C

PIICSP0 PIICSP0 PIICSP0

SS 3 10
3 4 CO0? 3 4 3 4 PI10x1F0H80503 TP_10
PIICSP0 PIICSP0
D3 TP_PB5 PIJB20 PIJB20 PIICSP0 PIICSP0 2PI10x1F0H80502 9
5 6 5 6 TP_9
PIICSP0 PIICSP0
PIR?02 PI0? PIICSP0 1 8
PI10x1F0H80501 TP_8
6

3X2 M 1 2 3x2 M
TP_PB4 PIJB20 PIJB20
IOH
GND GND
2x2 M - NM.SchLib

RESET2 ATMEGA328P-PU

RESET PB5
PB4
PB3
PB2
PB1 AD
ATMEGA16U2-MU(R) CO6x1F0H805
6x1F-H8.5
C PB0 C
AREF 6PI6x1F0H80506
AREF PC5 TP_A5
RESET PB1 5
PC4 PI6x1F0H80505
TP_A4
PB2 4PI6x1F0H80504
PC3 TP_A3
PB3 3
PC2 PI6x1F0H80503 TP_A2
PB4 2PI6x1F0H80502
USB PC1 TP_A1
PB5 1
PD7 PC0 PI6x1F0H80501 TP_A0
USBVCC VCC PB6
VCC GND PB7 CO8x1F0H805
8x1F-H8.5
GND
1 7
UCAP UCAP PD7 PI8x1F0H80501 TP_7
2PI8x1F0H80502 6
UVCC UVCC PD6 TP_6
3 5
PD5 PI8x1F0H80503
TP_5
D- D- 4PI8x1F0H80504 4
PD7 TP_TXL PD4 TP_4
D+ D+ 5 3
TXLED PD3 PI8x1F0H80505 TP_3
UGND UGND PD5 +5V 6PI8x1F0H80506 2
RXLED PD2 TP_2
PAD PAD PD4 COTX
TX 7PI8x1F0H80507 1
PD1 TP_1
PD3 1K 8 0
6 3 PD0 PI8x1F0H80508
TP_0
PD2 PITX02 PITX01 PIR?02 PIR?01

22R RN3D IOL

TP_RXL
YELLOW
CORX
RX
1K
ORIGIN GND_TP GND_TP1 PIRX02 PIRX01
7 COR?
PIR?02
2
PIR?01

22R RN3D
D D
YELLOW
Title Trương Quốc Kiệt
Size: A4
NHÓM 2 Quách Hoàng Giang
Size Number LêRevision
Tấn Lộc
A4 Date: 3/27/2025
Quách Tấn Minh
GND HIERARCHICAL Phạm Đinh Phi
Date: 3/27/2025
SCHEMATIC Sheet of Nguyễn Nhật Khang
File: D:\Thiết kế thiết bị điện tử\..\baitap2_nhóm2.SchDoc
Drawn By:
1 2 3 4 5 6
 1 2 3 4

A A

VIN COPOWERSUPPLY0DC21MMX
TP_LCMD POWERSUPPLY_DC21MMX TP_VIN
baitap2_nhóm2[3B] POSCK
SCK COU1
U1
+5V PIRN1A02 X1
NCP1117ST50T3G
CORN1A L13 3 TP_PWRIN
RN1A TP_CMP 3 PIPOWERSUPPLY0DC21MMX03
baitap2_nhóm2[3B] POVIN
VIN 3 4
PIU103
IN OUT PIU104

TP_GATE COU5B
U5B PIRN2A02 2
PIU102
PIRN1A01 10K COU5A
U5A

RN2A
PIC102

2
8 SCK 5
COC1
C1 CMP 3
PIU503
+
PIU5B05
+
7 CORN2A PIOWERSUPLY0DC21MX0 PIOWERSUPLY0DC21MX0 PIU10

1
1

2
PIU5B07
PIC10 Cap PIRN2A01 1K

1
PIU501
6 TP_LL CO0
100n 2 PIU5B06
-
4 PIU502
- D1
PIRN1B02 +3V3 PI00 PI00

baitap2_nhóm2[3B], Sheet2[2A]
LMV358IDGKR M7

GATE_CMD
CORN1B
RN1B LMV358IDGKR
PIL01 PI C10 COPC1

YELLOW
PIRN1B01 10K PC1
COL GND
GND
GND
PIL02 GND
PI C102 47U
TP_3V3
B B
GND GND
PO03V3
+3V3 baitap2_nhóm2[3B] GND

CO0A*A

POUSBVC
USBVCC
4
PI004 NC/FB GND
2
PI002

+3V3 ON/OFF
3
PI003
PIT10 PIC201
GND COC2
C2
PIC302 5
PI005 OUT IN
1
PI001 PIT102 PIT103
USBVCC PIC20 100n
COC3
C3
PIC301 Cap LP2985-33DBVR COT1
T1
1U

+5V
GND PO05V
+5V baitap2_nhóm2[3B]
PI C201 COPC2
GND GND PC2
+5V 47U
PI C20
C +5V C

GND

D Title D

Size Number Revision

A4
Date: 3/27/2025 Sheet of
File: D:\Thiết kế thiết bị điện tử\..\Sheet1.SchDoc
Drawn By:
1 2 3 4
 1 2 3 4

A A

POUSBVCC
USBVCC baitap2_nhóm2[2C], Sheet1[2C]

CO COF1
F1 POVCC
VCC baitap2_nhóm2[2C], Sheet3[2B]
TP_D- TP_D+ TP_XUSB USBVCC
USB-B_TH PIF10 PIF10

X2 MF-MSMF050-2 500mA TP_USBVCC TP_VUCAP POGND

GND baitap2_nhóm2[2C], Sheet3[2B]
1 XUSB
PI01
8
PIR?02 PIR?01
1
2 D-
P$1 USB

PI02 22R RN3A TP_VUCAP

3 D+ POUCAP
UCAP baitap2_nhóm2[2C], Sheet3[2B]
B PI03
USBVCC POUVCC B
4 5COR? 4 UVCC baitap2_nhóm2[2C], Sheet3[2B]
P$2

PI04 PIR?02 PIR?01 RD- RD- POD0 D- baitap2_nhóm2[2D], Sheet3[2C]

CG0603MLC-05E
22R RN3D RD+ RD+
CG0603MLC-05E
UGND

POD0D+ baitap2_nhóm2[2D], Sheet3[2C]

UGND POUGND
P$2
P$1

UGND baitap2_nhóm2[2D], Sheet3[2C]

PIZ 10 PIZ20
Z1

COZ 1
Z2

COZ2
POPAD
PAD baitap2_nhóm2[2D], Sheet3[2C]

1
TP_USH PI0 1

GROUND
PIZ 10 PIZ20 PIC701 PIC802 CO0
COC7
C7 COC8
USHIELD C8
PIL10 PIC702 PIC801
COL1 100n PI0 2
BLM21

L1 1u

2
PIL10 TP_UGND
GND
GND

C C

D Title D

Size Number Revision

A4
Date: 3/27/2025 Sheet of
File: D:\Thiết kế thiết bị điện tử\..\Sheet2.SchDoc
Drawn By:
1 2 3 4
 1 2 3 4

A A

COU3
U3
24 21 POPB7
baitap2_nhóm2[3C] PORESET
RESET PIU3024 RESET(PC1/DW) (PCINT7/OC0A/OC1C)PB7 PIU3021
PB7 baitap2_nhóm2[3C]
20 POPB6
C11 (PCINT6)PB6 PIU3020
PB6 baitap2_nhóm2[3C]
19 POPB5
(PCINT5)PB5 PIU3019
PB5 baitap2_nhóm2[3C]
2 18 POPB4
PIC1101 PIC1102 PIU302 XTAL2(PC0) (T1/PCINT4)PB4 PIU3018 PB4 baitap2_nhóm2[3C]
PI01 CO PIR102 17

Y1
(PD0/MISO/PCINT3)PB3 POPB3
PB3 baitap2_nhóm2[3C]

1
PIU3017
COR1

16MHZ
R1 16 POPB2
22P (PDI/MOSI/PCINT2)PB2 PIU3016
PB2 baitap2_nhóm2[3C]
GND 1 15 POPB1
PIR10 1M PIU301
XTAL1 (SCLK/PCINT1)PB1 PIU3015
PB1 baitap2_nhóm2[3C]
COC11
C11
PI02 XT1
(SS/PCINT0)PB0
14

2
PIU3014

B PIC1101 PIC1102
B
XT1 +5V 32 22
TP_XT3 AVCC PIU3032
(INT4/ICP1/CLK0)PC7 PIU3022
23
TP_XT4 22P (OC1A/PCINT8)PC6 PIU3023

POVCC 4 25
baitap2_nhóm2[3C], Sheet2[3B] VCC VCC PIU304
(PCINT9/OC1B)PC5 PIU3025

3 26
baitap2_nhóm2[3C], Sheet2[3B]POGND
GND PIU303 GND (PCINT10)PC4 PIU3026
5
(AIN2/PCINT11)PC2 PIU305

27
baitap2_nhóm2[3C], Sheet2[3B]POUCAP
UCAP PIU3027 UCAP
31 13 POPD7
baitap2_nhóm2[3C], Sheet2[3B]POUVCC
UVCC PIU3031
UVCC (CTS/HWB/AIN6/TO/INT7)PD7 PIU3013
PD7 baitap2_nhóm2[3D], Sheet4[1C], Sheet4[3C]
30 12
baitap2_nhóm2[3D], Sheet2[3B]POD0 D- PIU3030 D- (RTS/AIN5/INT6)PD6 PIU3012
29 11 POPD5
baitap2_nhóm2[3D], Sheet2[3B]POD0D+ PIU3029 D+ (XCK/AIN4/PCINT12)PD5 PIU3011 PD5 baitap2_nhóm2[3D]
28 10 POPD4
baitap2_nhóm2[3D], Sheet2[3B]POUGND
UGND PIU3028 UGND (INT5/AIN3)PD4 PIU3010
PD4 baitap2_nhóm2[3D]
9 POPD3
(TXD1/INT3)PD3 PIU309 PIR?02 PIR?01
PD3 baitap2_nhóm2[3D]
8 COR? 1K RN4B POPD2
(RXD1/AIN1/INT2)PD2 PIU308 PIR?02 PIR?01
PD2 baitap2_nhóm2[3D]
33 7 1K RN4A
baitap2_nhóm2[3D], Sheet2[3B]POPAD
PAD PIU3033 PAD (AIN0/INT1)PD1 PIU307
6
(OC0B/INT0)PD0 PIU306

ATMEGA16U2-MU(R)

C C

D Title D

Size Number Revision

A4
Date: 3/27/2025 Sheet of
File: D:\Thiết kế thiết bị điện tử\..\Sheet3.SchDoc
Drawn By:
1 2 3 4
 1 2 3 4

A A

2
1
PI0 2 PI0 1

5
PI0 5 CO0
GND

RESET
PI0 4 PI0 3

3
4
baitap2_nhóm2[5C] PORESET
RESET

TS42031-160R-TR-7260
GND

CD1206-S01575
CO
COC5 1 2 PI0
C5 PI01 PI02

PIC502 PIC501
RESET-EN

RN1D 10K
TP_XT2
PIR?01 PI0
100n
B PIC?01 PIC?02
PIR?02 B
GND COZU0
ZU*
RESET 1 19 POPB5
PIZU001
RESET (SCK)PB5 PIZU0019
PB5 baitap2_nhóm2[5C]
2
PIXTAL20 COXTAL2 (MISO)PB4
(MOSI)PB3
18 POPB4
PIZU0018
17 POPB3
PIZU0017
PB4 baitap2_nhóm2[5C]
PB3 baitap2_nhóm2[5C]
XTAL2 PIR201 10
PIZU0010
XTAL2 (SS)PB2
16 POPB2
PIZU0016
PB2 baitap2_nhóm2[5C]
COC? PIXTAL201 COR2
R2 15 POPB1
1

XTAL1 (OC1)PB1 PIZU0015 PB1 baitap2_nhóm2[5C]

9 14 POPB0
PIC?01 PIC?02 PIZU009 XTAL1 (ICP)PB0 PIZU0014 PB0 baitap2_nhóm2[5C]
TP_XT1
PIR20 1M
AREFPIZU0021
21
baitap2_nhóm2[5C] POAREF
AREF AREF
USB boot En

AVCC 20 28 POPC5
PIZU0020
AVCC (ADC5)PC5 PIZU0028
PC5 baitap2_nhóm2[5C]
PIR?01
4

22 27 POPC4
1K RN2D

PIZU0022 AGND (ADC4)PC4 PIZU0027 PC4 baitap2_nhóm2[5C]

COR? 26 POPC3
(ADC3)PC3 PIZU0026 PC3 baitap2_nhóm2[5C]
25 POPC2
+5V CSTCE16M0V53-R0 16MHZ (ADC2)PC2 PIZU0025
PC2 baitap2_nhóm2[5C]
PIR?02
5

COL2 +5v 7 24 POPC1

L2 PIZU007
VCC (ADC1)PC1 PIZU0024
PC1 baitap2_nhóm2[5C]
8 23 POPC0
TP_DTR PIL20 PIL20 PIZU008
GND (ADC0)PC0) PIZU0023
PC0 baitap2_nhóm2[5C]
10UH
GND 13
(AIN1)PD7 PIZU0013 PD7 baitap2_nhóm2[5C], Sheet3[3B]
12 POPD6
C PIC10 2 PIC602 (AIN0)PD6 PIZU0012
PD6 baitap2_nhóm2[5C]
11 POPD5
C
COC10
C10 COC6
C6 (T1)PD5 PIZU0011
PD5 baitap2_nhóm2[5C]
6
PIC10 1 PIC601 (T0)PD4 PIZU006

5
POPD4
PD4 baitap2_nhóm2[5D]
100n 100n (INT1)PD3 PIZU005POPD3
PD3 baitap2_nhóm2[5D]
4 POPD2
(INT0)PD2 PIZU004 PD2 baitap2_nhóm2[5D]
baitap2_nhóm2[5C], Sheet3[3B] POPD7
PD7 3
(TXD)PD1 PIZU003
2 POPD1
PD1 baitap2_nhóm2[5D]
(RXD)PD0 1 PIZU002

GND
ATMEGA328P-PU
POPD0
PD0 baitap2_nhóm2[5D]

D Title D

Size Number Revision

A4
Date: 3/27/2025 Sheet of
File: D:\Thiết kế thiết bị điện tử\..\Sheet4.SchDoc
Drawn By:
1 2 3 4
Board Stack Report