With a neat diagram, explain the internal architecture of the CPU.
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● Memory Unit
PROM (Programmable) is read-only memory that can be modified only once by a user. The user buys a blank PROM and
enters the desired contents using a PROM program. Inside the PROM chip, there are small fuses which are burnt open
during programming. It can be programmed only once and is not erasable.
EPROM (Erasable Programmable) can be erased by exposing it to ultraviolet light for a duration of up to 40 minutes.
EEPROM (Electrically Erasable Programmable) is programmed and erased electrically. It can be erased and
reprogrammed about ten thousand times.
Explain load and store operations.
● Programs reside in the memory.
● Inputs are entered through input devices.
● PC (Program counter) has address of the first instruction or next instruction to be executed.
● The contents of PC are transferred to MAR (Memory Address Register) and send over system bus to
memory.
● A Read signal is sent to the memory by control unit.
● The instruction is fetched and loaded into MDR (Memory Data Register) after duration of memory access
time.
● The contents of MDR are transferred to IR (Instruction Register).
● Now the instruction is ready to be decoded and executed.
● In order to perform the operation, ALU gets operands from General-purpose register (R0, … Rn-1) or
MDR.
● After performing the operation in ALU, the result is stored back to General-purpose register (R0, …
Rn-1).
● In order to write the data in the memory, the data is stored in the MDR. Then the write signal is produced
by control unit (via control bus) and the data from MDR is written into memory (via the data bus) at the
location specified in the MAR (transferred via address bus).
● During the execution, PC is incremented to point to the next instruction.
List out and explain the 3 types of system buses.
Address Bus is a group of conducting wires which carries address only. It is unidirectional because address flow in one
direction, from processor to memory. The Length of the address bus determines the amount of memory a system can
address. For example: system with a 32-bit address bus can address 2^32 memory locations.
Data bus is a group of conducting wires which carries Data only. It is bidirectional because data flow in both directions,
from microprocessor to memory or Input/Output devices and from memory or Input/Output devices to microprocessor. The
width of the data bus is directly related to the largest number that the bus can carry, such as an 8 bit bus can represent 2^8
unique values, this equates to the number 0 to 255. A 16 bit bus can carry 0 to 65535.
Control bus is a group of conducting wires, which is used to generate timing and control signals to control all the
associated peripherals, microprocessor uses control bus to process data, that is what to do with selected memory location.
Some control signals are: Memory read, Memory write, I/O read, I/O Write, Opcode fetch.
KB
MB
GB
TB
● Size of memory = 2^address size in bytes
if its byte addressable and in words if its
word addressable.
● Size of memory in bytes = No.of words x
bytes/word
● Size of memory in words = No. of bytes x
bytes/word
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memory location C.
What are condition codes? List the different condition codes.
With the help of examples, explain the different addressing modes.
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Describe any 4 addressing modes with examples.
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Explain Direct and Indirect addressing with examples.
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The different ways in which the location of an operand is specified in an instruction is called addressing mode.
Different types of addressing modes are:
● Immediate mode
● Register mode and Absolute mode
● Indirect mode
● Index mode - Base with Index, Base with Index and offset
● Relative mode
● Auto Increment and decrement mode
There are two modes for
What do you mean by effective address of an operand?
Write notes on different instruction sequencing techniques.
Straight line sequencing
Branching
What is meant by an instruction cycle? Describe its two phases?
Write down the sequence of actions needed to fetch and execute the instruction: Store R6, X(R8).
PCout , MARin, Read, Select 4 , Add , Zin
Zout , PCin , Yin , WFMFC
Store R6, X(R8)
MDRout, IRin
R8out,MARin,Read,WMFC stores the contents of register R6 into
MDRout, X, ADD, Zin memory location X + [R8]. It can be
Zout,R6in,End implemented as follows:
1. Fetch the instruction and increment the
program counter.
2. Decode the instruction and read
registers R6 and R8.
3. Compute the effective address X + [R8].
4. Store the contents of register R6 into
memory location X + [R8].
5. No action.
Enumerate the sequence of actions involved in executing an unconditional branch instruction
Write notes on multiple bus organization.
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