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8237 DMA Controller - II

The document provides a detailed overview of the 8237 DMA Controller, including its programming, operation modes, and procedures for memory filling and printer interfacing. It outlines the steps for configuring the controller, programming registers, and managing data transfers. Additionally, it describes the interaction between the DMA controller and external devices such as printers during data transmission.

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0% found this document useful (0 votes)
22 views28 pages

8237 DMA Controller - II

The document provides a detailed overview of the 8237 DMA Controller, including its programming, operation modes, and procedures for memory filling and printer interfacing. It outlines the steps for configuring the controller, programming registers, and managing data transfers. Additionally, it describes the interaction between the DMA controller and external devices such as printers during data transmission.

Uploaded by

6y8zpdmjr4
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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8237 DMA Controller

Dr. Gargi Alavani


Department of CS & IS

1
8237A-5 programmable DMA controller

2
Sample Memory Fill Using the 8237

● Channel 0 source register is programmed to point to the same address


● Channel 0 is put on hold mode
● Example: DOS video display must be cleared
● Video display contains 80 columns and 25 lines

● Let us write a procedure that clears an area of memory addressed by ES:DI

3
Sample Memory Fill Using the 8237

What you will have to do?

● command register is programmed so the channel 0 address is held


● Source address is programmed as the same address as ES:DI
● Destination is programmed as one location beyond ES:DI.

4
Sample Memory Fill Using the 8237
LATCHB EQU 10H
CLEARF EQU 7CH
CHOA EQU 70H
CH1A EQU 72H
CH1C EQU 73H
MODE EQU 7BH
CMMD EQU 78H
MASKS EQU 7FH
REQ EQU 79H
STATUS EQU 78H
ZERO EQU 0
CLEAR PROC NEAR USES AX

5
Sample Memory Fill Using the 8237

MOV AX,ES ;program latch B


MOV AL,AH
SHR AL,4
OUT LATCHB,AL

OUT CLEARF,AL ;clear F/L

MOV AL,ZERO ;save zero in first byte


MOV ES:[DI],AL

6
Sample Memory Fill Using the 8237
MOV AX,ES ;program source address
SHL AX,4
ADD AX,SI
OUT CH0A,AL
MOV AL,AH
OUT CH0A

MOV AX,ES ;program destination address


SHL AX,4
ADD AX,DI
OUT CH1A,AL
MOV AL,AH
OUT CH1A,AL

7
Sample Memory Fill Using the 8237

MOV AX,CX ;program count


DEC AX
OUT CH1C,AL
MOV AL,AH
OUT CH1C,AL

MOV AL, ____ ;program mode


OUT MODE,AL

MOV AL, ____


OUT MODE,AL

8
Mode Register
● Demand mode transfers data until an
external EOP is input or until the DREQ
input becomes inactive.
● Single mode releases the HOLD after
each byte of data is transferred. If the
DREQ pin is held active, the 8237 again
requests a DMA transfer through the
DRQ line to the microprocessor’s HOLD
input.
● Block mode automatically transfers the
number of bytes indicated by the count
register for the channel. DREQ need not
be held active through the block mode
transfer.
● Cascade mode is used when more than
one 8237 is present in a system.
9
Sample Memory Fill Using the 8237

MOV AX,CX ;program count


DEC AX
OUT CH1C,AL
MOV AL,AH
OUT CH1C,AL

MOV AL,88H ;program mode


OUT MODE,AL
MOV AL,85H
OUT MODE,AL

10
Sample Memory Fill Using the 8237
MOV AL, ;enable block hold transfer
OUT CMMD,AL

MOV AL, ;enable channel 0


OUT MASKS,AL

MOV AL, ;start DMA


OUT REQ,AL
.REPEAT

IN AL,STATUS
.UNTIL AL & ____
RET
CLEAR ENDP

11
Command Register

12
The mask register

● clears or sets all of the masks


with one command instead of
individual channels, as with
the MRSR.

13
Bus request register

● The bus request register


is used to request a DMA
transfer via software
● This is very useful in
memory-to-memory
transfers, where an
external signal is not
available to begin the
DMA transfer.

14
The Status Register

● The status register shows the status of


each DMA channel
● The TC bits indicate whether the
channel has reached its terminal count
(transferred all its bytes). Whenever the
terminal count is reached, the DMA
transfer is terminated for most modes of
operation.
● The request bits indicate whether the
DREQ input for a given channel is
active.

15
Sample Memory Fill Using the 8237
MOV AL,03H ;enable block hold transfer
OUT CMMD,AL

MOV AL,0EH ;enable channel 0


OUT MASKS,AL

MOV AL,4 ;start DMA


OUT REQ,AL

.REPEAT
IN AL,STATUS
.UNTIL AL & 1
RET
CLEAR ENDP

16
DMA-Processed Printer Interface

Latch is used to capture the data as it is sent to


the printer during the DMA transfer.

Write pulse passed through to the latch during the


DMA action also generates the data strobe signal
to the printer
The signal returns from the printer each time it is
ready for additional data. In this circuit, is used to
request a DMA action through a flip-flop.
17
DMA-Processed Printer Interface

Latch is used to capture the data as it is sent to


the printer during the DMA transfer.

Write pulse passed through to the latch during the


DMA action also generates the data strobe signal
to the printer
The signal returns from the printer each time it is
ready for additional data. In this circuit, is used to
request a DMA action through a flip-flop.
18
DMA-Processed Printer Interface

Printer Sends a Request (DREQ₃):

• When the printer is ready, it sends a DMA


request (DREQ₃).
• This sets the J-K flip-flop, which generates a
logic high (Q = 1), enabling the ACK line to
the printer.

19
DMA-Processed Printer Interface

DMA Controller Responds (DACK₃):

• The 8237 controller acknowledges (DACK₃)


and starts the data transfer from memory.
• DACK₃ is used to clear the flip-flop
(stopping ACK) and is also sent to:
• The OR gate, along with IORC (I/O read
command from 8237).
• The output of the OR gate enables the
'373 latch to capture data from the
memory data bus.

20
DMA-Processed Printer Interface

Data Latched & Sent to Printer:

• On each DACK₃ + IORC combo, a pulse


enables the '373 latch to grab data from
the data bus.
• The latched data is held stable and routed
to the printer's data input lines.

21
DMA-Processed Printer Interface

Printer Data Strobe (DS) Generation:


• The same pulse that latches data also
triggers the one-shot ('122) to generate
the DS pulse.
• DS tells the printer: "Here's your data!"

Printer Sends ACK:


• After receiving and processing data, the
printer asserts ACK to show it's ready
again.

22
A procedure that prints data via the printer interface
;Calling sequence:
; BX = offset address of printer data
; DS = segment address of printer data
; CX = number of bytes to print
LATCHB EQU 10H
CLEARF EQU 7CH
CH3A EQU 76H
CH1C EQU 77H
MODE EQU 7BH
CMMD EQU 78H
MASKS EQU 7FH
REQ EQU 79H

23
A procedure that prints data via the printer interface

PRINT PROC NEAR USES AX CX BX


MOV EAX,0
MOV AX,DS ;program latch B
SHR EAX,4
PUSH AX
SHR EAX,16
OUT LATCHB,AL
POP AX ;program address
OUT CH3A,AL
MOV AL,AH
OUT CH3A,AL

24
A procedure that prints data via the printer interface
MOV AX,CX ;program count
DEC AX
OUT CH3C,AL
MOV AL,AH
OUT CH3C,AL
MOV AL, ____ ;program mode
OUT MODE,AL
MOV AL, ____ ;enable block mode transfer
OUT CMMD,AL
MOV AL, ____ ;enable channel 3
OUT MASKS,AL
RET
PRINT ENDP

25
A procedure that prints data via the printer interface
MOV AX,CX ;program count
DEC AX
OUT CH3C,AL
MOV AL,AH
OUT CH3C,AL
MOV AL,0BH ;program mode
OUT MODE,AL
MOV AL,00H ;enable block mode transfer
OUT CMMD,AL
MOV AL,7 ;enable channel 3
OUT MASKS,AL
RET
PRINT ENDP

26
Secondary procedure

;A procedure that tests for completion of the DMA action


STATUS EQU 78H
TESTP PROC NEAR USES AX
.REPEAT
IN AL,STATUS
.UNTIL AL & 8
RET
TESTP ENDP

27
THANK YOU

28

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