PESD3V3C2UM

Extremely low capacitance unidirectional ESD protection

diode array
9 February 2024 Product data sheet

1. General description
Extremely low capacitance bidirectional ElectroStatic Discharge (ESD) protection diode array, part
of the TrEOS protection family. This device is housed in a DFN1006-3 (SOT883-2) leadless ultra
small Surface-Mounted Device (SMD) plastic package, designed to protect up to two signal lines
from the damage caused by ESD and other transients.

2. Features and benefits

• Unidirectional ESD protection of one line pair
• VRWM = 3.3 V device
• Very high surge robustness of 6.5 A for a 8/20 μs pulse
• Very low diode capacitance: Cd = 0.4 pF typical
• Extremely low clamping voltage to protect sensitive I/Os
• ESD protection up to ±15 kV according to IEC 61000-4-2
• Leadless ultra small SOT883-2 surface mount package
• IEC61000-4-4 robust up to level 4 (corresponds to 40 A into a 50 Ohm termination)

3. Applications
• Cellular handsets and accessories
• Portable electronics
• Communication systems
• Computers and peripherals
• USB2.0, USB3.0 data lines at 5 Gbps

4. Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VRWM reverse standoff [1] - - 3.3 V
voltage
Cd diode capacitance f = 1 MHz; VR = 0 V; Tamb = 25 °C [1] - 0.4 0.6 pF

[1] Measured from pin 1 or 2 to pin 3.

Nexperia PESD3V3C2UM
Extremely low capacitance unidirectional ESD protection diode array

5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 K1 cathode (diode 1)
3
2 K2 cathode (diode 2)
3 CA common anode K1
CA
1 2 K2

brb051
Transparent
top view
DFN1006-3 (SOT883-2)

6. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
PESD3V3C2UM DFN1006-3 Leadless ultra small plastic package; 3 solder lands; body SOT883-2
1.0 x 0.6 x 0.47 mm

7. Marking
Table 4. Marking codes
Type number Marking code
PESD3V3C2UM 6B

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Extremely low capacitance unidirectional ESD protection diode array

8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VRWM reverse standoff voltage [1] - 3.3 V
IPPM rated peak pulse current tp = 8/20 µs [1] [2] -6.5 6.5 A
Tamb ambient temperature -55 150 °C
Tstg storage temperature -65 150 °C
ESD maximum ratings
VESD electrostatic discharge IEC 61000-4-2; contact discharge [1] [3] -15 15 kV
voltage IEC 61000-4-2; air discharge [1] [3] -15 15 kV

[1] Measured from pin 1 or 2 to pin 3.

[2] Non-repetitive current pulse 8/20 μs exponentially decaying waveform according to IEC 61000-4-5.
[3] Device stressed with ten non-repetitive ESD pulses.

001aaa630 IPP
120
100 %
IPP 100 % IPP; 8 µs 90 %
(%)

80
e-t

50 % IPP; 20 µs

40

10 %

0 tr = 0.6 ns to 1 ns t
0 10 20 30 40 30 ns
t (µs)
60 ns 001aaa631

Fig. 2. ESD pulse waveform according to

Fig. 1. 8/20 µs pulse waveform according to IEC 61000-4-2
IEC 61000-4-5

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Extremely low capacitance unidirectional ESD protection diode array

9. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
VBR breakdown voltage IR = 1 mA; Tamb = 25 °C [1] - 8 - V
IRM reverse leakage current VRWM = 3.3 V; Tamb = 25 °C [1] - 1 50 nA
Cd diode capacitance f = 1 MHz; VR = 0 V; Tamb = 25 °C [1] - 0.4 0.6 pF
VCL clamping voltage ITLP = 8 A; tp = 100 ns; Tamb = 25 °C [1] [2] - 3.2 - V
ITLP = 16 A; tp = 100 ns; Tamb = 25 °C [1] [2] - 5 - V
IPPM = 6.5 A; tp = 8/20 µs; Tamb = 25 °C [1] [3] - 3.4 - V
Rdyn dynamic resistance IR = 10 A; Tamb = 25 °C [1] [2] - 0.27 - Ω
IR = -10 A; Tamb = 25 °C [1] [2] - 0.27 - Ω
f-3dB,dd differential cut-off normalized to attenuation at 1 MHz; [1] - 9.6 - GHz
frequency Tamb = 25 °C

[1] Measured from pin 1 or 2 to pin 3.

[2] Non-repetitive current pulse, Transmission Line Pulse (TLP); square pulse; ANSI / ESD STM5.5.1-2008.
[3] Device stressed with 8/20 μs exponential decay waveform according to IEC 61000-4-5.

aaa-034831 aaa-039047
2 0.5
Cd
S21dd
(pF)
(dB)
0.4
-2

0.3

-6

0.2

-10
0.1

-14 0
108 109 1010 1011 0 1 2 3 4
f (Hz) VR (V)

Fig. 3. Insertion loss; typical values Fig. 4. Capacitance as a function of reverse voltage;
typical values

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Extremely low capacitance unidirectional ESD protection diode array

aaa-034833 aaa-034834
20 0
IPP IPP
(A) (A)
16 -4

12 -8

8 -12

4 -16

0 -20
0 4 8 12 -12 -8 -4 0
VCL (V) VCL (V)

Transmission Line Pulse (TLP); Transmission Line Pulse (TLP);

tp = 100 ns; tr = 1 ns tp = 100 ns; tr = 1 ns
Fig. 5. Dynamic resistance with positive clamping; Fig. 6. Dynamic resistance with negative clamping;
typical values typical values
aaa-034835 aaa-034836
80 0

IPP IPP
(A) (A)

60 -20

40 -40

20 -60

0 -80
0 5 10 15 20 25 -25 -20 -15 -10 -5 0
VCL (V) VCL (V)

Very-Fast Transmission Line Pulse (VF-TLP); Very-Fast Transmission Line Pulse (VF-TLP);
tp = 5 ns; tr = 600 ps tp = 5 ns; tr = 600 ps
Fig. 7. Dynamic resistance with positive clamping; Fig. 8. Dynamic resistance with negative clamping;
typical values typical values

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Nexperia PESD3V3C2UM
Extremely low capacitance unidirectional ESD protection diode array

aaa-034837 aaa-034838
8 0

IPP IPP
(A) (A)

6 -2

4 -4

2 -6

0 -8
0 1 2 3 4 5 -5 -4 -3 -2 -1 0
VCL (V) VCL (V)

IEC 61000-4-5; tp = 8/20 μs; positive pulse IEC 61000-4-5; tp = 8/20 μs; negative pulse
Fig. 9. Dynamic resistance with positive clamping; Fig. 10. Dynamic resistance with negative clamping;
typical values typical values

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Nexperia PESD3V3C2UM
Extremely low capacitance unidirectional ESD protection diode array

10. Application information

The device is designed for the protection of two uni-directional or one bi-directional data or signal
lines from surge pulses and ESD damage.
The device uses an advanced clamping structure showing a negative dynamic resistance.
This snap-back behavior strongly reduces the clamping voltage to the system behind the ESD
protection during an ESD event. Do not connect unlimited DC current sources to the data lines to
avoid keeping the ESD protection device in snap-back state after exceeding breakdown voltage
(due to an ESD pulse for instance).

line 1 to be protected line 1 to be protected

line 2 to be protected

ESD protection
device ESD protection
device

GND GND

bidirectional protection unidirectional protection

of one line of two lines
006aab252

Fig. 11. Application diagram

Circuit board layout and protection device placement

Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge
transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. Minimize the path length between the device and the protected line.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Use ground planes whenever possible. For multilayer PCBs, use ground vias.

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Extremely low capacitance unidirectional ESD protection diode array

11. Package outline

Leadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.47 mm SOT883-2

b1
3

L1

e1

L
(2x)

2 1
v C A B
b
(2x) w C
e

y1 C

A
C

seating plane
y C
A1
3x
D A B

0 1 mm
scale

u C
2x
u C
2x
Dimensions

Unit A A1 b b1 D E e e1 L L1 u v w y y1

max 0.50 0.03 0.20 0.55 0.30 0.30

mm nom 0.47 0.15 0.50 0.60 1.00 0.35 0.65 0.25 0.25 0.05 0.1 0.05 0.05 0.05
min 0.44 0.10 0.45 0.20 0.20
sot883-2_po

Outline References European

Issue date
version IEC JEDEC JEITA projection
21-10-19
SOT883-2 --- 21-11-03

Fig. 12. Package outline DFN1006-3 (SOT883-2)

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Nexperia PESD3V3C2UM
Extremely low capacitance unidirectional ESD protection diode array

12. Soldering
Footprint information for reflow soldering of DFN1006-3 package SOT883-2

1.3

0.7
R0.05 (20x)

0.35
(2x)

0.9 0.45 0.6 0.7 0.8

0.25
(2x)

0.3 (2x) 0.3

0.4 (2x) 0.4

0.5 (2x) 0.5

occupied area solder resist

solder lands solder paste

Dimensions in mm

21-10-18
Issue date sot883-2_fr

Fig. 13. Reflow soldering footprint for DFN1006-3 (SOT883-2)

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Extremely low capacitance unidirectional ESD protection diode array

13. Revision history

Table 7. Revision history
Data sheet ID Release date Data sheet status Change notice Supersedes
PESD3V3C2UM v.1 20240209 Product data sheet - -

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Extremely low capacitance unidirectional ESD protection diode array
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Draft — The document is a draft version only. The content is still under the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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Extremely low capacitance unidirectional ESD protection diode array

Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 3
9. Characteristics.............................................................. 4
10. Application information............................................. 7
11. Package outline.......................................................... 8
12. Soldering..................................................................... 9
13. Revision history........................................................10
14. Legal information......................................................11

© Nexperia B.V. 2024. All rights reserved

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Date of release: 9 February 2024

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