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Drift AMD Logic Schematics: 003-FP5 PCIE/SATA I/F

The document contains detailed schematics and block diagrams for the Drift AMD Logic, including various components such as memory interfaces, audio connectors, and USB connections. It is marked as proprietary and confidential, with restrictions on its distribution and use. The document is structured into sections that outline specific hardware connections and specifications relevant to the design.

Uploaded by

Mario Negro Jimarez
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
67 views67 pages

Drift AMD Logic Schematics: 003-FP5 PCIE/SATA I/F

The document contains detailed schematics and block diagrams for the Drift AMD Logic, including various components such as memory interfaces, audio connectors, and USB connections. It is marked as proprietary and confidential, with restrictions on its distribution and use. The document is structured into sections that outline specific hardware connections and specifications relevant to the design.

Uploaded by

Mario Negro Jimarez
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 67

5 4 3 2 1

Drift AMD Logic Schematics


001_TITLE PAGE 036_M.2 SOCKET WWAN
D

002_BLOCK DIAGRAM 037_MEDIA CARD CONTROLLER D

003-FP5 PCIE/SATA I/F 038_AUDIO ALC3287-CG


004-FP5 Memory_CHB 039_AUDIO CONNECTOR
005-FP5 Memory_CHA 040_AUDIO_JACK IN_DEBUG
006-FP5 DP/JTAG/SVI2/MISC 041_AUDIO EXT MIC I/F
007-FP5 AZ/I2C/ACPI/GPIO 042_AUDIO SPEAKER
008-FP5 CLK/LPC/SD/EMMC/UART 043_AUDIO BEEP
009-FP5 USB/WIFI/CAM 044_EC_IT8186E/FX
010-FP5 POWER 045_THERMAL SENSOR
011-FP5 GND 046_CHARGE LED
C
012_LPC DEBUG CONN 047_KEYBOARD/TRACK POINT C

013_RTC BATTERY 048_TOUCH PAD/NFC/FPR/SCR


014_SWITCH 049_FAN CONNECTOR
015_SMBUS 050_APS G-SENSOR
016_DDR4 SO DIMM CHANNEL-B 051_DISCRETE TPM 2.0
017_DDR4 MD CHANNEL-A 052_LOAD SWITCH1
018_LCD/LID/MIC/CAMERA/PWR SW 053_LOAD SWITCH2
019_USB HUB 054_OTP
020_HDMI RETIMER 055_DC-IN
021_HDMI CONNECTOR 056_BATTERY INPUT
022_TYPE-C_USB/DP redriver1 057_BATTERY CHARGER(BQ25700A)
B

023_DOCK_USB/DP redriver2 058_DC/DC+3VALW(TPS51393P) B

024_USB PD CONNTROLLER 059_DC/DC+5VALW_PD(NB693GQ)


025_DOCKING CONNECTOR 060_DC/DC+5VALW(NB690)
026_USB_TYPE-C CONNECTOR 061_+VDD_CORE/CORENB (ISL62771)
027_USBA REDRIVER 062_+VDD_CORE /CORENB DECOUPE
028_BLANK 063_+0.9VALWP(NB693)
029_M.2 SSD CONNECTOR 064_DC/DC+1.2VP(NB687)
030_USB POWER/CONN 065_DC/DC_+1.8VALW(RT8068A)
031_SYSTEM LAN 8111GUL 066_PWR-Power Diagram
032_DOCK LAN 8111EPV 067_SCREW
A
033_BLANK A

034_SYSTEM LAN CONNECTOR


035_M.2 SOCKET WLAN
Security Classification LC Future Center Secret Data Title
Issued Date 2015/11/02 Deciphered Date 2015/8/10 TITLE PAGE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 1 of 67
5 4 3 2 1
1

TABLE: Chip Capacitor Thermal Characteristics


DDR4 / 1.2V
Code
LCD CONN
eDP 14" DP0x2
Channel B DDR4
-55 to 150degC +/-30ppm/degC NPO
HD/FHD DDR4 SO-DIMM -55 to 125degC +/-30ppm/degC C0G
18
16
Re-timer Parade -55 to 125degC +/-15% X7R
HDMI 2.0 PS8409AQFN48GTR2-A2 DP1 -55 to 105degC +/-22% X6S
Connector Channel A DDR4 -55 to 85degC +/-15% X5R
21 20
DDR4 Memory down
Antenna
USB Type-C Conn USB&DP repeater 17 Antenna
USBC0
Full function type C TI TUSB1044RNQ
26 22
APU HDT 6
(M.2 WLAN Card) (M.2 WWAN Card)
APU LPC 12
Bluetooth 35 36
PD Controller
I2C
SN1701012RJTR
24
AMD Picasso FP5 SD Type-A M.2 Card Type-B M.2 Card
Card Slot
37
SIM
Side Dock(CS18) Card Slot
USB Type-C Conn USB&DP repeater
USBC1 Multi-Media Controller
Full function type C TI TUSB1044RNQ RTS5232S-GR REALTEK USB2.0_1 port0 USB2.0 36
23
25 GL9750-OIYL3 GENESYS 37 HUB2 P3

USB 3.0 Gen 1 AOU USB AOU USB GPP0 X1


USB3 Port 1 GPP3 X1
AOU Small Board Small Board Conn GFX0 X1
PS8713BTQFN24GTR2-A2 30

USB 3.1 Gen 2 USB 3.1 repeater GPP4:7 X4


PS8811QFN36GTR2 USB3 Port 2 SSD
CONN (JUSB2) GPP[0:7]
30 27 29

USB Type-C Conn GPP1 X1 GPP2 X1


HDA
Full function type C26 USB2.0_0 port0 USB2.0 X6

USB 3.1 Gen 1 SPI Flash LAN Chip W/DASH LAN Chip W/O DASH
AOU (JUSB1) 30 USB2.0_0 port1 128Mbits (SPI1) ALC3287-CG HDA CODEC RTL8111EPV-CG RTL8111GUL
S IC ALC3287-CG MQFN
S IC FL 128M 48P AUDIO CODEC S IC RTL8111EPV-CG S IC RTL8111GUL-CG
USB 3.1 Gen 2 3,4,5,6,7,8,9,10,11,12 W25Q128FWSIQ
8 38 QFN 48P CONTROLLER
32
QFN 32P E-LAN CTRL
31
CONN (JUSB2) 30 USB2.0_0 port2 RTC Battery 13 SOIC 8P 1.8V
A A

Side Dock (CS18) Stereo


full function type-C25 USB2.0_0 port3 Speaker
42
Side Dock MAGNETICS
Internal (CS18)
RJ45 Small Board
FA N TPM 2.0
NPCT750LABYX
Mic 25 34
49
USB2.0 ST33HTPH2E32AHC0 Microphone 18
M.2 WWAN 36 Only reserve Headphone
G-Sensor 51
LIS2DWLTR 50 39
KX022-1020

USB2.0 USB2.0_1 port0


M.2 WLAN BT 35
Thermal Sensor
F75303M MSOP 10P
SM Bus Embedded
Controller
45 S IC IT8186VG-192/BX
VFBGA CONTROLLER TABLE: Chip Part Dimension
LED for ThinkPad Logos
USB2.0 Audio 39
44 Combo Jack Size [mm] mm Size Code Inch Size Code
Camera 18 USB2.0 HUB1 P1
GL852G-OHY50
USB2.0 Hub1

USB2.0 SM Bus TABLE: Chip Capacitor Tolerance 0.40 x 0.20 0402 01005
Smart Cart 48 USB2.0 HUB1 P2 0.60 x 0.30 0603 0201
1.00 x 0.50 1005 0402
USB2.0_1 port1 Tolerance Code 1.60 x 0.80 1608 0603
USB2.0 External Connector/Socket 2.00 x 1.25 2125 0805
Touch Panel 18 USB2.0 HUB1 P3 Keyboard Power Button +/-0.25pF 2.00 x 1.60 2016 0806
C
ClickPad Internal Connector/Socket 2.50 x 2.00 2520 1008
+/-0.5pF D
3.20 x 1.60 3216 1206
USB2.0 48 47 18 3225 1210
3.20 x 2.50
Fingerprint 48 USB2.0 HUB2 P4 +/-5% J 4.50 x 1.60 4516 1806
+/-10% K 4.50 x 2.50 4525 1810
19 4532 1812
+/-20% M 4.50 x 3.20
+80/-20% Z 5.00 x 2.50 5025 2010
6.40 x 3.20 6432 2512

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 BLOCK DIAGRAM


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 2 of 67
1
5 4 3 2 1

D D
UC1B
PCIE

CC8814 1 2 0.1U_6.3V_K_X5R_0201 GPP_CR_TXP1_C N1 P8


37 GPP_CR_TXP1 GPP_CR_TXN1_C P_GFX_TXP0 P_GFX_RXP0 GPP_CR_RXP1 37
CR CC8815 1 2 0.1U_6.3V_K_X5R_0201 N3 P9 CR
37 GPP_CR_TXN1 P_GFX_TXN0 P_GFX_RXN0 GPP_CR_RXN1 37
M2 N6
M4 P_GFX_TXP1 P_GFX_RXP1 N7
P_GFX_TXN1 P_GFX_RXN1
L2 M8
L4 P_GFX_TXP2 P_GFX_RXP2 M9
P_GFX_TXN2 P_GFX_RXN2
L1 L6
L3 P_GFX_TXP3 P_GFX_RXP3 L7
P_GFX_TXN3 P_GFX_RXN3
K2 K11
K4 P_GFX_TXP4 P_GFX_RXP4 J11
P_GFX_TXN4 P_GFX_RXN4
J2 H6
J4 P_GFX_TXP5 P_GFX_RXP5 H7
P_GFX_TXN5 P_GFX_RXN5
H1 G6
H3 P_GFX_TXP6 P_GFX_RXP6 F7
P_GFX_TXN6 P_GFX_RXN6
H2 G8
H4 P_GFX_TXP7 P_GFX_RXP7 F8
P_GFX_TXN7 P_GFX_RXN7

CC8821 2 1 0.1U_0201_6.3V6-K GPP_WLAN_TXP_C N2 N10


C 35 GPP_WLAN_TXP GPP_WLAN_TXN_C P_GPP_TXP0 P_GPP_RXP0 GPP_WLAN_RXP 35 C
WLAN CC8820 2 1 0.1U_0201_6.3V6-K P3 N9 WLAN
35 GPP_WLAN_TXN P_GPP_TXN0 P_GPP_RXN0 GPP_WLAN_RXN 35
CC8819 2 1 0.1U_0201_6.3V6-K GPP_LAN_TXP_C P4 L10
32 GPP_LAN_TXP GPP_LAN_TXN_C P_GPP_TXP1 P_GPP_RXP1 GPP_LAN_RXP 32
DOCK LAN W/ DASH CC8818 2 1 0.1U_0201_6.3V6-K P2 L9 DOCK LAN W/ DASH
32 GPP_LAN_TXN P_GPP_TXN1 P_GPP_RXN1 GPP_LAN_RXN 32
CC8817 2 1 0.1U_0201_6.3V6-K GPP_SYS_LAN_TXP_C R3 L12
31 GPP_SYS_LAN_TXP GPP_SYS_LAN_TXN_C P_GPP_TXP2 P_GPP_RXP2 GPP_SYS_LAN_RXP 31
SYS LAN W/O DASH CC8816 2 1 0.1U_0201_6.3V6-K R1 M11 SYS LAN W/O DASH
31 GPP_SYS_LAN_TXN P_GPP_TXN2 P_GPP_RXN2 GPP_SYS_LAN_RXN 31
CC8823 1 2 0.22U_6.3V_K_X5R_0201 GPP_WWAN_TXP0_C T4 P12
36 GPP_WWAN_TXP0 GPP_WWAN_TXN0_C P_GPP_TXP3 P_GPP_RXP3 GPP_WWAN_RXP0 36 WWAN/2nd SSD
WWAN/2nd SSD CC8822 1 2 0.22U_6.3V_K_X5R_0201 T2 P11
36 GPP_WWAN_TXN0 P_GPP_TXN3 P_GPP_RXN3 GPP_WWAN_RXN0 36

CC8826 2 1 0.22U_0201_6.3V6-K GPP_SSD_TXP4_C W2 V6


29 PCIE_SSD_TX_P4 GPP_SSD_TXN4_C P_GPP_TXP4 P_GPP_RXP4 PCIE_SSD_RX_P4 29
CC8827 2 1 0.22U_0201_6.3V6-K W4 V7
29 PCIE_SSD_TX_N4 P_GPP_TXN4 P_GPP_RXN4 PCIE_SSD_RX_N4 29
CC8829 2 1 0.22U_0201_6.3V6-K GPP_SSD_TXP5_C W3 T8
29 PCIE_SSD_TX_P5 GPP_SSD_TXN5_C P_GPP_TXP5 P_GPP_RXP5 PCIE_SSD_RX_P5 29
CC8828 2 1 0.22U_0201_6.3V6-K V2 T9 PCIE_SSD_RX_N5 29
29 PCIE_SSD_TX_N5 P_GPP_TXN5 P_GPP_RXN5
SSD/HDD 2 1 GPP_SSD_TXP6_C V1 R6
SSD/HDD
CC8830 0.22U_0201_6.3V6-K PCIE_SSD_RX_P6 29
29 PCIE_SSD_TX_P6 GPP_SSD_TXN6_C P_GPP_TXP6/SATA_TXP0 P_GPP_RXP6/SATA_RXP0
CC8831 2 1 0.22U_0201_6.3V6-K V3 R7 PCIE_SSD_RX_N6 29
29 PCIE_SSD_TX_N6 P_GPP_TXN6/SATA_TXN0 P_GPP_RXN6/SATA_RXN0
CC8833 2 1 0.22U_0201_6.3V6-K GPP_SSD_TXP7_C/SATA_TXP1_C U2 R9
29 PCIE_SSD_TX_P7 GPP_SSD_TXN7_C/SATA_TXN1_C P_GPP_TXP7/SATA_TXP1 P_GPP_RXP7/SATA_RXP1 PCIE_SSD_RX_P7 29
CC8832 2 1 0.22U_0201_6.3V6-K U4 R10 PCIE_SSD_RX_N7 29
29 PCIE_SSD_TX_N7 P_GPP_TXN7/SATA_TXN1 P_GPP_RXN7/SATA_RXN1

FP5 REV 0.90


PART 2 OF 13

AMD-RAVEN-FP5_BGA1140
@

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 PCIE/SATA I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 3 of 67
5 4 3 2 1
5 4 3 2 1

DDRA_MA_DM[0..7] 16

DDR_A_DQS#[0..7] 16

UC1I DDR_A_DQS[0..7] 16
MEMORY B
DDR_A_D[0..63] 16
DDR_A_MA0 AG30
DDR_A_MA1 MB_ADD0/MBB_CS0 DDR_A_D0 DDR_A_MA[0..13] 16
AC32 B21
DDR_A_MA2 AC30 MB_ADD1/RSVD MB_DATA0/MBA_DATA8 D21 DDR_A_D1
DDR_A_MA3 AB29 MB_ADD2/RSVD MB_DATA1/MBA_DATA9 B23 DDR_A_D2
DDR_A_MA4 AB31 MB_ADD3/RSVD MB_DATA2/MBA_DATA13 D23 DDR_A_D3
DDR_A_MA5 AA30 MB_ADD4/RSVD MB_DATA3/MBA_DATA12 A20 DDR_A_D4
D DDR_A_MA6 AA29 MB_ADD5/RSVD MB_DATA4/MBA_DATA11 C20 DDR_A_D5 D
DDR_A_MA7 Y30 MB_ADD6/RSVD MB_DATA5/MBA_DATA10 A22 DDR_A_D6
DDR_A_MA8 AA31 MB_ADD7/MBA_CA3 MB_DATA6/MBA_DATA15 C22 DDR_A_D7
DDR_A_MA9 W29 MB_ADD8/MBA_CA4 MB_DATA7/MBA_DATA14
DDR_A_MA10 AH29 MB_ADD9/MBA_CKE1 D24 DDR_A_D8
DDR_A_MA11 Y32 MB_ADD10/MBB_CKE0 MB_DATA8/MBA_DATA0 A25 DDR_A_D9
DDR_A_MA12 W31 MB_ADD11/MBA_CA5 MB_DATA9/MBA_DATA1 D27 DDR_A_D10
DDR_A_MA13 AL30 MB_ADD12/MBA_CA2 MB_DATA10/MBA_DATA5 C27 DDR_A_D11
DDR_A_WE# AK30 MB_ADD13_BANK2/RSVD MB_DATA11/MBA_DATA4 C23 DDR_A_D12
16 DDR_A_WE# DDR_A_CAS# MB_WE_L_ADD14/MBB_CA2 MB_DATA12/MBA_DATA7 DDR_A_D13
AK32 B24
16 DDR_A_CAS# DDR_A_RAS# MB_CAS_L_ADD15/MBB_CA4 MB_DATA13/MBA_DATA6 DDR_A_D14
AJ30 C26
16 DDR_A_RAS# MB_RAS_L_ADD16/MBB_CA3 MB_DATA14/MBA_DATA2 DDR_A_D15
B27
MB_DATA15/MBA_DATA3
DDR_A_BA0 AH31 C30 DDR_A_D16
16 DDR_A_BA0 DDR_A_BA1 MB_BANK0/MBB_CS1 MB_DATA16/MBA_DATA19 DDR_A_D17
AG32 E29
16 DDR_A_BA1 MB_BANK1/MBB_CA0 MB_DATA17/MBA_DATA18 DDR_A_D18
H29
DDR_A_BG0 V31 MB_DATA18/MBA_DATA22 H31 DDR_A_D19
16 DDR_A_BG0 DDR_A_BG1 MB_BG0/MBA_CS1 MB_DATA19/MBA_DATA23 DDR_A_D20
V29 A28
16 DDR_A_BG1 MB_BG1/MBA_CKE0 MB_DATA20/MBA_DATA20 DDR_A_D21
D28
DDR_A_ACT_N V30 MB_DATA21/MBA_DATA21 F31 DDR_A_D22
16 DDR_A_ACT_N MB_ACT_L/MBA_CS0 MB_DATA22/MBA_DATA17 DDR_A_D23
G30
DDRA_MA_DM0 C21 MB_DATA23/MBA_DATA16
DDRA_MA_DM1 C25 MB_DM0/MBA_DM1 J29 DDR_A_D24
DDRA_MA_DM2 E32 MB_DM1/MBA_DM0 MB_DATA24/MBA_DATA30 J31 DDR_A_D25
DDRA_MA_DM3 K30 MB_DM2/MBA_DM2 MB_DATA25/MBA_DATA31 L29 DDR_A_D26
DDRA_MA_DM4 AP30 MB_DM3/MBA_DM3 MB_DATA26/MBA_DATA26 L31 DDR_A_D27
DDRA_MA_DM5 AW31 MB_DM4/MBB_DM2 MB_DATA27/MBA_DATA27 H30 DDR_A_D28
DDRA_MA_DM6 BB26 MB_DM5/MBB_DM3 MB_DATA28/MBA_DATA28 H32 DDR_A_D29
DDRA_MA_DM7 BD22 MB_DM6/MBB_DM1 MB_DATA29/MBA_DATA29 L30 DDR_A_D30
N32 MB_DM7/MBB_DM0 MB_DATA30/MBA_DATA25 L32 DDR_A_D31
RSVD_21 MB_DATA31/MBA_DATA24
DDR_A_DQS0 D22 AP29 DDR_A_D32
C DDR_A_DQS#0 B22 MB_DQS_H0/MBA_DQS_H1 MB_DATA32/MBB_DATA16 AP32 DDR_A_D33 C
DDR_A_DQS1 D25 MB_DQS_L0/MBA_DQS_L1 MB_DATA33/MBB_DATA17 AT29 DDR_A_D34
DDR_A_DQS#1 B25 MB_DQS_H1/MBA_DQS_H0 MB_DATA34/MBB_DATA21 AU32 DDR_A_D35
DDR_A_DQS2 F29 MB_DQS_L1/MBA_DQS_L0 MB_DATA35/MBB_DATA20 AN30 DDR_A_D36
DDR_A_DQS#2 F30 MB_DQS_H2/MBA_DQS_H2 MB_DATA36/MBB_DATA19 AP31 DDR_A_D37
DDR_A_DQS3 K31 MB_DQS_L2/MBA_DQS_L2 MB_DATA37/MBB_DATA18 AR30 DDR_A_D38
DDR_A_DQS#3 K29 MB_DQS_H3/MBA_DQS_H3 MB_DATA38/MBB_DATA23 AT31 DDR_A_D39
DDR_A_DQS4 AR29 MB_DQS_L3/MBA_DQS_L3 MB_DATA39/MBB_DATA22
DDR_A_DQS#4 AR31 MB_DQS_H4/MBB_DQS_H2 AU29 DDR_A_D40
DDR_A_DQS5 AW30 MB_DQS_L4/MBB_DQS_L2 MB_DATA40/MBB_DATA24 AV30 DDR_A_D41
DDR_A_DQS#5 AW29 MB_DQS_H5/MBB_DQS_H3 MB_DATA41/MBB_DATA25 BB30 DDR_A_D42
DDR_A_DQS6 BC25 MB_DQS_L5/MBB_DQS_L3 MB_DATA42/MBB_DATA29 BA28 DDR_A_D43
DDR_A_DQS#6 BA25 MB_DQS_H6/MBB_DQS_H1 MB_DATA43/MBB_DATA28 AU30 DDR_A_D44
DDR_A_DQS7 BC22 MB_DQS_L6/MBB_DQS_L1 MB_DATA44/MBB_DATA31 AU31 DDR_A_D45
DDR_A_DQS#7 BA22 MB_DQS_H7/MBB_DQS_H0 MB_DATA45/MBB_DATA30 AY32 DDR_A_D46
N31 MB_DQS_L7/MBB_DQS_L0 MB_DATA46/MBB_DATA26 AY29 DDR_A_D47
N29 RSVD_20 MB_DATA47/MBB_DATA27
RSVD_18 BA27 DDR_A_D48
SA_CLK_DDR0 AC31 MB_DATA48/MBB_DATA11 BC27 DDR_A_D49
16 SA_CLK_DDR0 SA_CLK_DDR#0 MB_CLK_H0/MBA_CKT MB_DATA49/MBB_DATA10 DDR_A_D50
AD30 BA24
16 SA_CLK_DDR#0 SA_CLK_DDR1 MB_CLK_L0/MBA_CKC MB_DATA50/MBB_DATA14 DDR_A_D51
AD29 BC24
16 SA_CLK_DDR1 SA_CLK_DDR#1 MB_CLK_H1/MBB_CKT MB_DATA51/MBB_DATA15 DDR_A_D52
AD31 BD28
16 SA_CLK_DDR#1 MB_CLK_L1/MBB_CKC MB_DATA52/MBB_DATA12 DDR_A_D53
AE30 BB27
AE32 RSVD_89 MB_DATA53/MBB_DATA13 BB25 DDR_A_D54
AF29 RSVD_90 MB_DATA54/MBB_DATA9 BD25 DDR_A_D55
AF31 RSVD_91 MB_DATA55/MBB_DATA8
RSVD_92 BC23 DDR_A_D56
DDR_A_CS0# AJ31 MB_DATA56/MBB_DATA6 BB22 DDR_A_D57
16 DDR_A_CS0# DDR_A_CS1# MB_CS_L0/MBB_CKE1 MB_DATA57/MBB_DATA7 DDR_A_D58
AM31 BC21
16 DDR_A_CS1# MB_CS_L1/RSVD MB_DATA58/MBB_DATA2 DDR_A_D59
AJ29 BD20
AM29 RSVD_95 MB_DATA59/MBB_DATA3 BB23 DDR_A_D60
RSVD_97 MB_DATA60/MBB_DATA4 BA23 DDR_A_D61
B MB_DATA61/MBB_DATA5 BB21 DDR_A_D62 B
MB_DATA62/MBB_DATA1 BA21 DDR_A_D63
DDR_A_CKE0 U29 MB_DATA63/MBB_DATA0
16 DDR_A_CKE0 DDR_A_CKE1 MB_CKE0/MBA_CA0
T30 M31
16 DDR_A_CKE1 MB_CKE1/MBA_CA1 RSVD_17
V32 N30
U31 RSVD_93 RSVD_19 P31
RSVD_94 RSVD_26 R32
DDR_A_ODT0 AL31 RSVD_29 M30
16 DDR_A_ODT0 DDR_A_ODT1 MB_ODT0/MBB_CA5 RSVD_16
AM32 M29
16 DDR_A_ODT1 MB_ODT1/RSVD RSVD_15
AL29 P30
AM30 RSVD_96 RSVD_25 P29
RSVD_98 RSVD_24
DDR_A_ALERT_N W30
16 DDR_A_ALERT_N MB_ALERT_L/MB_TEST DDR_A_PARITY
AG31 DDR_A_PARITY 16
DDR_A_EVENT# AG29 MB_PAROUT/MBB_CA1
16 DDR_A_EVENT# DDR4_A_DRAMRST# T31 MB_EVENT_L
16 DDR4_A_DRAMRST# MB_RESET_L
FP5 REV 0.90
PART 9 OF 13

AMD-RAVEN-FP5_BGA1140
@

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 Memory
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 4 of 67
5 4 3 2 1
5 4 3 2 1

DDRA_MB_DM[0..7] 17

DDR_B_DQS#[0..7] 17

DDR_B_DQS[0..7] 17

DDR_B_D[0..63] 17

DDR_B_MA[0..13] 17
UC1A
MEMORY A

DDR_B_MA0 AF25
D DDR_B_MA1 AE23 MA_ADD0/MAB_CS0 J21 DDR_B_D0 D
DDR_B_MA2 AD27 MA_ADD1/RSVD MA_DATA0/MAA_DATA8 H21 DDR_B_D1
DDR_B_MA3 AE21 MA_ADD2/RSVD MA_DATA1/MAA_DATA9 F23 DDR_B_D2
DDR_B_MA4 AC24 MA_ADD3/RSVD MA_DATA2/MAA_DATA13 H23 DDR_B_D3
DDR_B_MA5 AC26 MA_ADD4/RSVD MA_DATA3/MAA_DATA12 G20 DDR_B_D4
DDR_B_MA6 AD21 MA_ADD5/RSVD MA_DATA4/MAA_DATA11 F20 DDR_B_D5
DDR_B_MA7 AC27 MA_ADD6/RSVD MA_DATA5/MAA_DATA10 J22 DDR_B_D6
DDR_B_MA8 AD22 MA_ADD7/MAA_CA3 MA_DATA6/MAA_DATA15 J23 DDR_B_D7
DDR_B_MA9 AC21 MA_ADD8/MAA_CA4 MA_DATA7/MAA_DATA14
DDR_B_MA10 AF22 MA_ADD9/MAA_CKE1 G25 DDR_B_D8
DDR_B_MA11 AA24 MA_ADD10/MAB_CKE0 MA_DATA8/MAA_DATA0 F26 DDR_B_D9
DDR_B_MA12 AC23 MA_ADD11/MAA_CA5 MA_DATA9/MAA_DATA1 L24 DDR_B_D10
DDR_B_MA13 AJ25 MA_ADD12/MAA_CA2 MA_DATA10/MAA_DATA5 L26 DDR_B_D11
DDR_B_WE# AG27 MA_ADD13_BANK2/RSVD MA_DATA11/MAA_DATA4 L23 DDR_B_D12
17 DDR_B_WE# DDR_B_CAS# AG23 MA_WE_L_ADD14/MAB_CA2 MA_DATA12/MAA_DATA7 F25 DDR_B_D13
17 DDR_B_CAS# DDR_B_RAS# AG26 MA_CAS_L_ADD15/MAB_CA4 MA_DATA13/MAA_DATA6 K25 DDR_B_D14
17 DDR_B_RAS# MA_RAS_L_ADD16/MAB_CA3 MA_DATA14/MAA_DATA2 K27 DDR_B_D15
MA_DATA15/MAA_DATA3
DDR_B_BA0 AF21 M25 DDR_B_D16
17 DDR_B_BA0 DDR_B_BA1 AF27 MA_BANK0/MAB_CS1 MA_DATA16/MAA_DATA17 M27 DDR_B_D17
17 DDR_B_BA1 MA_BANK1/MAB_CA0 MA_DATA17/MAA_DATA16 P27 DDR_B_D18
DDR_B_BG0 AA21 MA_DATA18/MAA_DATA23 R24 DDR_B_D19
17 DDR_B_BG0 DDR_B_BG1 AA27 MA_BG0/MAA_CS1 MA_DATA19/MAA_DATA20 L27 DDR_B_D20
17 DDR_B_BG1 MA_BG1/MAA_CKE0 MA_DATA20/MAA_DATA19 M24 DDR_B_D21
DDR_B_ACT_N AA22 MA_DATA21/MAA_DATA18 P24 DDR_B_D22
17 DDR_B_ACT_N MA_ACT_L/MAA_CS0 MA_DATA22/MAA_DATA21 P25 DDR_B_D23
DDRA_MB_DM0 F21 MA_DATA23/MAA_DATA22
DDRA_MB_DM1 G27 MA_DM0/MAA_DM1 M22 DDR_B_D24
DDRA_MB_DM2 N24 MA_DM1/MAA_DM0 MA_DATA24/MAA_DATA30 N21 DDR_B_D25
DDRA_MB_DM3 N23 MA_DM2/MAA_DM2 MA_DATA25/MAA_DATA31 T22 DDR_B_D26
DDRA_MB_DM4 AL24 MA_DM3/MAA_DM3 MA_DATA26/MAA_DATA26 V21 DDR_B_D27
DDRA_MB_DM5 AN27 MA_DM4/MAB_DM2 MA_DATA27/MAA_DATA27 L21 DDR_B_D28
C DDRA_MB_DM6 AW25 MA_DM5/MAB_DM3 MA_DATA28/MAA_DATA28 M20 DDR_B_D29 C
DDRA_MB_DM7 AT21 MA_DM6/MAB_DM1 MA_DATA29/MAA_DATA29 R23 DDR_B_D30
T27 MA_DM7/MAB_DM0 MA_DATA30/MAA_DATA24 T21 DDR_B_D31
RSVD_36 MA_DATA31/MAA_DATA25
DDR_B_DQS0 F22 AL27 DDR_B_D32
DDR_B_DQS#0 G22 MA_DQS_H0/MAA_DQS_H1 MA_DATA32/MAB_DATA16 AL25 DDR_B_D33
DDR_B_DQS1 H27 MA_DQS_L0/MAA_DQS_L1 MA_DATA33/MAB_DATA17 AP26 DDR_B_D34
DDR_B_DQS#1 H26 MA_DQS_H1/MAA_DQS_H0 MA_DATA34/MAB_DATA22 AR27 DDR_B_D35
DDR_B_DQS2 N27 MA_DQS_L1/MAA_DQS_L0 MA_DATA35/MAB_DATA20 AK26 DDR_B_D36
DDR_B_DQS#2 N26 MA_DQS_H2/MAA_DQS_H2 MA_DATA36/MAB_DATA19 AK24 DDR_B_D37
DDR_B_DQS3 R21 MA_DQS_L2/MAA_DQS_L2 MA_DATA37/MAB_DATA18 AM24 DDR_B_D38
DDR_B_DQS#3 P21 MA_DQS_H3/MAA_DQS_H3 MA_DATA38/MAB_DATA23 AP27 DDR_B_D39
DDR_B_DQS4 AM26 MA_DQS_L3/MAA_DQS_L3 MA_DATA39/MAB_DATA21
DDR_B_DQS#4 AM27 MA_DQS_H4/MAB_DQS_H2 AM23 DDR_B_D40
DDR_B_DQS5 AN24 MA_DQS_L4/MAB_DQS_L2 MA_DATA40/MAB_DATA30 AM21 DDR_B_D41
DDR_B_DQS#5 AN25 MA_DQS_H5/MAB_DQS_H3 MA_DATA41/MAB_DATA31 AR25 DDR_B_D42
DDR_B_DQS6 AU23 MA_DQS_L5/MAB_DQS_L3 MA_DATA42/MAB_DATA26 AU27 DDR_B_D43
DDR_B_DQS#6 AT23 MA_DQS_H6/MAB_DQS_H1 MA_DATA43/MAB_DATA27 AL22 DDR_B_D44
DDR_B_DQS7 AV20 MA_DQS_L6/MAB_DQS_L1 MA_DATA44/MAB_DATA28 AL21 DDR_B_D45
DDR_B_DQS#7 AW20 MA_DQS_H7/MAB_DQS_H0 MA_DATA45/MAB_DATA29 AP24 DDR_B_D46
V24 MA_DQS_L7/MAB_DQS_L0 MA_DATA46/MAB_DATA24 AP23 DDR_B_D47
V23 RSVD_41 MA_DATA47/MAB_DATA25
RSVD_40 AW26 DDR_B_D48
SB_CLK_DDR0 AD25 MA_DATA48/MAB_DATA11 AV25 DDR_B_D49
17 SB_CLK_DDR0 SB_CLK_DDR#0 AD24 MA_CLK_H0/MAA_CKT MA_DATA49/MAB_DATA10 AV22 DDR_B_D50
17 SB_CLK_DDR#0 AE26 MA_CLK_L0/MAA_CKC MA_DATA50/MAB_DATA15 AW22 DDR_B_D51
AE27 MA_CLK_H1/MAB_CKT MA_DATA51/MAB_DATA14 AU26 DDR_B_D52
MA_CLK_L1/MAB_CKC MA_DATA52/MAB_DATA12 AV27 DDR_B_D53
MA_DATA53/MAB_DATA13 AW23 DDR_B_D54
MA_DATA54/MAB_DATA9 AT22 DDR_B_D55
MA_DATA55/MAB_DATA8
AW21 DDR_B_D56
B DDR_B_CS0# AG21 MA_DATA56/MAB_DATA5 AU21 DDR_B_D57 B
17 DDR_B_CS0# AJ27 MA_CS_L0/MAB_CKE1 MA_DATA57/MAB_DATA6 AP21 DDR_B_D58
MA_CS_L1/RSVD MA_DATA58/MAB_DATA2 AN20 DDR_B_D59
MA_DATA59/MAB_DATA3 AR22 DDR_B_D60
MA_DATA60/MAB_DATA7 AN22 DDR_B_D61
MA_DATA61/MAB_DATA4 AT20 DDR_B_D62
MA_DATA62/MAB_DATA1 AR20 DDR_B_D63
DDR_B_CKE0 Y23 MA_DATA63/MAB_DATA0
17 DDR_B_CKE0 Y26 MA_CKE0/MAA_CA0 T24
MA_CKE1/MAA_CA1 RSVD_34 T25
RSVD_35 W25
RSVD_51 W27
DDR_B_ODT0 AG24 RSVD_52 R26
17 DDR_B_ODT0 AJ22 MA_ODT0/MAB_CA5 RSVD_27 R27
MA_ODT1/RSVD RSVD_28 V27
RSVD_43 V26
RSVD_42
DDR_B_ALERT_N AA25
17 DDR_B_ALERT_N MA_ALERT_L/MA_TEST AF24 DDR_B_PARITY
MA_PAROUT/MAB_CA1 DDR_B_PARITY 17
1 2 1K_0402_5% DDR_B_EVENT# AE24
+1.2V RC3212 DDR4_B_DRAMRST# MA_EVENT_L
Y24
17 DDR4_B_DRAMRST# MA_RESET_L
FP5 REV 0.90
PART 1 OF 13

AMD-RAVEN-FP5_BGA1140
@

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 Memory
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 5 of 67
5 4 3 2 1
5 4 3 2 1

UC1C
+1.8VS DISPLAY/SVI2/JTAG/TEST
EDP_TXP0 C8 G15 DP_ENBKL +3VS_APU
RC18 1 2 300_0402_5% APU_RST# 18 EDP_TXP0 EDP_TXN0 A8 DP0_TXP0 DP_BLON F15 DP_ENVDD To EDP panel
18 EDP_TXN0 DP0_TXN0 DP_DIGON DP_EDP_PWM
L14
DP_VARY_BL

1
CC16 1 2 56P_0402_50V8-J EDP_TXP1 D8
18 EDP_TXP1 EDP_TXN1 DP0_TXP1 EDP_AUXP
@ B8 D9 RC77
18 EDP_TXN1 DP0_TXN1 DP0_AUXP EDP_AUXN EDP_AUXP 18 +3VALW_APU
B9 2.2K_0402_5%
EDP_TXP2 DP0_AUXN APU_EDP_HPD EDP_AUXN 18
B6 C10
PLACE CC16 CAPS CLOSE TO APU,CRB reserve 27pf
eDP 18 EDP_TXP2 EDP_TXN2 C7 DP0_TXP2 DP0_HPD APU_EDP_HPD 18
18 EDP_TXN2

2
DP0_TXN2

2
G11 APU_DDC_CLK
EDP_TXP3 DP1_AUXP APU_DDC_DATA APU_DDC_CLK 20 @
C6 F11 RC3057 ENBKL
18 EDP_TXP3 EDP_TXN3 DP0_TXP3 DP1_AUXN APU_HDMI_HPD APU_DDC_DATA 20
D6 G13 10K_0402_5%
+1.8VS 18 EDP_TXN3 DP0_TXN3 DP1_HPD APU_HDMI_HPD 20
D APU_HDMI_TX2+ E6 J12 DP2_AUXP D
20 APU_HDMI_TX2+ DP2_AUXP 23

1
DP1_TXP0 DP2_AUXP

3
APU_HDMI_TX2- D5 H12 DP2_AUXN D
APU_PWROK 20 APU_HDMI_TX2- DP1_TXN0 DP2_AUXN DP2_HPD DP2_AUXN 23 @
RC19 1 2 300_0402_5% K13 5 QC10B
APU_HDMI_TX1+ DP2_HPD DP2_HPD 23,24
E1 G DMN5L06DWK-7 2N SOT363-6
20 APU_HDMI_TX1+ APU_HDMI_TX1- DP1_TXP1 DP3_AUXP
CC17 1 2 56P_0402_50V8-J C1 J10
20 APU_HDMI_TX1- DP1_TXN1 DP3_AUXP DP3_AUXN DP3_AUXP 22
@ H10 S
HDMI

4
DP3_AUXN DP3_AUXN 22

6
APU_HDMI_TX0+ F3 K8 DP3_HPD D
20 APU_HDMI_TX0+ APU_HDMI_TX0- DP1_TXP2 DP3_HPD DP3_HPD 22,24 DP_ENBKL @
E4 2 QC10A
20 APU_HDMI_TX0- DP1_TXN2 DP_STEREOSYNC
K15 G DMN5L06DWK-7 2N SOT363-6
APU_HDMI_CLK+ F4 DP_STEREOSYNC
PLACE CC17 CAPS CLOSE TO APU,CRB reserve 27pf 20 APU_HDMI_CLK+ DP1_TXP3

2
APU_HDMI_CLK- F2 F14 1 @ TC34 S
20 APU_HDMI_CLK-

1
DP1_TXN3 RSVD_4 F12 1 @ TC33 RC3055
+3VS_APU RSVD_3 @
100K_0402_5%
F10 1 @ TC32
2.2K_0404_4P2R_5% RSVD_2 +3VS_APU

1
1 4 APU_SIC
2 3 APU_SID
UC7
RPC8 1 5
DP_ENBKL 2 OE VCC
3 A 4 ENBKL
1K_0402_5% 1 APU_PROCHOT#_R GND Y ENBKL 44
2 RC128
1K_0402_5% 1 2 RC127 ALERT# AP14 TEST4 1 @ TC31
TEST4 AN14 TEST5 1 @ TC30 SN74LV1T125DCKR_SC70-5
TEST5 +1.8VS
F13 1 @ TC29
RC22 1 2 1K_0402_5% APU_THERMTRIP# TEST6 RPC3 +3VS_APU
G18 APU_TEST14 1 8
TEST14 H19 APU_TEST15
APU_TEST15
2 7
TEST15

1
F18 APU_TEST16 3 6
TEST16 F19 APU_TEST17 4 5 +3VALW_APU RC3053
TEST17 4.7K_0402_5%
C W24 APU_TEST31 1 @ TC24 10K_0804_8P4R_5% C
TEST31/RSVD

2
CC9 1 2 1000P_0402_50V7-K APU_SVC
@

2
@ RC73 APU_ENVDD
APU_SVD @
CC10 1 2 1000P_0402_50V7-K AR11 1 @ TC23 10K_0402_5%
@ TEST41
CC1392 1 2 1000P_0402_50V7-K APU_SVT APU_TDI_H AU2 AJ21 TEST470 1 @ TC22

1
TDI TEST470

3
@ APU_TDO_H AU4 AK21 TEST471 1 @ TC21 D
APU_TCK_H TDO TEST471 @
AU1 5 QC9B
APU_TMS_H AU3 TCK G
CRB reserve SVC SVD 27pf APU_TRST#_H TMS DMN5L06DWK-7 2N SOT363-6
AV3
APU_DBREQ# TRST_L @
AW3 S

4
DBREQ_L

6
+0.9VS D
DP_ENVDD 2 QC9A
+1.8VS PD FOR CUSTOMER APU_RESET#_H HDT@ 1 RC3192 2 0_0402_5% APU_RST# AW4 V4 SMU_ZVDDP RC3 1 2 196_0402_0.5% G
RESET_L SMU_ZVDD DMN5L06DWK-7 2N SOT363-6
PU FOR INTERNAL APU_PWROK AW2 +3VALW_APU
61 APU_PWROK PWROK

2
RC3101 1 2 1K_0402_5% DP_STEREOSYNC S
@

1
RC3129 1 @ 2 0_0402_5% APU_SIC H14 AW11 CORETYPE RC3113 1 2 10K_0402_5% RC13
44 EC_SMB_CK3 SIC CORETYPE @
RC3102 1 @ 2 1K_0402_5% 44 EC_SMB_DA3 RC3130 1 @ 2 0_0402_5% APU_SID J14 100K_0402_5%
ALERT# J15 SID @
APU_THERMTRIP# AP16 ALERT_L AN11 APU_VDDP_RUN_FB_H 1 @ TC35 @
44 APU_THERMTRIP#

1
RC3070 1 @ 2 0_0402_5% APU_PROCHOT#_R L19 THERMTRIP_L VDDP_SENSE J19 VDDCR_SOC_VCC_SENSE RC206 1 2 0_0402_5%
44 APU_PROCHOT# PROCHOT_L VDDCR_SOC_SENSE VDDCR_SOC_VCC_SENSE 61
RC3056 1 2 100K_0402_5% APU_EDP_HPD K18 VDDCR_VCC_SENSE
LCD Power IC can change for PCH_ENVDD for cost down
VDDCR_SENSE VDDCR_VCC_SENSE 61
RGB( 0,255,128)
RC279 1 @ 2 0_0402_5% APU_SVC_RA F16
61 APU_SVC SVC0
RC213 1 @ 2 0_0402_5% APU_SVD_RA H16 J18 VDDCR_VSS_SENSE +3VS_APU
61 APU_SVD SVD0 VSS_SENSE_A VDDCR_VSS_SENSE 61
RC215 1 @ 2 0_0402_5% APU_SVT_RA J16 FP5 REV 0.90 AM11 VSS_SENSEB 1 @ TC40 UC9
APU_PROCHOT# 61 APU_SVT SVT0 VSS_SENSE_B
CC8789 1 2 56P_0402_50V8-J PART 3 OF 13 1 5
@ DP_ENVDD 2 OE VCC
3 A 4 APU_ENVDD
AMD-RAVEN-FP5_BGA1140 GND Y APU_ENVDD 18
@
SN74LV1T125DCKR_SC70-5
VDDCR_SOC_VCC_SENSE 1 @ TC52
B VDDCR_VCC_SENSE 1 @ TC53 +3VS_APU B
VDDCR_VSS_SENSE 1 @ TC54

1
+3VALW_APU RC70
+1.8VALW 4.7K_0402_5%
HDT
JHDT1

2
APU_TDI_H 1 2 APU_TCK_H

2
1 2 RC3054
+1.8VALW APU_TMS_H @ APU_PANEL_PWM
RPC52 1 3 4 10K_0402_5%
3 4
HDT@
1 8 APU_TDI_H CC212 5 6 RC20 1 2 APU_TDI_H

1
2 7 APU_TMS_H 0.01U_0201_6.3V7-K 5 6 0_0402_5% +1.8VALW
@

3
3 6 APU_TCK_H 2 7 8 APU_TDO_H
APU_TRST#_H @ Cap close to JHDT.9 RC21 7 8
D
4 5 5 QC8B

1
APU_TRST#_H 1 2 9 10 APU_PWROK_BUF G
9 10 DMN5L06DWK-7 2N SOT363-6
1K_0804_8P4R_5% 33_0402_5% RC3188
+1.8VALW HDT@ APU_RST#_BUF
HDT@ 11 12 HDT@ 1K_0402_1% S

4
11 12

6
1 D
DP_EDP_PWM @
RC4100 1 @ 2 0_0201_5% CC11 13 14 2 QC8A
RC24

2
+1.8VS HDT@ 13 14 G DMN5L06DWK-7 2N SOT363-6

2
RC4101 1 @ 2 0_0201_5% 0.01U_0201_25V7-K 15 16 1 2 APU_DBREQ#
2 15 16 33_0402_5% RC3052 S

1
1 17 18 HDT@ 1 Cap close to JHDT.16 100K_0402_5%
17 18 @
1

HDT@ HDT@ CC12


CC100 HDT@ RC107 RC108 RPC2 19 20

1
0.1U_0201_6.3V6-K 1/16W_1K_5%_0402 1/16W_1K_5%_0402 1 8 19 20 HDT@ 0.01U_0201_25V7-K
2 2 7 2
3 6
2

UC6 4 5 @ +3VS_APU
APU_PWROK 3 4 APU_PWROK_BUF SAMTE_ASP-136446-07-B UC8
2A 2Y 1 5
A 2 5 10K_0804_8P4R_5% DP_EDP_PWM 2 OE VCC A
GND VCC 3 A 4 APU_PANEL_PWM
APU_RESET#_H APU_RST#_BUF HDT@ GND Y APU_PANEL_PWM 18
1 6
1A 1Y
HDT@ SN74LVC2G07YZPR_WCSP6 SN74LV1T125DCKR_SC70-5

Security Classification LC Future Center Secret Data Title


Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 DP/JTAG/SVI2/MISC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 6 of 67
5 4 3 2 1
5 4 3 2 1

EGPIO149 RP115 1 4 1/16W_10K_5%_4P2R_0404


+1.8VALW +3VALW_APU EGPIO150 2 3

RC3173 1 @ 2 0_0402_5% PCIE_RST0# RC3172 1 2 33_0402_5% PCIE_RST0#_R @

10U_0402_6.3V6-M
19,29,31,32,35,36,37,51 PLT_RST# APU_I2C0_SCL_R RP116
2 1 4 1/16W_10K_5%_4P2R_0404

2
APU_I2C0_SDA_R 2 3

CC8782
1
RC243 1 @ 2 0_0402_5% RC3067 RC156
1
RC3171 10K_0402_5% 10K_0402_5%
CC1389 1 DYL@ 0918
100K_0402_5%
@ 100P_50V_K_X7R_0201 RP115&RP116 for FVT costdown

1
2 DC1 1 2 RB521CM-30T2R_VMN2M-2 RSMRST#_R
44 EC_RSMRST#

2
1
DYL@ 0918
D 7 SYS_RESET# D
SCS00007L00 to SCS00006V00 CC1315
For sort out material 0.1U_6.3V_K_X5R_0201

1
WWAN_ANTENNA# 2
RC163
2K_0402_5%

1
@ +3VS_APU
RC3254 RPC53

2
10K_0402_5% APU_SMB_CK0 3 2
APU_SMB_DA0 4 1
UC1D

2
Reserve L860 0828 ACPI/AUDIO/I2C/GPIO/MISC 2.2K_0404_4P2R_5%
@
+3VALW_APU
AW12 RPC54
PM_SLP_S3# CC8787 1 2 2200P_0201_25V7K EGPIO41/SFI_S5_EGPIO41 AU12 APU_SMB_CK1 3 2
PM_SLP_S5# CC8788 1 2 2200P_0201_25V7K PCIE_RST0#_R BD5 AGPIO39/SFI_S5_AGPIO39 APU_SMB_DA1 4 1
WWAN_ANTENNA# BB6 PCIE_RST0_L/EGPIO26
PLT_RST# Port 2 for use ?? AR13 APU_I2C0_SCL_R RC522 1 @ 2 0_0402_5% APU_I2C0_SCL
36 WWAN_ANTENNA# RSMRST#_R PCIE_RST1_L/EGPIO27 I2C0_SCL/SFI0_I2C_SCL/EGPIO151 APU_I2C0_SDA_R APU_I2C0_SCL 15
AT16 AT13 RC523 1 @ 2 0_0402_5% APU_I2C0_SDA 2.2K_0404_4P2R_5%
RSMRST_L I2C0_SDA/SFI0_I2C_SDA/EGPIO152 APU_I2C0_SDA 15
RC3064 1 @ 2 0_0402_5% AR15 AN8 EGPIO149 +1.8VS
29,44 PBTN_OUT# PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149
RC3065 1 @ 2 0_0402_5% SYS_PWRGD_R AV6 AN9 EGPIO150
44 PWR_GOOD SYS_RESET# PWR_GOOD I2C1_SDA/SFI1_I2C_SDA/EGPIO150
AP10
7 SYS_RESET# PCIE_WAKE#_RA SYS_RESET_L/AGPIO1 APU_SMB_CK0_R
RC88 1 @ 2 0_0402_5% AV11 BC20 RC501 1 @ 2 0_0402_5% APU_SMB_CK0 PSA_I2C_SCL RC3126 1 @ 2 4.7K_0402_5%
WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0 APU_SMB_CK0 12,16,19
31,32,44 EC_WAKE# RC92 1 @ 2 0_0402_5% AGPIO3 BA20 APU_SMB_DA0_R RC500 1 @ 2 0_0402_5% APU_SMB_DA0 PSA_I2C_SDA RC3127 1 @ 2 4.7K_0402_5%
I2C2_SDA/EGPIO114/SDA0 APU_SMB_DA0 12,16,19
RC3068 1 @ 2 0_0402_5% AV13
DC3 1 2 RB521CM-30T2R_VMN2M-244 PM_SLP_S3# RC3069 1 @ 2 0_0402_5% AT14 SLP_S3_L AM9 APU_SMB_CK1_R RC502 1 @ 2 0_0402_5% APU_SMB_CK1
12,44 PM_SLP_S5# SLP_S5_L I2C3_SCL/AGPIO19/SCL1 APU_SMB_DA1_R APU_SMB_CK1 32,44,48
AM10 RC503 1 @ 2 0_0402_5% APU_SMB_DA1
I2C3_SDA/AGPIO20/SDA1 APU_SMB_DA1 32,44,48
DYL@ 0918 RC3241 1 @ 2 0_0402_5% DOCK_RJ45_DET#_R AR8 +RTC_33
25,44 DOCK_RJ45_DET# S0A3_GPIO/AGPIO10 PSA_I2C_SCL
SCS00007L00 to SCS00006V00 L16
For sort out material AC_PRESENT AT10 PSA_I2C_SCL M16 PSA_I2C_SDA INTRUDER_ALERT RC3220 1 @ 2 20M_0402_5%
44 AC_PRESENT WWAN_RST# AC_PRES/AGPIO23 PSA_I2C_SDA
AN6
36 WWAN_RST# LLB_L/AGPIO12
AT15 AGPIO3
C RC3489 1 @ 2 0_0402_5% BEEP_RESERVED_R AW8 AGPIO3 AW10 RC3251 1 @ 2 0_0402_5% C
44 BEEP_RESERVED EGPIO42 AGPIO4/SATAE_IFDET IFDET 29
+3VS_APU
AP9
+3VALW_APU AGPIO5/DEVSLP0 LED_FNLOCK# 47
AU10 RC3207 1 @ 2 0_0402_5%
AGPIO6/DEVSLP1 AV15 SC_DTCT# SATA2_DEVSLP 29 EC_SMI# RC3081 1 2 2.2K_0402_5%
SYS_PWRGD_R SATA_ACT_L/AGPIO130 SC_DTCT# 48 PCIE_SSD_RST#
RC72 1 @ 2 10K_0402_5% RC3174 1 2 10K_0402_5%
AU7
CC1314 1 2 0.1U_0201_6.3V6-K AGPIO9 AU6 RC4086 1 @ 2 0_0402_5% LED_MUTE# 47
AGPIO40 AW13 INT_MIC_DTCT# PCIE_SSD_RST# 29 PCH_WLAN_OFF# RC3232 1 @ 2 10K_0402_5%
AGPIO69 INT_MIC_DTCT# 18 PCH_BT_OFF#
AW15 RC3233 1 2 10K_0402_5%
DC4 @ 1 2 RB521CM-30T2R_VMN2M-2 HDA_BITCLK AR2 AGPIO86 EC_SMI# 44
DYL@ 0918 AP7 AZ_BITCLK/TDM_BCLK_MIC INT_MIC_DTCT# RC3194 1 2 10K_0402_5%
38 HDA_SDIN0 HDA_SDIN1 AZ_SDIN0/CODEC_GPI INTRUDER_ALERT SC_DTCT#
SCS00007L00 to SCS00006V00 TC42 @ 1 AP1 AU14 RC3221 1 @ 2 0_0402_5% DCOVER_SW 14,44 RC3224 1 2 10K_0402_5%
For sort out material TC43 @ 1 HDA_SDIN2 AP4 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU16 RC3082 1 @ 2 0_0402_5%
HDA_RST# AP3 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK SPKR/AGPIO91 AV8 RC3218 1 @ 2 0_0402_5% PCH_BEEP 43
SYS_RESET# HDA_SYNC AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 APU_DCOVER_SW 14
CC38 1 2 0.1U_0201_6.3V6-K AR4
HDA_SDOUT AR3 AZ_SYNC/TDM_FRM_MIC AW16 +3VALW_APU
AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89 BD15 RC3252 1CAM_DT@ 2 0_0402_5% PCH_WWAN_OFF# 36
GENINT2_L/AGPIO90 IR_CAM_DTCT# 8,18
AT2
AT4 SW_MCLK/TDM_BCLK_BT APU_DCOVER_SW RC4089 1 2 10K_0402_5%
LED_MICMUTE# AR6 SW_DATA0/TDM_DOUT_BT AR18 PCH_WLAN_OFF#
47 LED_MICMUTE# LED_CAPSLOCK# AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84 PCH_BT_OFF# PCH_WLAN_OFF# 35 +3VALW_APU
AP6 AT18 RPC15
47 LED_CAPSLOCK# AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85 PCH_BT_OFF# 35 AGPIO3 1 8
FP5 REV 0.90
PART 4 OF 13 PBTN_OUT# 2 7
@ PCIE_WAKE#_RA 3 6
AMD-RAVEN-FP5_BGA1140 4 5
+3VALW_APU +3VS_APU
10K_0804_8P4R_5%

BEEP_RESERVED_R RC4088 1 2 10K_0402_5%

B
DYL@ 0831 Need to check WWAN_RST# RC3250 1 @ 2 10K_0402_5% B
@ @ @ @
Board ID Description Stuff R
1

2
DOCK_RJ45_DET#_R RC3242 1 @ 2 10K_0402_5%
2K_0402_5%

2K_0402_5%

2K_0402_5%

10K_0402_5%
Samsung 8Gb SATA2_DEVSLP RC3243 1 @ 2 10K_0402_5%
RC1615

RC1613

RC1611

RC1609
000 RC1612 RC1614 RC1616 AC_PRESENT RC3238 1 @ 2 10K_0402_5%
2400 MT/s
Hynix 8Gb +3VS_APU
2

1
001 2400 MT/s RC1612 RC1614 RC1615
BOARD_ID0 PCH_WWAN_OFF# RC3123 1 2 10K_0402_5%
9 BOARD_ID0 33_0804_8P4R_5%
BOARD_ID1
9 BOARD_ID1 BOARD_ID2 HDA_RST#
010 Reserved RC1612 RC1613 RC1616 4 5
9 BOARD_ID2 BOARD_ID3 HDA_SYNC
3 6
8 BOARD_ID3 38 HDA_SYNC_AUDIO HDA_BITCLK
Samsung 16Gb 2 7
38 HDA_BITCLK_AUDIO HDA_SDOUT
011 2400 MT/s RC1612 RC1613 RC1615 1 8
38 HDA_SDOUT_AUDIO
Board_ID
[2,1,0] Hynix 16Gb RPC44
100 2400 MT/s RC1611 RC1614 RC1616
2

2K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5%

2
Micron 16Gb
RC1616

RC1614

RC1612

RC1610

1K_0402_5%

1K_0402_5%

1K_0402_5%
1 RSMRST#_R
101 2400 MT/s RC1611 RC1614 RC1615 CC8784 RC87 1 2 100K_0402_5%

RC260

RC261

RC262
150P_0402_50V8-J SYS_PWRGD_R RC89 1 2 100K_0402_5%
EMC_NS@
1

110 Reserved 2
RC1611 RC1613 RC1616

1
@ @ @ @
@ @ @
111 Reserved RC1611 RC1613 RC1615

0 Touch Panel RC1610


Board_ID3
RC4085 1 @ 2 10K_0402_5% BEEP_RESERVED_R
A 1 NON-Touch Panel RC1609 A

0 FP RC1607
Board_ID4
1 NON-FP RC1608
Security Classification LC Future Center Secret Data Title
0 Reserved RC123
Board_ID5
Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 AZ/I2C/ACPI/GPIO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
1 Reserved RC1606 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 7 of 67
5 4 3 2 1
5 4 3 2 1

+3VS_APU LPC_RST#_R +1.8VS +1.8VALW


EMC
RC46 1 2 33_0402_5%
12,44 APU_LPC_RST# PCH_SPI_CLK
LPCCLK0 KBRST#
RP121 1 4 1/16W_10K_5%_4P2R_0404 SYS_LAN_CLKREQ# 1
2 3 CLKREQ_PCIE1_CR#

1
CC1318
150P_25V_J_COG_0201 RC3134 RC3133 RC282 RC139
2 0_0201_5% 10_0402_5%
10K_0402_5% 10K_0402_5%
RP120 1 4 1/16W_10K_5%_4P2R_0404 WWAN_CLKREQ# EMC_NS@ EMC_NS@
2 3 LAN_CLKREQ#
1

2
CC8785
APU_LPC_RST# @ 150P_0402_50V8-J
RC3150 1 2 100K_0402_5%
RC4090 1CAM_DT@ 2 10K_0402_5% PCH_SPI_CLK
D IR_CAM_DTCT# 7,18 CC1388 1 2
8,51 PCH_SPI_CLK 1 EMC_NS@ EMC_NS@ 1 D
CC219 2
150P_0402_50V8-J

1
RC3180 1 2 10K_0402_5% SSD_CLKREQ# 22P_25V_J_NPO_0201 CC26
@
RC3163 2 1 10K_0402_5% WLAN_CLKREQ# RC159 10P_25V_J_NPO_0201
DYL@ 0918 2K_0402_5% 2 2 EMC_NS@
RP120&RP121 for FVT costdown UC1E
@

2
CLK/LPC/EMMC/SD/SPI/eSPI/UART

CLKREQ_PCIE1_CR# AV18
37 CLKREQ_PCIE1_CR# WLAN_CLKREQ# AN19 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 +3VS_APU
35 WLAN_CLKREQ# WWAN_CLKREQ# AP19 CLK_REQ1_L/AGPIO115
36 WWAN_CLKREQ# LAN_CLKREQ# AT19 CLK_REQ2_L/AGPIO116
32 LAN_CLKREQ# SSD_CLKREQ# AU19 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
29 SSD_CLKREQ# SYS_LAN_CLKREQ# AW18 CLK_REQ4_L/OSCIN/EGPIO132
31 SYS_LAN_CLKREQ# SIZE_CTL AW19 CLK_REQ5_L/EGPIO120
18 SIZE_CTL CLK_REQ6_L/EGPIO121
BD13 RC4084 1 @ 2 0_0402_5% LPC_FRAME# RC152 1 @ 2 10K_0402_5%
EGPIO70/SD_CLK BB14 BB_RESET 9,36 KBRST# RC3063 1 @ 2 10K_0402_5%
LPC_PD_L/SD_CMD/AGPIO21 LPCPD# 12
RC3226 1 @ 2 0_0201_5% CLK_PCIE_CR_R AK1 BB12 LPC_APU_AD0 RC300 1 2 10_0402_5% LPC_AD0 12,44
SIZE_CTL RC4083 2 @ 1 100K_0402_5%
37 CLK_PCIE_CR 2 0_0201_5% CLK_PCIE_CR#_R GPP_CLK0P LAD0/SD_DATA0/EGPIO104 LPC_APU_AD1
CR RC3227 1 @ AK3 BC11 RC301 1 2 10_0402_5% LPC_AD1 12,44
37 CLK_PCIE_CR# GPP_CLK0N LAD1/SD_DATA1/EGPIO105 BB15 LPC_APU_AD2 1 2
RC302 10_0402_5% LPC_AD2 12,44
RC53 1 @ 2 0_0201_5% CLK_PCIE_WLAN_R AM2 LAD2/SD_DATA2/EGPIO106 BC15 LPC_APU_AD3 RC303 1 2 10_0402_5%
35 CLK_PCIE_WLAN GPP_CLK1P LAD3/SD_DATA3/EGPIO107 LPC_AD3 12,44
WLAN RC54 1 @ 2 0_0201_5% CLK_PCIE_WLAN#_R AM4 BA15 LPCCLK0 RC126 1 2 3.3_0402_1%
35 CLK_PCIE_WLAN# GPP_CLK1N LPCCLK0/EGPIO74 LPC_CLKRUN# CLK_PCI_EC 12,44
BC13 place with 0.5 inch of APU
LPC_CLKRUN_L/AGPIO88 LPC_CLKRUN# 12
RC51 1 @ 2 0_0201_5% CLK_PCIE_WWAN_R AM1 BB13 EGPIO75
36 CLK_PCIE_WWAN 1 2 0_0201_5% CLK_PCIE_WWAN#_R AM3 GPP_CLK2P LPCCLK1/EGPIO75 BC12
WWAN/2nd SSD RC52 @ SERIRQ SERIRQ 12,44
36 CLK_PCIE_WWAN# GPP_CLK2N SERIRQ/AGPIO87 BA12 LPC_FRAME#
LFRAME_L/EGPIO109 LPC_FRAME# 12,44
RC3176 1 @ 2 0_0201_5% CLK_PCIE_LAN_R AL2
32 CLK_PCIE_LAN 2 0_0201_5% CLK_PCIE_LAN_R# GPP_CLK3P LPC_RST#_R
DOCK LAN W/ DASH RC3177 1 @ AL4 BD11
32 CLK_PCIE_LAN# GPP_CLK3N LPC_RST_L/SD_WP_L/AGPIO32 BA11 EPRIVACY_ON
C
RC3178 1 @ 2 0_0201_5% CLK_PCIE_SSD_R AN2 AGPIO68/SD_CD BA13 EC_SCI# EPRIVACY_ON 18 SIZE_CTL RC4081 2 @ 1 100K_0402_5% C
29 CLK_PCIE_SSD GPP_CLK4P LPC_PME_L/SD_PWR_CTRL/AGPIO22 EC_SCI# 44
SSD/HDD RC3179 1 @ 2 0_0201_5% CLK_PCIE_SSD#_R AN4 EGPIO75 RC3197 1 2 10K_0402_5%
29 CLK_PCIE_SSD# GPP_CLK4N EPRIVACY_ON 1 2 100K_0402_5%
RC3256
RC3247 1 @ 2 0_0201_5% CLK_PCIE_LAN_SYS_R AN3
31 CLK_PCIE_LAN_SYS 2 0_0201_5% CLK_PCIE_LAN_SYS#_R GPP_CLK5P
SYS LAN W/O DASH RC3248 1 @ AP2 BC8
WWAN_WAKE# 36
@
31 CLK_PCIE_LAN_SYS# GPP_CLK5N SPI_ROM_REQ/EGPIO67 BB8
AJ2 SPI_ROM_GNT/AGPIO76
AJ4 GPP_CLK6P BB11 KBRST#
GPP_CLK6N ESPI_RESET_L/KBRST_L/AGPIO129 KBRST# 44
BC6 LDRQ0#
ESPI_ALERT_L/LDRQ0_L/EGPIO108 LDRQ0# 12 +1.8VALW
TC41 @ 1 48M_OSC AJ3
X48M_OSC BB7 SPI_CLK RC3083 1 2 10_0402_5%PCH_SPI_CLK
SPI_CLK/ESPI_CLK SPI_D1 PCH_SPI_CLK 8,51
BA9 RC3084 1 @ 2 0_0402_5% PCH_SPI_D1 SPI_CS#_TPM R11063 1 2 10K_0402_5%
X48M_X1 BB3 SPI_DI/ESPI_DAT1 BB10 SPI_D0 RC3085 1 @ 2 0_0402_5% PCH_SPI_D0 PCH_SPI_D1 51
X48M_X1 SPI_DO/ESPI_DAT0 BA10 SPI_D2 RC3087 1 @ 2 0_0402_5% PCH_SPI_D2 PCH_SPI_D0 51
SPI_WP_L/ESPI_DAT2 BC10 SPI_D3 RC3088 1 @ 2 0_0402_5% PCH_SPI_D3
SPI_HOLD_L/ESPI_DAT3 BC9 SPI_CS1# RC3089 1 @ 2 0_0402_5% PCH_SPI_CS1# AGPIO30 RC3158 1 2 10K_0402_5%
X48M_X2 BA5 SPI_CS1_L/EGPIO118 BA8 AGPIO30
X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30 BA6
SPI_CS3_L/AGPIO31 BD8 SPI_CS#_TPM
SPI_TPM_CS_L/AGPIO29 SPI_CS#_TPM 51
XGBECLK0 AF8
XGBECLK1 AF9 RSVD_76 BA16 APU_UART0_RXD
RSVD_77 UART0_RXD/EGPIO136 BB18 APU_UART0_TXD
UART0_TXD/EGPIO138 BC17 APU_UART0_RTS# +1.8VS
UART0_RTS_L/UART2_RXD/EGPIO137 BA18 APU_UART0_CTS#
RC114 1 @ 2 0_0402_5% RTCCLK AW14 UART0_CTS_L/UART2_TXD/EGPIO135 BD18 PCH_SPI_PIRQ# APU_UART0_RXD RC3136 1 @ 2 1K_0402_1%
29,35 SUSCLK_32K RTCCLK UART0_INTR/AGPIO139 PCH_SPI_PIRQ# 51 APU_UART0_TXD RC3137 1 @ 2 1K_0402_1%
RC4091 1 @ 2 0_0402_5% FULL_CARD_POWER_OFF APU_UART0_RTS# RC3138 1 @ 2 1K_0402_1%
X32K_X1 AY1 BC18 TOUCH_EN APU_UART0_CTS# RC3139 1 @ 2 1K_0402_1%
X32K_X1 EGPIO141/UART1_RXD BA17 APU_HUB1_RESET# TOUCH_EN 18 PCH_SPI_PIRQ# RC3140 1 @ 2 1K_0402_1%
EGPIO143/UART1_TXD BC16 RC4092 1 HUB2@ 2 0_0402_5% APU_HUB1_RESET# 19
B
RC45 EGPIO142/UART1_RTS_L/UART3_RXD BB19 BOARD_ID3 APU_HUB2_RESET# 19 B
+3VS X32K_X2 EGPIO140/UART1_CTS_L/UART3_TXD BOARD_ID3 7 +1.8V_SPI
1 2 AY4 BB16
20M_0402_5% X32K_X2 AGPIO144/UART1_INTR 1 2 FULL_CARD_POWER_OFF
FULL_CARD_POWER_OFF 36 RPC55
YC2 RC4087 0_0402_5% PCH_SPI_CS1# 1 4
1 2 PCH_SPI_D1 2 3
FP5 REV 0.90
PART 5 OF 13
32.768KHZ_9PF_9H03280012 @ 10K_0404_4P2R_5%
1 SJ10000J900 AMD-RAVEN-FP5_BGA1140 PCH_SPI_D2
1 1 R11245 1 @ 2 10K_0402_5%
C8793 PCH_SPI_D3 R11246 1 @ 2 10K_0402_5%
0.1U_0201_6.3V6-K CC21 CC22
2 9P_50V_B_NPO_0402 9P_50V_B_NPO_0402 +3VS_APU
@ U130 2 2
5 1 DYL@ 1017 CC21 CC22 change from 10pF to 8pF
Vcc OE Follow Vendor test result XGBECLK0 RC10 1 @ 2 150_0402_1%
2 RTCCLK +1.8V_SPI +1.8VALW XGBECLK1 RC6 1 @ 2 150_0402_1%
IN_A UC3
SUSCLK_32K PCH_SPI_CS1# +1.8V_SPI 0.085 A
4 3 1 8 RC435 1 @ 2 0_0402_5%
OUT_Y GND PCH_SPI_D1 2 /CS VCC 7 PCH_SPI_D3
PCH_SPI_D2 3 DO(IO1) /HOLDor/RESET(IO3) 6 PCH_SPI_CLK
/WP(IO2) CLK PCH_SPI_D0 1
M74VHC1GT125DF2G_SC70-5 4 5
48MHz/10pF Crystal X48M_X1 GND DI(IO0) CC220
@ PCH_SPI_CS1# EC_SPI_CS1#
S IC FL 128M W 25Q128FWSIQ SOIC 8P 1.8V 0.1U_0201_6.3V6-K RC411 1 @ 2 0_0201_5%
X48M_X2 2 PCH_SPI_D0 EC_SPI_SI EC_SPI_CS1# 44
RC412 1 @ 2 0_0201_5%
16MB(128Mb) PCH_SPI_D1
PCH_SPI_CLK
RC413 1
1
@ 2
2
0_0201_5% EC_SPI_SO
EC_SPI_CLK
EC_SPI_SI 44
EC_SPI_SO 44
RC414 @ 0_0201_5% EC_SPI_CLK 44
RC5 1 2 1M_0402_5%

29 SUSCLK_SSD
RC1140 1 2 0_0402_5% RTCCLK
YC1
RC414 need to change
@
A DYL@ Follow A285 1 4 A
OSC1 NC2
2 3
NC1 OSC2
1 1
CC28 48MHZ_10PF_7V48000017 CC29
6.8P_50V_D_NPO_0402 6.8P_50V_D_NPO_0402 Title
2 2 Security Classification LC Future Center Secret Data
Issued Date 2015/11/02 Deciphered Date 2015/8/10 CLK/LPC/SD/EMMC/UART
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DYL@ 1017 CC28 CC29 change from 8pF to 6.8pF DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
Follow Vendor test result MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 8 of 67
5 4 3 2 1

C
5 4 3 2 1

D D
UC1J

USB

USB30_C_TX3AP AD2 AE7


22 USB30_C_TX3AP USB30_C_TX3AN USBC0_A2/USB_0_TXP0/DP3_TXP2 USB_0_DP0 USBP3+ 26
AD4 AE6
22 USB30_C_TX3AN USBC0_A3/USB_0_TXN0/DP3_TXN2 USB_0_DM0 USBP3- 26 TYPE C W/DP +3VALW_APU
USB30_C_RX3AP AC2 AG10
22 USB30_C_RX3AP USB30_C_RX3AN USBC0_B11/USB_0_RXP0/DP3_TXP3 USB_0_DP1 USBP1+_AOU 30
AC4 AG9
22 USB30_C_RX3AN USBC0_B10/USB_0_RXN0/DP3_TXN3 USB_0_DM1 USBP1-_AOU 30 TYPE A AOU
TYPE C W/DP USB30_C_TX3BP AF4 AF12
22 USB30_C_TX3BP USB30_C_TX3BN USBC0_B2/DP3_TXP1 USB_0_DP2 USBP0+ 30
AF2 AF11 RPC56
22 USB30_C_TX3BN USBC0_B3/DP3_TXN1 USB_0_DM2 USBP0- 30 TYPE A USB_OC1# 1 4
USB30_C_RX3BP AE3 AE10 USB_OC2# 2 3
22 USB30_C_RX3BP USB30_C_RX3BN USBC0_A11/DP3_TXP0 USB_0_DP3 DOCK_USB2P 25
AE1 AE9
22 USB30_C_RX3BN USBC0_A10/DP3_TXN0 USB_0_DM3 DOCK_USB2N 25 CS18 10K_0404_4P2R_5%
USB3P1_TXP_AOU AG3 AJ12
30 USB3P1_TXP_AOU USB3P1_TXN_AOU USB_0_TXP1 USB_1_DP0 USB_HUB2_DP 19
AG1 AJ11
30 USB3P1_TXN_AOU USB_0_TXN1 USB_1_DM0 USB_HUB2_DN 19 USB HUB2
USB3P1_RXP_AOU AJ9 AD9
TYPE A AOU 30 USB3P1_RXP_AOU USB3P1_RXN_AOU AJ8 USB_0_RXP1 USB_1_DP1 AD8
USB_HUB1_DP 19
30 USB3P1_RXN_AOU USB_0_RXN1 USB_1_DM1 USB_HUB1_DN 19 USB HUB1
USB3P0_TXP AG4
27 USB3P0_TXP USB3P0_TXN USB_0_TXP2
AG2
27 USB3P0_TXN USB_0_TXN2
USB3P0_RXP AG7
TYPE A 27 USB3P0_RXP USB3P0_RXN AG6 USB_0_RXP2 AM6
USBC_SCL
RC268 1 @ 2 0_0402_5% APU_USBC_SCL
27 USB3P0_RXN USB_0_RXN2 USBC_I2C_SCL APU_USBC_SCL 15
USB30_TX_P3 AA2 AM7
USBC_SDA
RC269 1 @ 2 0_0402_5% APU_USBC_SDA
23 USB30_TX_P3 USB30_TX_N3 USBC1_A2/USB_0_TXP3/DP2_TXP2 USBC_I2C_SDA APU_USBC_SDA 15
AA4
23 USB30_TX_N3 USBC1_A3/USB_0_TXN3/DP2_TXN2
C USB30_RX_P3 Y1 C
23 USB30_RX_P3 USB30_RX_N3 USBC1_B11/USB_0_RXP3/DP2_TXP3
Y3
23 USB30_RX_N3 USBC1_B10/USB_0_RXN3/DP2_TXN3
CS18 USB30_TX_P4 AC1
23 USB30_TX_P4 USB30_TX_N4 USBC1_B2/DP2_TXP1
AC3 RC4082
23 USB30_TX_N4 USBC1_B3/DP2_TXN1 AK10 BOARD_ID2 7 1 @ 2 0_0402_5%
USB30_RX_P4 AB2 USB_OC0_L/AGPIO16 AK9 USB_OC1# BB_RESET 8,36
23 USB30_RX_P4 USB30_RX_N4 USBC1_A11/DP2_TXP0 USB_OC1_L/AGPIO17 USB_OC2# USB_OC1# 30
AB4 AL9
23 USB30_RX_N4 USBC1_A10/DP2_TXN0 USB_OC2_L/AGPIO18 USB_OC2# 30
AL8 SKU_ID1 32
AH4 USB_OC3_L/AGPIO24 AW7
USB_1_TXP0 AGPIO14/USB_OC4_L BOARD_ID0 7
AH2 AT12 BOARD_ID1 7
USB_1_TXN0 AGPIO13/USB_OC5_L
AK7
AK6 USB_1_RXP0
USB_1_RXN0
FP5 REV 0.90
PART 10 OF 13

AMD-RAVEN-FP5_BGA1140
@

UC1M

UC1L
CAMERAS

RSVD A18 B15


B T11 AA9 C18 CAM0_CSI2_CLOCKP CAM0_CLK B
RSVD_32 RSVD_62 AA8 CAM0_CSI2_CLOCKN D15
AC7 RSVD_61 AC6 A15 CAM0_I2C_SCL C14
RSVD_66 RSVD_65 C15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA
CAM0_CSI2_DATAN0 B13
Y9 B16 CAM0_SHUTDOWN
Y10 RSVD_55 AD11 C16 CAM0_CSI2_DATAP1
RSVD_56 RSVD_72 CAM0_CSI2_DATAN1
W11 AC9 C19
W12 RSVD_47 RSVD_67 AA11 B18 CAM0_CSI2_DATAP2
RSVD_48 RSVD_63 CAM0_CSI2_DATAN2
V9 T12 B17
V10 RSVD_38 RSVD_33 AD12 D17 CAM0_CSI2_DATAP3
RSVD_39 RSVD_73 CAM0_CSI2_DATAN3
Y6 D12 B10
RSVD_53 Y7 B12 CAM1_CSI2_CLOCKP CAM1_CLK
RSVD_54 CAM1_CSI2_CLOCKN A11
AA12 W8 C13 CAM1_I2C_SCL C11
AC10 RSVD_64 RSVD_45 W9 A13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA
RSVD_68 RSVD_46 CAM1_CSI2_DATAN0 D11
B11 CAM1_SHUTDOWN
C12 CAM1_CSI2_DATAP1 D13
FP5 REV 0.90
PART 12 OF 13
CAM1_CSI2_DATAN1 CAM_PRIV_LED D10
J13 CAM_IR_ILLU
AMD-RAVEN-FP5_BGA1140 FP5 REV 0.90
RSVD_6 PART 13 OF 13
@
AMD-RAVEN-FP5_BGA1140
@

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 USB/WIFI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 9 of 67
5 4 3 2 1
5 4 3 2 1

+1.8VALW
+3VS +3VS_APU +VDDC_VDD
+VDDCR_SOC UC1F
@
J2 1 2 JUMP_43X39 35A
CC75 CC76
+3VALW
1 2
+3VALW_APU 10A M15
POWER
G7
Delete 22U 0603 and place PWR portion under SOC
1 BU1 BO 1
CC74 @ M18 VDDCR_SOC_1 VDDCR_1 G10
BO

22U_0603_6.3V6-M
J3 1 2 JUMP_43X39 M19 VDDCR_SOC_2 VDDCR_2 G12 All BU(on bottom side under SOC)
1 2 VDDCR_SOC_3 VDDCR_3

1U_0201_6.3V6-M

1U_0201_6.3V6-M
@ N16 G14
2 2 2 N18 VDDCR_SOC_4 VDDCR_4 H8
D N20 VDDCR_SOC_5 VDDCR_5 H11 Need discuss if space enough ,reserves others component D
P17 VDDCR_SOC_6 VDDCR_6 H15
P19 VDDCR_SOC_7 VDDCR_7 K7
R18 VDDCR_SOC_8 VDDCR_8 K12
R20 VDDCR_SOC_9 VDDCR_9 K14
T19 VDDCR_SOC_10 VDDCR_10 L8
U18 VDDCR_SOC_11 VDDCR_11 M7 +VDDC_VDD
U20 VDDCR_SOC_12 VDDCR_12 M10
+1.8VS +1.2V V19 VDDCR_SOC_13 VDDCR_13 N14
+3VS_APU W18 VDDCR_SOC_14 VDDCR_14 P7
W20 VDDCR_SOC_15 VDDCR_15 P10
Y19 VDDCR_SOC_16 VDDCR_16 P13
VDDCR_SOC_17 VDDCR_17 1
P15 CC44

180P_0402_50V8-J
T32 VDDCR_18 R8
1 VDDIO_MEM_S3_1 VDDCR_19
1U_0201_6.3V6-M

1 1
BO
1 1
BU BO 1 V28 R14
CC46 BU BO CC39 CC40 CC41 CC47 W28 VDDIO_MEM_S3_2 VDDCR_20 R16 2
22U_0603_6.3V6-M

22U_0603_6.3V6-M
VDDIO_MEM_S3_3 VDDCR_21
1U_0201_6.3V6-M

BO @ W32 T7
2 +1.8VALW +1.8VS VDDIO_MEM_S3_4 VDDCR_22

1U_0201_6.3V6-M

1U_0201_6.3V6-M
CC1391 Y22 T10
2 2 2 2 2 Y25 VDDIO_MEM_S3_5 VDDCR_23 T13
Y28 VDDIO_MEM_S3_6 VDDCR_24 T15 All BU(on bottom side under SOC)
AA20 VDDIO_MEM_S3_7 VDDCR_25 T17
AA23 VDDIO_MEM_S3_8 VDDCR_26 U14
@ Reserves for 1.8V HDA for codec AA26 VDDIO_MEM_S3_9 VDDCR_27 U16
VDDIO_MEM_S3_10 VDDCR_28

2
AA28 V13
RC3184 AA32 VDDIO_MEM_S3_11 VDDCR_29 V15
@ 0_0603_5%
AC20 VDDIO_MEM_S3_12 VDDCR_30 V17
AC22 VDDIO_MEM_S3_13 VDDCR_31 W7
AC25 VDDIO_MEM_S3_14 VDDCR_32 W10

1
@ AC28 VDDIO_MEM_S3_15 VDDCR_33 W14 +VDDCR_SOC
RC3183 AD23 VDDIO_MEM_S3_16 VDDCR_34 W16
0_5%_0603 AD26 VDDIO_MEM_S3_17 VDDCR_35 Y8
+3VALW_APU 1 2 +VDDIO_AZ AD28 VDDIO_MEM_S3_18 VDDCR_36 Y13
C AD32 VDDIO_MEM_S3_19 VDDCR_37 Y15 C
1 1 CC56 VDDIO_MEM_S3_20 VDDCR_38
CC55 AE20 Y17

22U_0603_6.3V6-M
BU AE22 VDDIO_MEM_S3_21 VDDCR_39 AA7
BO 1 1

1U_0402_6.3V7-K
VDDIO_MEM_S3_22 VDDCR_40

1U_0201_6.3V6-M

CC57
CC73 AE25 AA10 CC58

180P_0402_50V8-J
2 2 AE28 VDDIO_MEM_S3_23 VDDCR_41 AA14
BO BU AF23 VDDIO_MEM_S3_24 VDDCR_42 AA16
1 1 BO 1 VDDIO_MEM_S3_25 VDDCR_43 2 2
CC71 CC72 AF26 AA18
22U_0603_6.3V6-M

AF28 VDDIO_MEM_S3_26 VDDCR_44 AB13


VDDIO_MEM_S3_27 VDDCR_45
1U_0201_6.3V6-M

1U_0201_6.3V6-M

@ AF32 AB15
2 2 2 AG20 VDDIO_MEM_S3_28 VDDCR_46 AB17
AG22 VDDIO_MEM_S3_29 VDDCR_47 AB19 All BU(on bottom side under SOC)
AG25 VDDIO_MEM_S3_30 VDDCR_48 AC14
AG28 VDDIO_MEM_S3_31 VDDCR_49 AC16
AJ20 VDDIO_MEM_S3_32 VDDCR_50 AC18
AJ23 VDDIO_MEM_S3_33 VDDCR_51 AD7
AJ26 VDDIO_MEM_S3_34 VDDCR_52 AD10
AJ28 VDDIO_MEM_S3_35 VDDCR_53 AD13
AJ32 VDDIO_MEM_S3_36 VDDCR_54 AD15
+0.9VS +0.9VALW +3VALW_APU +1.8VALW +1.8VS +3VS_APU AK28 VDDIO_MEM_S3_37 VDDCR_55 AD17
AL28 VDDIO_MEM_S3_38 VDDCR_56 AD19
AL32 VDDIO_MEM_S3_39 VDDCR_57 AE8 +1.2V
VDDIO_MEM_S3_40 VDDCR_58 AE14
4A 1A 0.25A 0.5A 2A 0.25A +VDDIO_AZ AP12 VDDCR_59 AE16
+0.9VALW VDDIO_AUDIO VDDCR_60 AE18 CC60 CC61 CC62 CC63 CC64 CC65 CC66 CC67 CC68 CC69
AL18 VDDCR_61 AF7 CC59
VDD_33_1 VDDCR_62

22U_4V_M_X5R_0402

22U_4V_M_X5R_0402

22U_4V_M_X5R_0402

22U_4V_M_X5R_0402

22U_4V_M_X5R_0402

22U_4V_M_X5R_0402
22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M
AM17 AF10 1 1 1 1 1 1 1 1 1 1 1 1

1U_0402_6.3V7-K

1U_0402_6.3V7-K
VDD_33_2 VDDCR_63 AF13
AL20 VDDCR_64 AF15 CC70
VDD_18_1 VDDCR_65

@
AM19 AF17 180P_25V_K_X7R_0201
VDD_18_2 VDDCR_66 AF19 2 2 2 2 2 2 2 2 2 2 2 2
AL19 VDDCR_67 AG14
1 BU BU BO VDD_18_S5_1 VDDCR_68
CC83 1 1 1 AM18 AG16
22U_0603_6.3V6-M

B BO CC84 CC85 CC86 VDD_18_S5_2 VDDCR_69 AG18 CD@ B


VDDCR_70 CD@
AL17 AH13
2 VDD_33_S5_1 VDDCR_71
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

@ AM16 AH15
2 2 2 VDD_33_S5_2 VDDCR_72 AH17 All BU(on bottom side under SOC)
AL14 VDDCR_73 AH19
AL15 VDDP_S5_1 VDDCR_74 AJ7
AM14 VDDP_S5_2 VDDCR_75 AJ10 COST DOWN 2 PIECES
VDDP_S5_3 VDDCR_76 AJ14
AL13 VDDCR_77 AJ16
AM12 VDDP_1 VDDCR_78 AJ18
AM13 VDDP_2 VDDCR_79 AK13
VDDP_3 VDDCR_80
+RTC_LDO AN12
VDDP_4 VDDCR_81
AK15
AN13 AK17
VDDP_5 VDDCR_82 AK19
1K_0402_5% 1 RC101 2 +VDDBT_RTC 0.1A AT11 VDDCR_83
VDDBT_RTC_G
FP5 REV 0.90
+1.2V

1U_0402_6.3V7-K
PART 6 OF 13
1

JCMOS1 1 1 AMD-RAVEN-FP5_BGA1140 DECOUPLING BETWEEN PROCESSOR AND DIMMs


+0.9VS @

CC87
ACROSS VDDIO AND VSS SPLIT
@
CC88
2

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
SHORT PADS
2 2

0.22U_0402_10V6-K
BO
1 1 1 1 1 1
CC81 CC82

180P_0402_50V8-J

180P_0402_50V8-J
CC77

CC78

CC79

CC80
CC91 CC92 CC93 CC94 CC95 CC96 CC97 CC98
1 1 1 1 1 1 1 1 1 1 1 @
BO BU 2 2 2 2 2 2
BO BU CD@ BU BU BO BO CC99
180P_0402_50V8-J

BO BU
CC90
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

CC89 @
22U_0603_6.3V6-M

22U_0603_6.3V6-M

2 2 2 2 2 2 2 2 2 2 2

A A
All BU(on bottom side under SOC)

4x0.22UF (0402)+2x180PF(0402)

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 POWER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 10 of 67
5 4 3 2 1
5 4 3 2 1

D D

UC1G UC1H UC1K

GND GND GND/RSVD


N12 K32 V8 AG8 AR5 BD16
A3 VSS_316 VSS_62 L5 V11 VSS_124 VSS_186 AG11 AR7 VSS_248 VSS_310 BD19
A5 VSS_1 VSS_63 L13 V12 VSS_125 VSS_187 AG12 AR12 VSS_249 VSS_311 BD21
A7 VSS_2 VSS_64 L15 V14 VSS_126 VSS_188 AG13 AR14 VSS_250 VSS_312 BD23
A10 VSS_3 VSS_65 L18 V16 VSS_127 VSS_189 AG15 AR16 VSS_251 VSS_313 BD26
A12 VSS_4 VSS_66 L20 V18 VSS_128 VSS_190 AG17 AR19 VSS_252 VSS_314 BD30
A14 VSS_5 VSS_67 L25 V20 VSS_129 VSS_191 AG19 AR21 VSS_253 VSS_315
A16 VSS_6 VSS_68 L28 V22 VSS_130 VSS_192 AH14 AR26 VSS_254
A19 VSS_7 VSS_69 M1 V25 VSS_131 VSS_193 AH16 AR28 VSS_255
A21 VSS_8 VSS_70 M5 W1 VSS_132 VSS_194 AH18 AR32 VSS_256
A23 VSS_9 VSS_71 M12 W5 VSS_133 VSS_195 AH20 AU5 VSS_257
A26 VSS_10 VSS_72 M21 W13 VSS_134 VSS_196 AJ1 AU8 VSS_258
A30 VSS_11 VSS_73 M23 W15 VSS_135 VSS_197 AJ5 AU11 VSS_259
C3 VSS_12 VSS_74 M26 W17 VSS_136 VSS_198 AJ13 AU13 VSS_260
C32 VSS_13 VSS_75 M28 W19 VSS_137 VSS_199 AJ15 AU15 VSS_261
D16 VSS_14 VSS_76 M32 W23 VSS_138 VSS_200 AJ17 AU18 VSS_262
D18 VSS_15 VSS_77 N4 W26 VSS_139 VSS_201 AJ19 AU20 VSS_263
D20 VSS_16 VSS_78 N5 Y5 VSS_140 VSS_202 AK5 AU22 VSS_264
C E7 VSS_17 VSS_79 N8 Y11 VSS_141 VSS_203 AK8 AU25 VSS_265 B20 C
E8 VSS_18 VSS_80 N11 Y12 VSS_142 VSS_204 AK11 AU28 VSS_266 RSVD_1 G3
E10 VSS_19 VSS_81 N13 Y14 VSS_143 VSS_205 AK12 AV1 VSS_267 RSVD_5 J20
E11 VSS_20 VSS_82 N15 Y16 VSS_144 VSS_206 AK14 AV5 VSS_268 RSVD_7 K3
E12 VSS_21 VSS_83 N17 Y18 VSS_145 VSS_207 AK16 AV7 VSS_269 RSVD_8 K6
E13 VSS_22 VSS_84 N19 Y20 VSS_146 VSS_208 AK18 AV10 VSS_270 RSVD_9 K20
E14 VSS_23 VSS_85 N22 AA1 VSS_147 VSS_209 AK20 AV12 VSS_271 RSVD_10 M3
E15 VSS_24 VSS_86 N25 AA5 VSS_148 VSS_210 AK22 AV14 VSS_272 RSVD_11 M6
E16 VSS_25 VSS_87 N28 AA13 VSS_149 VSS_211 AK25 AV16 VSS_273 RSVD_12 M13
E18 VSS_26 VSS_88 P1 AA15 VSS_150 VSS_212 AL1 AV19 VSS_274 RSVD_13 P6
E19 VSS_27 VSS_89 P5 AA17 VSS_151 VSS_213 AL5 AV21 VSS_275 RSVD_22 P22
E20 VSS_28 VSS_90 P14 AA19 VSS_152 VSS_214 AL7 AV23 VSS_276 RSVD_23 T3
E21 VSS_29 VSS_91 P16 AB14 VSS_153 VSS_215 AL10 AV26 VSS_277 RSVD_30 T6
E22 VSS_30 VSS_92 P18 AB16 VSS_154 VSS_216 AL12 AV28 VSS_278 RSVD_31 T29
E23 VSS_31 VSS_93 P20 AB18 VSS_155 VSS_217 AL16 AV32 VSS_279 RSVD_37 W6
E25 VSS_32 VSS_94 P23 AB20 VSS_156 VSS_218 AL23 AW5 VSS_280 RSVD_44 W21
E26 VSS_33 VSS_95 P26 AC5 VSS_157 VSS_219 AL26 AW28 VSS_281 RSVD_49 W22
E27 VSS_34 VSS_96 P28 AC8 VSS_158 VSS_220 AM5 AY6 VSS_282 RSVD_50 Y21
F5 VSS_35 VSS_97 P32 AC11 VSS_159 VSS_221 AM8 AY7 VSS_283 RSVD_57 Y27
F28 VSS_36 VSS_98 R5 AC12 VSS_160 VSS_222 AM15 AY8 VSS_284 RSVD_58 AA3
G1 VSS_37 VSS_99 R11 AC13 VSS_161 VSS_223 AM20 AY10 VSS_285 RSVD_59 AA6
G5 VSS_38 VSS_100 R12 AC15 VSS_162 VSS_224 AM22 AY11 VSS_286 RSVD_60 AC29
G16 VSS_39 VSS_101 R13 AC17 VSS_163 VSS_225 AM25 AY12 VSS_287 RSVD_69 AD3
G19 VSS_40 VSS_102 R15 AC19 VSS_164 VSS_226 AM28 AY13 VSS_288 RSVD_70 AD6
G21 VSS_41 VSS_103 R17 AD1 VSS_165 VSS_227 AN1 AY14 VSS_289 RSVD_71 AF3
G23 VSS_42 VSS_104 R19 AD5 VSS_166 VSS_228 AN5 AY15 VSS_290 RSVD_74 AF6
G26 VSS_43 VSS_105 R22 AD14 VSS_167 VSS_229 AN7 AY16 VSS_291 RSVD_75 AF30
G28 VSS_44 VSS_106 R25 AD16 VSS_168 VSS_230 AN10 AY18 VSS_292 RSVD_78 AJ6
G32 VSS_45 VSS_107 R28 AD18 VSS_169 VSS_231 AN15 AY19 VSS_293 RSVD_79 AJ24
H5 VSS_46 VSS_108 R30 AD20 VSS_170 VSS_232 AN18 AY20 VSS_294 RSVD_80 AK23
H13 VSS_47 VSS_109 T1 AE5 VSS_171 VSS_233 AN21 AY21 VSS_295 RSVD_81 AK27
H18 VSS_48 VSS_110 T5 AE11 VSS_172 VSS_234 AN23 AY22 VSS_296 RSVD_82 AL3
B H20 VSS_49 VSS_111 T14 AE12 VSS_173 VSS_235 AN26 AY23 VSS_297 RSVD_83 AN29 B
H22 VSS_50 VSS_112 T16 AE13 VSS_174 VSS_236 AN28 AY25 VSS_298 RSVD_87 AN31
H25 VSS_51 VSS_113 T18 AE15 VSS_175 VSS_237 AN32 AY26 VSS_299 RSVD_88
H28 VSS_52 VSS_114 T20 AE17 VSS_176 VSS_238 AP5 AY27 VSS_300
K1 VSS_53 VSS_115 T23 AE19 VSS_177 VSS_239 AP8 BB1 VSS_301
K5 VSS_54 VSS_116 T26 AF1 VSS_178 VSS_240 AP13 BB20 VSS_302
K16 VSS_55 VSS_117 T28 AF5 VSS_179 VSS_241 AP15 BB32 VSS_303 M14
K19 VSS_56 VSS_118 U13 AF14 VSS_180 VSS_242 AP18 BD3 VSS_304 RSVD_14 AL6
K21 VSS_57 VSS_119 U15 AF16 VSS_181 VSS_243 AP20 BD7 VSS_305 RSVD_84 AL11
K22 VSS_58 VSS_120 U17 AF18 VSS_182 VSS_244 AP25 BD10 VSS_306 RSVD_85 AN16
K26 VSS_59 VSS_121 U19 AF20 VSS_183 VSS_245 AP28 BD12 VSS_307 RSVD_86
K28 VSS_60 VSS_122 V5 AG5 VSS_184 VSS_246 AR1 BD14 VSS_308
VSS_61 VSS_123 VSS_185 VSS_247 VSS_309
FP5 REV 0.90 FP5 REV 0.90 FP5 REV 0.90
PART 7 OF 13 PART 8 OF 13 PART 11 OF 13

AMD-RAVEN-FP5_BGA1140 AMD-RAVEN-FP5_BGA1140 AMD-RAVEN-FP5_BGA1140


@ @ @

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 11 of 67
5 4 3 2 1
5 4 3 2 1

D D

STRAP PINS SYS_RESET#


1:USE 48MHZ CRYSTAL CLOCK AND
GENERATE BOTH INTERNAL AND EXTERNAL CLOCKS(DEFAULT)
C C
0:USE 100MHZ PCIE CLOCK AS REFERENCE CLOCK AND
PCH_SPI_CLK GENERATE INTERNAL CLOCKS ONLY

1:NORMAL RESET MODE(DEFAULT)


SYS_RESET# 0:SHORT RESET MODE

LPC ROM EMULATOR HEADER

@ @ +3VALW_APU +3VS_APU
CC1387 RC3205
15P_50V_J_NPO_0402 33_0402_5% PIN4 should be removed as a Key
2

1 2 1 2
UN NA ME D_ 16 _C AP _I 11 6_ B
+3VS_APU
B B
RC3147 RC3145
0_0402_5% 0_0402_5%

1
DAISY CHAIN ROUTING FOR LPC SIGNALS
RC4099
1

CLK_PCI_EC LPC@ LPC@ 10K_0402_5%


8,44 CLK_PCI_EC LPC_FRAME# 1 J601
2 LPC@

2
8,44 LPC_FRAME# APU_LPC_RST# RC3144 1 LPC@ 2 0_0402_5% 3 4
8,44 APU_LPC_RST# LPC_RST#_H 5 6
UN NA ME D_ 16 _C ON 20 _I 13 0_ P6
2 0_0402_5% PM_SLP_S5#
RC3189 1 @
LPC_AD3 7 8 LPC_AD2 PM_SLP_S5# 7,44
8,44 LPC_AD3 +3VS_APU_LPC
9 10 LPC_AD1 LPC_AD2 8,44
LPC_AD0 11 12 LPC_AD1 8,44
8,44 LPC_AD0 APU_SMB_CK0 APU_SMB_CK0_LPC APU_SMB_DA0_LPC
RC3152 1 LPC@ 2 0_0402_5% 13 14 RC3190 1 LPC@ 2 0_0402_5%
7,16,19 APU_SMB_CK0 15 16 APU_SMB_DA0 7,16,19
SERIRQ
17 18 LPC_CLKRUN# SERIRQ 8,44
19 20 LPC_CLKRUN# 8
LPCPD# LDRQ0#
8 LPCPD# LDRQ0# 8
1 1 HEADER_2X10
LPC@ LPC@ @
CC1394 CC1395
0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201
2 2

RC3152 RC3153 should be put on APU side to reduce stub when MP

+3VS_APU

RC3149 2 LPC@ 1 10K_0402_5% LPCPD#


2 @ 1 10K_0402_5% LPC_CLKRUN#
RC3148

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 LPC DEBUG CONN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 12 of 67
5 4 3 2 1
5 4 3 2 1

D D

C C

+3VL

+RTC_LDO

2
D249 50mA
RB751VM-40TE-17_UMD2M2
+RTCBATT +RTC_33 +RTC_LS +RTC_LDO
D250 UC5
@ JRTC1 R302 @

1
1 1 2 2 1 2 3 J49 2 1 JUMP_43X39
1 VIN VOUT 2 1

1
2
2 3 1K_0402_1% RC8
1 RB751VM-40TE-17_UMD2M2 1
GND1 4 C9575 470_0603_5%
GND2 @ 1 4 C9576 @
1U_0402_6.3V7-K GND ENABLE 10U_6.3V_M_X5R_0402

2
HIGHS_WS33020-S0351-HF 2 NCP698SQ15T1G_SC-82AB4 2
R306 1 2 10K_0402_5% @

1
1 D QC7
C9577 2 EC_RTCRST#_ON
EC_RTCRST#_ON 44
@ G

1
1U_0402_6.3V7-K
2
VFB=0.8V S RC15

3
L2N7002KWT1G_SOT323-3 100K_0402_5%
@

2
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 RTC BATTERY


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 13 of 67
5 4 3 2 1
5 4 3 2 1

D D

DYL@ 0918
SCS00007L00 to SCS00006V00
For sort out material
C
EC Reset Switch C
Near JUSB1 Connector VF = 0.35V
D751 1 2 RB521CM-30T2R_VMN2M-2
OTP_RESET# 54
D4078 1 2 RB521CM-30T2R_VMN2M-2 WRST#
WRST# 44
VF = 0.35V

1
S9501 DYL@ 1017
SC100006Y00 to SCS00006V00
SKRPABE010_4P SC100006Y00 Vf =1.2V greater than EC Vin_Low
4

+RTC_33

1
Switch for D Cover Open RE71

1M_0402_5%

2
RE74 1 @ 2 0_0402_5%
B APU_DCOVER_SW 7 B

DCOVER_SW RE72 1 @ 2 0_0402_5%


7,44 DCOVER_SW

1
S1301
1

1 SPVR310200_4P
RE73
CE21 @
1U_6.3V_M_X5R_0201
1K_0402_1%
2
2

DYL@ 1017 S1301 follow T490 SIT SCH change


3

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date SWITCH

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 14 of 67
5 4 3 2 1
5 4 3 2 1

D D

+1.8VALW +1.8VALW

2
1
RC554
2.2K_0404_4P2R_5%

3
4
@

RC532 1 2 0_0402_5% EC_I2C2_SCL_PD_R 1 3


22,24 EC_I2C2_SCL_PD APU_I2C0_SCL 7
@ @
LNTK3043NT5G 1N SOT-723-3
QC50A. Vth = 1.5V (MAX)
B. Id = 200mA
C. RDSon = 10 ohm(MAX)
+1.8VALW D. Vth in schematic = 0 - 1.8V

2
RC533 1 2 0_0402_5% EC_I2C2_SDA_PD_R 1 3
22,24 EC_I2C2_SDA_PD APU_I2C0_SDA 7
@ @
QC140
LNTK3043NT5G 1N SOT-723-3

C C

V1P8_LDO_DOCK +1.8VALW +1.8VALW

2
R11324 R11325 R11183 R11184
10K_0201_5% 10K_0201_5% 4.7K_0201_5% 4.7K_0201_5%

2
1

1
1 3
24 CCG4_APU_USBC_SCL APU_USBC_SCL 9

A. Vth = 1.5V (MAX)


QC5 B. Id = 200mA
C. RDSon = 10 ohm(MAX)
LNTK3043NT5G 1N SOT-723-3
D. Vth in schematic = 0 - 1.8V
RC3260 1 2 0_0402_5%
@

B B

+1.8VALW

2
1 3
24 CCG4_APU_USBC_SDA APU_USBC_SDA 9

QC14
LNTK3043NT5G 1N SOT-723-3
RC3259 1 2 0_0402_5%
@

A A

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date SMBUS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 15 of 67
5 4 3 2 1
5 4 3 2 1

+1.2V

2 2
CD65 CD64 +1.2V +2.5V
47P_0201_25V8-J 100P_0201_50V8-J +1.2V
RF@ RF@
1 1
1 1 1 1 1 1 1 1 1 1
CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD11 CD12

1
RD1 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K 1U_0402_6.3V6-K
D
2 2 2 @2 2 2 2 2 2 2 D
@ @ @
1K_0402_1% @

2
1026 DYL@ For FVT BOM CD4 change to CD@
1026 DYL@ For FVT BOM CD9 change to CD@
M_VREF_CA_DIMMA

+2.5V +1.2V +0.6VS

1
1 1
RD2 CD13 @ 1 1
CD14 CD15 CD16 CD17 CD18 CD19 CD20 CD21 + CD22 CD23 CD24 CD25
2 2 1K_0402_1% 0.1U_0402_10V7-K @ @ 330U_D2_2V_Y
CD67 CD66 2 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K

2
47P_0201_25V8-J 100P_0201_50V8-J 2 2 2
RF@ RF@
1 1

DYL@ 0904
SGA0000610J to SGA20331E1J
For sort out material

+1.2V

+1.2V +1.2V

1
+2.5V +1.2V +1.2V +0.6VS RD3
JDDR1B
1K_0402_1%
JDDR1A

2
DDR_A_MA3 131 132 DDR_A_MA2
DDR_A_MA1 133 A3 A2 134
A1 EVENT_n/NF DDR_A_EVENT# 4
1 2 135 136
DDR_A_D5 3 VSS_1 VSS_2 4 DDR_A_D4 SA_CLK_DDR0 137 VDD_9 VDD_10 138 SA_CLK_DDR1
DQ5 DQ4 4 SA_CLK_DDR0 SA_CLK_DDR#0 CK0_t CK1_t/NF SA_CLK_DDR#1 SA_CLK_DDR1 4
C 5 6 139 140 C
DDR_A_D1 VSS_3 VSS_4 DDR_A_D0 4 SA_CLK_DDR#0 CK0_c CK1_c/NF SA_CLK_DDR#1 4
7 8 141 142
9 DQ1 DQ0 10 DDR_A_PARITY 143 VDD_11 VDD_12 144 DDR_A_MA0
DDR_A_DQS#0 VSS_5 VSS_6 DDRA_MA_DM0 4 DDR_A_PARITY Parity A0
11 12
DDR_A_DQS0 13 DQS0_C DM0_n/DBI0_n 14
15 DQS0_t VSS_7 16 DDR_A_D6 DDR_A_BA1 145 146 DDR_A_MA10
DDR_A_D7 VSS_8 DQ6 4 DDR_A_BA1 BA1 A10/AP
17 18 147 148
19 DQ7 VSS_9 20 DDR_A_D2 DDR_A_CS0# 149 VDD_13 VDD_14 150 DDR_A_BA0
DDR_A_D3 VSS_10 DQ2 4 DDR_A_CS0# DDR_A_WE# CS0_n BA0 DDR_A_RAS# DDR_A_BA0 4
21 22 151 152
DQ3 VSS_11 DDR_A_D9 4 DDR_A_WE# WE_n/A14 RAS_n/A16 DDR_A_RAS# 4
23 24 153 154
DDR_A_D8 25 VSS_12 DQ12 26 DDR_A_ODT0 155 VDD_15 VDD_16 156 DDR_A_CAS#
DQ13 VSS_13 DDR_A_D12 4 DDR_A_ODT0 DDR_A_CS1# ODT0 CAS_n/A15 DDR_A_MA13 DDR_A_CAS# 4
27 28 157 158
DDR_A_D13 VSS_14 DQ8 4 DDR_A_CS1# CS1_n A13
29 30 159 160
31 DQ9 VSS_15 32 DDR_A_DQS#1 DDR_A_ODT1 161 VDD_17 VDD_18 162
DDRA_MA_DM1 VSS_16 DQS1_c DDR_A_DQS1 4 DDR_A_ODT1 ODT1 C0/CS2_n/NC M_VREF_CA_DIMMA
33 34 163 164
35 DM1_n/DBl1_n DQS1_t 36 165 VDD_19 VREFCA 166 SA2_CHA_P
DDR_A_D10 37 VSS_17 VSS_18 38 DDR_A_D14 167 C1/CS3_n/NC RFU/SA2 168
DQ15 DQ14 DDR_A_D37 VSS_53 VSS_54 DDR_A_D36 1 1
39 40 +3VS 169 170 CD26 CD27
DDR_A_D15 41 VSS_19 VSS_20 42 DDR_A_D11 171 DQ37 DQ36 172
43 DQ10 DQ11 44 +3VS +3VS DDR_A_D33 173 VSS_55 VSS_56 174 DDR_A_D32 1000P_0402_50V7-K 0.1U_0402_10V7-K
DDR_A_D17 45 VSS_21 VSS_22 46 DDR_A_D21 175 DQ33 DQ32 176 2 2
47 DQ21 DQ20 48 DDR_A_DQS#4 177 VSS_57 VSS_58 178 DDRA_MA_DM4
VSS_23 VSS_24 DQS4_c DM4_n/DBl4_n

1
DDR_A_D16 49 50 DDR_A_D20 DDR_A_DQS4 179 180
51 DQ17 DQ16 52 RD4 RD5 RD6 181 DQS4_t VSS_59 182 DDR_A_D39
DDR_A_DQS#2 53 VSS_25 VSS_26 54 DDRA_MA_DM2 @ @ @ DDR_A_D38 183 VSS_60 DQ39 184
DDR_A_DQS2 55 DQS2_c DM2_n/DBl2_n 56 10K_0402_5% 10K_0402_5% 10K_0402_5% 185 DQ38 VSS_61 186 DDR_A_D35
57 DQS2_t VSS_27 58 DDR_A_D22 DDR_A_D34 187 VSS_62 DQ35 188

2
DDR_A_D23 59 VSS_28 DQ22 60 189 DQ34 VSS_63 190 DDR_A_D45
61 DQ23 VSS_29 62 DDR_A_D19 SA0_CHA_P SA1_CHA_P SA2_CHA_P DDR_A_D44 191 VSS_64 DQ45 192
DDR_A_D18 63 VSS_30 DQ18 64 193 DQ44 VSS_65 194 DDR_A_D41
65 DQ19 VSS_31 66 DDR_A_D25 DDR_A_D40 195 VSS_66 DQ41 196
VSS_32 DQ28 DQ40 VSS_67
2

2
DDR_A_D29 67 68 @ @ @ 197 198 DDR_A_DQS#5
69 DQ29 VSS_33 70 DDR_A_D24 RD22 RD7 RD8 DDRA_MA_DM5 199 VSS_68 DQS5_c 200 DDR_A_DQS5
DDR_A_D28 71 VSS_34 DQ24 72 201 DM5_n/DBl5_n DQS5_t 202
DQ25 VSS_35 DDR_A_DQS#3 0_0402_5% 0_0402_5% 0_0402_5% DDR_A_D47 VSS_69 VSS_70 DDR_A_D42
73 74 203 204
DDRA_MA_DM3 75 VSS_36 DQS3_c 76 DDR_A_DQS3 205 DQ46 DQ47 206
1

1
77 DM3_n/DBl3_n DQS3_t 78 DDR_A_D46 207 VSS_71 VSS_72 208 DDR_A_D43
DDR_A_D26 79 VSS_37 VSS_38 80 DDR_A_D30 209 DQ42 DQ43 210
81 DQ30 DQ31 82 DDR_A_D48 211 VSS_73 VSS_74 212 DDR_A_D53
B DDR_A_D27 83 VSS_39 VSS_40 84 DDR_A_D31 213 DQ52 DQ53 214 B
85 DQ26 DQ27 86 DDR_A_D49 215 VSS_75 VSS_76 216 DDR_A_D52 52
87 VSS_41 VSS_42 88 +1.2V 217 DQ49 DQ48 218
89 CB5/NC CB4/NC 90 DDR_A_DQS#6 219 VSS_77 VSS_78 220 DDRA_MA_DM6
91 VSS_43 VSS_44 92 DDR_A_DQS6 221 DQS6_c DM6_n/DBl6_n 222
93 CB1/NC
VSS_45
CB0/NC
VSS_46
94 SPD Address = 0H 223 DQS6_t
VSS_80
VSS_79
DQ54
224 DDR_A_D54
1

95 96 DDR_A_D51 225 226


97 DQS8_c DM8_n/DBI_n/NC 98 RD9 227 DQ55 VSS_81 228 DDR_A_D50
99 DQS8_t VSS_47 100 @ DDR_A_D55 229 VSS_82 DQ50 230
101 VSS_48 CB6/NC 102 1K_0402_1% 231 DQ51 VSS_83 232 DDR_A_D57 57
103 CB2/NC VSS_49 104 DDR_A_D61 233 VSS_84 DQ60 234
2

105 VSS_50 CB7/NC 106 R11328 235 DQ61 VSS_85 236 DDR_A_D59
107 CB3/NC VSS_51 108DDR4_A_DRAMRST#_R 1 2 33_0201_5% DDR_A_D60 237 VSS_86 DQ57 238
DDR_A_CKE0 109 VSS_52 RESET_n 110 DDR_A_CKE1 DDR4_A_DRAMRST# 4 239 DQ56 VSS_87 240 DDR_A_DQS#7
4 DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 4 DDRA_MA_DM7 VSS_88 DQS7_c DDR_A_DQS7
111 112 241 242
DDR_A_BG1 113 VDD_1 VDD_2 114 DDR_A_ACT_N 243 DM7_n/DBl7_n DQS7_t 244
4 DDR_A_BG1 DDR_A_BG0 BG1 ACT_n DDR_A_ALERT_N DDR_A_ACT_N 4 DDR_A_D56 VSS_89 VSS_90 DDR_A_D58
115 116 245 246 58
4 DDR_A_BG0 BG0 ALERT_n DDR_A_ALERT_N 4 DQ62 DQ63
117 118 247 248
DDR_A_MA12 119 VDD_3 VDD_4 120 DDR_A_MA11 63 DDR_A_D63 249 VSS_91 VSS_92 250 DDR_A_D62 62
DDR_A_MA9 121 A12 A11 122 DDR_A_MA7 251 DQ58 DQ59 252
123 A9 A7 124 APU_SMB_CK0 253 VSS_93 VSS_94 254 APU_SMB_DA0
DDR_A_MA8 VDD_5 VDD_6 DDR_A_MA5 7,12,19 APU_SMB_CK0
+3VS_SODIMM SCL SDA SA0_CHA_P APU_SMB_DA0 7,12,19
125 126 RD10 2 @ 1 255 256
DDR_A_MA6 A8 A5 DDR_A_MA4 +3VS VDDSPD SA0
127 128 257 258
129 A6 A4 130 0_0402_5% 259 VPP_1 Vtt 260 SA1_CHA_P
VDD_7 VDD_8 1 VPP_2 SA1
CD30 1 1
1 EMC_NS@ CD28 261 262
0.1U_0402_10V7-K CD29 GND_1 GND_2
ARGOS_D4ASL-26010-1P40 CD76 2 0.1U_0402_10V7-K 2.2UC_6.3VC_MC_X5RC_0402 ARGOS_D4ASL-26010-1P40
@ 4700P_25V_K_X7R_0402 2 2 @
2

2 2
CD74 CD75
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

DDRA_MA_DM[0..7] 4
A A
DDR_A_D[0..63] 4

DDR_A_MA[0..13] 4

DDR_A_DQS#[0..7] 4

DDR_A_DQS[0..7] 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 SO DIMM CHANNEL-B (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 16 of 67
5 4 3 2 1
5 4 3 2 1

8Gb SDP
16Gb DDP
8Gb SDP CD370
16Gb DDP UD1
SB_CLK_DDR#0
SB_CLK_DDR0
RD243
RD263
1
1
2 39_0402_5%
2 39_0402_5%
1 2
+2.5V
DDR_B_D47 0.1U_0402_10V7-K
D7 B1 UD2 Note: CLK termination must match the CLK reference plane.
DDR_B_D41 DQU7 VPP_B1 +2.5V +1.2V
D3 R9 1 2
DDR_B_D43 DQU6 VPP_R9 +VREF_CA_CHB DDR_B_D26
C8 D7 B1
DDR_B_D40 DQU5 DDR_B_D25 DQU7 VPP_B1 DDR4_B_DRAMRST# DDR4_B_DRAMRST#_R
C2 M1 D3 R9 10_0402_5% 1 2 R502
DDR_B_D46 5 DDR4_B_DRAMRST#

1U_0402_6.3V6-K
DDR_B_D27 DDR_B_ALERT_N

0.1U_0201_6.3V6-K
C7 DQU4 VREFCA C8 DQU6 VPP_R9 +VREF_CA_CHB C20 3.3P_50V_C_NPO_0402 @ RD279 1 2 1K_0402_1%
DDR_B_D45 DQU3 +1.2V 1 1 DDR_B_D24 DQU5
C3 B3 C2 M1

CD521

CD534
1000P_0201_50V7-K

1U_0402_6.3V6-K
DDR_B_D42 DDR_B_D30

0.1U_0201_6.3V6-K
B8 DQU2 VDD_B3 B9 C7 DQU4 VREFCA
DDR_B_D44 1 1 DDR_B_D29 1 1

0.1U_0201_6.3V6-K
A3 DQU1 VDD_B9 D1 C3 DQU3 B3 +1.2V

CD415

CD525

CD518

CD112
1000P_0201_50V7-K
DDR_B_D31

0.1U_0201_6.3V6-K
DQU0 VDD_D1 G7 2 2 B8 DQU2 VDD_B3 B9 +0.6VS @
DDR_B_DQS5 VDD_G7 DDR_B_D28 DQU1 VDD_B9 1 1 DRAM_DDR_B_BG1 DDR_B_BG1
B7 J1 A3 D1 RD257 2 1 0_0402_5%

CD349

CD523
DDR_B_DQS#5 DQSU_T VDD_J1 2 2 DQU0 VDD_D1 2 2 DDR_B_BG1 5
A7 J9 G7
DQSU_C VDD_J9 DDR_B_DQS3 VDD_G7
L1 B7 J1
DDRA_MB_DM5 VDD_L1 DDR_B_DQS#3 DQSU_T VDD_J1 2 2
5 DDRA_MB_DM5 E2 L9 A7 J9
DMU_n/DBIU_n VDD_L9 DQSU_C VDD_J9

2
R1 L1
VDD_R1 DDRA_MB_DM3 VDD_L1
D T9 E2 L9 RD275 D
VDD_T9 5 DDRA_MB_DM3 DMU_n/DBIU_n VDD_L9 R1 0_0402_5%
DDR_B_D39 VDD_R1 DDR_B_CS0#
J7 A1 T9 RD247 1 2 39_0201_5%
DDR_B_D37 DQL7 VDDQ_A1 VDD_T9 DDR_B_ODT0
J3 A9 RD259 1 2 39_0201_5% @
DDR_B_D38 DDR_B_D22

1
H8 DQL6 VDDQ_A9 C1 J7 A1
DDR_B_D33 DQL5 VDDQ_C1 DDR_B_D16 DQL7 VDDQ_A1 DDR_B_CKE0
H2 D9 J3 A9 RD283 1 2 39_0201_5%
DDR_B_D34 DQL4 VDDQ_D9 DDR_B_D19 DQL6 VDDQ_A9
H7 F2 H8 C1
DDR_B_D36 DQL3 VDDQ_F2 DDR_B_D20 DQL5 VDDQ_C1 DDR_B_MA0
H3 F8 H2 D9 RD258 1 2 39_0201_5%
DDR_B_D35 DQL2 VDDQ_F8 DDR_B_D18 DQL4 VDDQ_D9 DDR_B_MA1
F7 G1 H7 F2 DDR_B_D[0..63] RD278 1 2 39_0201_5%
DDR_B_D32 DQL1 VDDQ_G1 DDR_B_D21 DQL3 VDDQ_F2 DDR_B_MA2
G2 G9 H3 F8 RD274 1 2 39_0201_5%
DQL0 VDDQ_G9 DDR_B_D23 DQL2 VDDQ_F8 5 DDR_B_D[0..63] DDR_B_MA3
J2 F7 G1 RD273 1 2 39_0201_5%
DDR_B_DQS4 VDDQ_J2 DDR_B_D17 DQL1 VDDQ_G1 DDR_B_DQS#[0..7]
G3 J8 G2 G9
DDR_B_DQS#4 DQSL_t VDDQ_J8 DQL0 VDDQ_G9 5 DDR_B_DQS#[0..7] DDR_B_MA4
F3 J2 DDR_B_DQS[0..7] RD241 1 2 39_0201_5%
DQSL_c DDR_B_DQS2 VDDQ_J2 DDR_B_MA5
G3 J8 RD248 1 2 39_0201_5%
DDRA_MB_DM4 DDR_B_DQS#2 DQSL_t VDDQ_J8 5 DDR_B_DQS[0..7] DDR_B_MA6
E7 A2 F3 RD262 1 2 39_0201_5%
5 DDRA_MB_DM4 DML_n/DBIL_n VSSQ_A2 DQSL_c DDR_B_MA7 UD1_DDR_B_UZQ
A8 RD267 1 2 39_0201_5%
VSSQ_A8 DDRA_MB_DM2
C9 5 DDRA_MB_DM2 E7 A2
VSSQ_C9 DML_n/DBIL_n VSSQ_A2 DDR_B_MA8
D2 A8 RD282 1 2 39_0201_5%
SB_CLK_DDR0 VSSQ_D2 VSSQ_A8 DDR_B_MA9
5,17 SB_CLK_DDR0 K7 D8 C9 RD277 1 2 39_0201_5%
SB_CLK_DDR#0 CK_t VSSQ_D8 VSSQ_C9 DDR_B_MA10
K8 E3 D2 RD250 1 2 39_0201_5%
5,17 SB_CLK_DDR#0 CK_c VSSQ_E3 SB_CLK_DDR0 VSSQ_D2 DDR_B_MA11 UD2_DDR_B_UZQ
E8 K7 D8 RD270 1 2 39_0201_5%
DDR_B_CKE0 VSSQ_E8 5,17 SB_CLK_DDR0 SB_CLK_DDR#0 CK_t VSSQ_D8 +1.2V
5,17 DDR_B_CKE0 K2 F1 5,17 SB_CLK_DDR#0 K8 E3
CKE VSSQ_F1 CK_c VSSQ_E3 DDR_B_MA12
H1 E8 RD256 1 2 39_0201_5%
DDR_B_CS0# VSSQ_H1 DDR_B_CKE0 VSSQ_E8 DDR_B_MA13
L7 H9 5,17 DDR_B_CKE0 K2 F1 RD252 1 2 39_0201_5%
5,17 DDR_B_CS0# CS_n VSSQ_H9 CKE VSSQ_F1 DDR_B_WE#

1
0.1U_0201_10V6-K
H1 RD253 1 2 39_0201_5%
DDR_B_ODT0 DDR_B_CS0# VSSQ_H1 DDR_B_CAS# UD3_DDR_B_UZQ
K3 B2 L7 H9 1 RD268 RD271 1 2 39_0201_5%
5,17 DDR_B_ODT0 ODT VSS_B2 5,17 DDR_B_CS0# CS_n VSSQ_H9 +VREF_CA_CHB
E1 CD357 1K_0402_1%
DDR_B_ACT_N VSS_E1 DDR_B_ODT0
5,17 DDR_B_ACT_N L3 G8 K3 B2
ACT_n VSS_G8 5,17 DDR_B_ODT0 ODT VSS_B2 DDR_B_RAS#
K1 E1 RD244 1 2 39_0201_5%
DRAM_DDR_B_BG1 DDR_B_ACT_N 15mil DDR_B_BG0

2
M9 VSS_K1 K9 L3 VSS_E1 G8 2 RD240 1 2 39_0201_5%
DDR_B_BG0 VSS_M9 VSS_K9 5,17 DDR_B_ACT_N ACT_n VSS_G8 DRAM_DDR_B_BG1 UD4_DDR_B_UZQ
M2 N1 K1 RD266 1 2 39_0201_5%
5,17 DDR_B_BG0 BG0 VSS_N1 DRAM_DDR_B_BG1 VSS_K1

2
T1 M9 K9 @

1000P_0201_50V7-K
DDR_B_BA1 DDR_B_BG0 DDR_B_BA0

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
N8 VSS_T1 M2 VSS_M9 VSS_K9 N1 RD246 RD264 1 2 39_0201_5%
5,17 DDR_B_BA1 DDR_B_BA0 BA1 5,17 DDR_B_BG0 BG0 VSS_N1 1 1 1 DDR_B_BA1
N2 T7 1 2 T1 1K_0402_1% RD281 1 2 39_0201_5%

CD522

CD524

CD412
5,17 DDR_B_BA0 BA0 NC DDR_B_BA1 VSS_T1

2 RD249 1

2 RD265 1

2 RD239 1

2 RD280 1
R405 0_0402_5% N8

240_0402_1%

240_0402_1%

240_0402_1%

240_0402_1%
DDR_B_RAS# 5,17 DDR_B_BA1 DDR_B_BA0 BA1 DDR_B_ACT_N

@
5,17 DDR_B_RAS# L8 @ N2 T7 1 2 RD251 1 2 39_0201_5%
DDR_B_CAS# 5,17 DDR_B_BA0 DDR_B_PARITY

1
M8 RAS_n BA0 NC R11114 0_0402_5% 2 2 2 RD260 1 2 39_0201_5%
5,17 DDR_B_CAS# DDR_B_WE# CAS_n DDR_B_RAS#
5,17 DDR_B_WE# L2 5,17 DDR_B_RAS# L8 @
WE_n/A14 DDR_B_CAS# RAS_n
5,17 DDR_B_CAS# M8
DDR_B_MA13 DDR_B_WE# CAS_n
T8 L2
5,17 DDR_B_MA13 DDR_B_MA12 A13 5,17 DDR_B_WE# WE_n/A14
M7 @
5,17 DDR_B_MA12 DDR_B_MA11 A12/BC_n DDR_B_MA13
5,17 DDR_B_MA11 T2 CD557 0.1U_0201_10V7-K 5,17 DDR_B_MA13 T8
DDR_B_MA10 A11 DDR4_B_DRAMRST#_R DDR_B_MA12 A13
5,17 DDR_B_MA10 M3 P1 1 2 5,17 DDR_B_MA12 M7 @
DDR_B_MA9 A10/AP RESET_n DDR_B_MA11 A12/BC_n
R7 T2 CD530 0.1U_0201_10V7-K
5,17
5,17
5,17
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
R2
R8
A9
A8 PAR
T3
DDR_B_PARITY

DDR_B_ALERT_N
DDR_B_PARITY 5,17
5,17
5,17
5,17
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
M3
R7
A11
A10/AP RESET_n
P1
DDR4_B_DRAMRST#_R

DDR_B_PARITY
1 2
RD249 RD265 RD239 RD280 will install dif f er ent
A7 A9
5,17
5,17
DDR_B_MA6
DDR_B_MA5
DDR_B_MA5
DDR_B_MA4
P2
P8 A6
A5
ALERT_n
P9
UD1_DDR_B_UZQ
DDR_B_ALERT_N 5,17 5,17
5,17
DDR_B_MA8
DDR_B_MA7
DDR_B_MA7
DDR_B_MA6
R2
R8 A8
A7
PAR
T3
DDR_B_ALERT_N
DDR_B_PARITY 5,17 value base on SDP or DDP.control by Virtual symbol
5,17 DDR_B_MA4 N3 E9 5,17 DDR_B_MA6 P2 P9
DDR_B_MA3 A4 VSS_E9 DDR_B_MA5 A6 ALERT_n DDR_B_ALERT_N 5,17
N7 P8
5,17 DDR_B_MA3 DDR_B_MA2 A3 UD1_DDR_B_LZQ 5,17 DDR_B_MA5 DDR_B_MA4 A5 UD2_DDR_B_UZQ +1.2V
R3 F9 N3 E9
5,17 DDR_B_MA2 DDR_B_MA1 A2 ZQ 5,17 DDR_B_MA4 DDR_B_MA3 A4 VSS_E9
5,17 DDR_B_MA1 P7 5,17 DDR_B_MA3 N7
DDR_B_MA0 A1 TEN_UD1_B DDR_B_MA2 A3 UD2_DDR_B_LZQ
1

C P3 N9 R3 F9 C
5,17 DDR_B_MA0 A0 TEN 5,17 DDR_B_MA2 DDR_B_MA1 A2 ZQ
RD255 P7
5,17 DDR_B_MA1 DDR_B_MA0 A1 TEN_UD2_B
Layout Note: Place near DRAM
1

1
P3 N9
5,17 DDR_B_MA0 A0 TEN
K4A8G165WB-BCPB_FBGA96 RD276 240_0402_1% RD286

1
10K_0402_5% 1 1 1 1 1 1 1 1 1 1 1 1 3A@1.2V
2

47P_0201_25V8-J

27P_0201_25V8-J

27P_0201_25V8-J

27P_0201_25V8-J

27P_0201_25V8-J

27P_0201_25V8-J

27P_0201_25V8-J

47P_0201_25V8-J

27P_0201_25V8-J

47P_0201_25V8-J

47P_0201_25V8-J

27P_0201_25V8-J
@ K4A8G165WB-BCPB_FBGA96 RD285 240_0402_1% CD540 CD553 CD554 CD549 CD555 CD556 CD552 CD538 CD551 CD541 CD539 CD550
+1.2V

EMC_NS@

EMC@

EMC@

EMC@

EMC@

EMC@

EMC_NS@

EMC@

EMC_NS@

EMC_NS@

EMC@
10K_0402_5%
2

2
@
2 2 2 2 @ 2 2 2 2 2 2 2 2
follow SCL 20pcs 0.22uf

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
1 1 1 1 1 1 1 1 1 1
CD486 CD496 CD476 CD472 CD489 CD474 CD485 CD493 CD482 CD497
1026 DYL@ For FVT BOM CD555 EMC@ change to CD@ @
2 @ 2 2 2 2 @ 2 2 2 2 2

1026 DYL@ For FVT BOM CD496 change to CD@ 1026 DYL@ For FVT BOM CD474 change to CD@
3A@1.2V
UD3
+2.5V +1.2V
DDR_B_D14
D7 B1 UD4
DDR_B_D12 DQU7 VPP_B1 +2.5V
D3 R9
DDR_B_D11 DQU6 VPP_R9 +VREF_CA_CHB DDR_B_D62
C8 D7 B1
DDR_B_D8 DQU5 DDR_B_D57 DQU7 VPP_B1 +1.2V +0.6VS +2.5V
C2 M1 D3 R9
1U_0402_6.3V6-K

DDR_B_D9 DQU4 VREFCA DDR_B_D58


0.1U_0201_6.3V6-K

DQU6 VPP_R9 +VREF_CA_CHB

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
C7 1 1 C8
DDR_B_D10 DQU3 +1.2V DDR_B_D61 DQU5
C3 B3 C2 M1
CD527

CD533

1 1 1 1 1 1 1 1 1 1
1000P_0201_50V7-K

DDR_B_D15 DDR_B_D63

1U_0402_6.3V6-K
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
B8 DQU2 VDD_B3 B9 C7 DQU4 VREFCA CD490 CD466 CD481 CD499 CD479 CD487 CD471 CD478 CD495 CD498
DDR_B_D13 DQU1 VDD_B9 1 1 DDR_B_D60 DQU3 +1.2V 1 1
A3 D1 C3 B3 @
CD418

CD519

CD520

CD113
1000P_0201_50V7-K
DDR_B_D59

0.1U_0201_6.3V6-K
DQU0 VDD_D1 G7 2 2 B8 DQU2 VDD_B3 B9 1 1

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
DDR_B_DQS1 VDD_G7 DDR_B_D56 DQU1 VDD_B9 2 2 2 2 2 2 2 2 2 2
B7 J1 A3 D1

CD400

CD526
DDR_B_DQS#1 DQSU_T VDD_J1 2 2 DQU0 VDD_D1 2 2 1 1 1 1 1 1 1 1
A7 J9 G7

C11216

C11215

C11217

C11218

CD505

CD508

CD532

CD531
DQSU_C VDD_J9 DDR_B_DQS7 VDD_G7
L1 B7 J1
DDRA_MB_DM1 VDD_L1 DDR_B_DQS#7 DQSU_T VDD_J1 2 2
E2 L9 A7 J9
5 DDRA_MB_DM1 DMU_n/DBIU_n VDD_L9 DQSU_C VDD_J9 2 2 2 2 2 2 2 2
R1 L1
VDD_R1 DDRA_MB_DM7 VDD_L1
T9 5 DDRA_MB_DM7 E2 L9
VDD_T9 DMU_n/DBIU_n VDD_L9 R1 +1.2V
DDR_B_D7 VDD_R1 +1.2V
J7 A1 T9
DDR_B_D0 DQL7 VDDQ_A1 VDD_T9
J3 A9
DDR_B_D6 DQL6 VDDQ_A9 DDR_B_D54
H8 C1 J7 A1
DDR_B_D1 DQL5 VDDQ_C1 DDR_B_D53 DQL7 VDDQ_A1
H2 D9 J3 A9
DDR_B_D3 DQL4 VDDQ_D9 DDR_B_D51 DQL6 VDDQ_A9

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
H7 F2 H8 C1
DDR_B_D5 DQL3 VDDQ_F2 DDR_B_D52 DQL5 VDDQ_C1
H3 F8 H2 D9 1 1 1 1
DDR_B_D2 DQL2 VDDQ_F8 DDR_B_D55 DQL4 VDDQ_D9
F7 G1 H7 F2 Confirm with Grug，
improve performance from 720S project. CD467 CD468 CD469 CD470 1 1
DDR_B_D4 DQL1 VDDQ_G1 DDR_B_D49 DQL3 VDDQ_F2
G2 G9 H3 F8
DQL0 VDDQ_G9 DDR_B_D50 DQL2 VDDQ_F8
J2 F7 G1 Others CAP follow 720S CD506 CD504
DDR_B_DQS0 VDDQ_J2 DDR_B_D48 DQL1 VDDQ_G1 2 2 2 2

@
G3 J8 G2 G9 22P_0402_50V8-J 22P_0402_50V8-J
DDR_B_DQS#0 DQSL_t VDDQ_J8 DQL0 VDDQ_G9 2 2
F3 J2
DQSL_c DDR_B_DQS6 VDDQ_J2
B G3 J8 RF_NS@ RF_NS@ B
DDRA_MB_DM0 DDR_B_DQS#6 DQSL_t VDDQ_J8
E7 A2 F3
5 DDRA_MB_DM0 DML_n/DBIL_n VSSQ_A2 DQSL_c
A8
VSSQ_A8 DDRA_MB_DM6
C9 5 DDRA_MB_DM6 E7 A2
VSSQ_C9 D2 DML_n/DBIL_n VSSQ_A2 A8
SB_CLK_DDR0 VSSQ_D2 VSSQ_A8
K7 D8 C9
5,17 SB_CLK_DDR0 SB_CLK_DDR#0 CK_t VSSQ_D8 VSSQ_C9 +0.6VS
K8 E3 D2
5,17 SB_CLK_DDR#0 CK_c VSSQ_E3 SB_CLK_DDR0 VSSQ_D2
E8 5,17 SB_CLK_DDR0 K7 D8
DDR_B_CKE0 VSSQ_E8 SB_CLK_DDR#0 CK_t VSSQ_D8
K2 F1 K8 E3
5,17 DDR_B_CKE0
DDR_B_CS0#
CKE VSSQ_F1 H1
5,17 SB_CLK_DDR#0
DDR_B_CKE0
CK_c VSSQ_E3 E8 follow SCL 10pcs 0.22uf
L7 VSSQ_H1 H9 K2 VSSQ_E8 F1
5,17 DDR_B_CS0# CS_n VSSQ_H9 5,17 DDR_B_CKE0 CKE VSSQ_F1

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
H1
DDR_B_ODT0 DDR_B_CS0# VSSQ_H1
K3 B2 L7 H9 1 1 1 @ 1 1 1 1 1 1 1
5,17 DDR_B_ODT0 ODT VSS_B2 5,17 DDR_B_CS0# CS_n VSSQ_H9
E1 CD492 CD488 CD465 CD473 CD477 CD480 CD500 CD475 CD491 CD494
DDR_B_ACT_N VSS_E1 DDR_B_ODT0
5,17 DDR_B_ACT_N L3 G8 K3 B2
ACT_n VSS_G8 5,17 DDR_B_ODT0 ODT VSS_B2
K1 E1
DRAM_DDR_B_BG1 VSS_K1 DDR_B_ACT_N VSS_E1 2 2 2 2 2 2 2
M9 K9
5,17 DDR_B_ACT_N
L3 G8 @ 2 2 2
DDR_B_BG0 VSS_M9 VSS_K9 ACT_n VSS_G8
5,17 DDR_B_BG0 M2 N1 K1
BG0 VSS_N1 DRAM_DDR_B_BG1 VSS_K1
T1 M9 K9
DDR_B_BA1 VSS_T1 DDR_B_BG0 VSS_M9 VSS_K9
5,17 DDR_B_BA1 N8 5,17 DDR_B_BG0 M2 N1
DDR_B_BA0 BA1 BG0 VSS_N1
N2 T7 1 2 T1
5,17 DDR_B_BA0 BA0 NC DDR_B_BA1 VSS_T1
R11046 0_0402_5% N8 1026 DYL@ For FVT BOM CD475 change to CD@
DDR_B_RAS# 5,17 DDR_B_BA1 DDR_B_BA0 BA1
5,17 DDR_B_RAS# L8 @ 5,17 DDR_B_BA0 N2 T7 1 2
DDR_B_CAS# RAS_n BA0 NC +0.6VS +0.6VS
5,17 DDR_B_CAS# M8 R515 0_0402_5%
DDR_B_WE# CAS_n DDR_B_RAS# +2.5V
5,17 DDR_B_WE# L2 5,17 DDR_B_RAS# L8 @
WE_n/A14 DDR_B_CAS# RAS_n
5,17 DDR_B_CAS# M8
DDR_B_MA13 DDR_B_WE# CAS_n
T8 L2
5,17 DDR_B_MA13 DDR_B_MA12 A13 5,17 DDR_B_WE# WE_n/A14
M7 @

180P_0402_50V8-J
5,17 DDR_B_MA12 DDR_B_MA11 A12/BC_n DDR_B_MA13

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
5,17 DDR_B_MA11 T2 CD562 0.1U_0201_10V7-K 5,17 DDR_B_MA13 T8 1 1
DDR_B_MA10 A11 DDR4_B_DRAMRST#_R DDR_B_MA12 A13
M3 P1 1 2 M7 @

C10163
5,17 DDR_B_MA10 DDR_B_MA9 A10/AP RESET_n 5,17 DDR_B_MA12 DDR_B_MA11 A12/BC_n 1 1 1 1
R7 T2 CD430 0.1U_0201_10V7-K CD483 CD484 CD507
5,17 DDR_B_MA9 DDR_B_MA8 A9 DDR_B_PARITY 5,17 DDR_B_MA11 DDR_B_MA10 A11 DDR4_B_DRAMRST#_R
R2 T3 M3 P1 1 2 C11220 C11219 22P_0402_50V8-J
5,17 DDR_B_MA8 DDR_B_MA7 A8 PAR DDR_B_PARITY 5,17 5,17 DDR_B_MA10 DDR_B_MA9 A10/AP RESET_n 2 2
22P_0402_50V8-J 22P_0402_50V8-J

@
5,17 DDR_B_MA7 R8 5,17 DDR_B_MA9 R7
DDR_B_MA6 A7 DDR_B_ALERT_N DDR_B_MA8 A9 DDR_B_PARITY 2 2 2 2
5,17 DDR_B_MA6 P2 P9 5,17 DDR_B_MA8 R2 T3 RF_NS@
DDR_B_MA5 A6 ALERT_n DDR_B_ALERT_N 5,17 DDR_B_MA7 A8 PAR DDR_B_PARITY 5,17
5,17 DDR_B_MA5 P8 5,17 DDR_B_MA7 R8 RF_NS@ RF_NS@
DDR_B_MA4 A5 UD3_DDR_B_UZQ DDR_B_MA6 A7 DDR_B_ALERT_N
N3 E9 P2 P9
5,17 DDR_B_MA4 DDR_B_MA3 A4 VSS_E9 5,17 DDR_B_MA6 DDR_B_MA5 A6 ALERT_n DDR_B_ALERT_N 5,17
N7 P8
5,17 DDR_B_MA3 DDR_B_MA2 A3 UD3_DDR_B_LZQ 5,17 DDR_B_MA5 DDR_B_MA4 A5 UD4_DDR_B_UZQ
5,17 DDR_B_MA2 R3 F9 5,17 DDR_B_MA4 N3 E9
DDR_B_MA1 A2 ZQ DDR_B_MA3 A4 VSS_E9
5,17 DDR_B_MA1 P7 5,17 DDR_B_MA3 N7
DDR_B_MA0 A1 TEN_UD3_B DDR_B_MA2 A3 UD4_DDR_B_LZQ
1

5,17 DDR_B_MA0 P3 N9 5,17 DDR_B_MA2 R3 F9


A0 TEN DDR_B_MA1 A2 ZQ
RD254 P7
5,17 DDR_B_MA1 DDR_B_MA0 A1 TEN_UD4_B
1

P3 N9
5,17 DDR_B_MA0 A0 TEN
K4A8G165WB-BCPB_FBGA96 RD272 240_0402_1% RD261
1

10K_0402_5%
2

@ K4A8G165WB-BCPB_FBGA96 RD242 240_0402_1%


10K_0402_5%
2

@ +1.2V +1.2V
2

1 1
CD563 CD564
A 180P_50V_J_NPO_0402 180P_50V_J_NPO_0402 A
2 2
EMC_NS@ EMC_NS@

DYL@ 0829 EMC advice reserve

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 DRAM CHANNEL-A


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date : Friday, March 01, 2019 Sheet 17 of 67
5 4 3 2 1
5 4 3 2 1

Grug:move to APU for FD


R41234 D5105 2 1 RB521CM-30T2R_VMN2M-2 PANEL_PWM
APU_ENVDD APU_ENVDD_EN 6 APU_PANEL_PWM
D5107 2 1 RB521CM-30T2R_VMN2M-2 1 @ 2 0_0402_5%
6 APU_ENVDD
R41235 LCD_SELF_TEST_ON D5106 2 1 RB521CM-30T2R_VMN2M-2
B+ VBL20 LCD_SELF_TEST_ON D5108 2 1 RB521CM-30T2R_VMN2M-2 1 @ 2 0_0402_5% 1

10K_0201_5%
C3100

R6688
0.1U_0402_25V6-K
2
@
F7

2
1 2

3A_32V_ERBRD3R00X 2 2
1 C9102 C9118
47P_0201_25V8-J 100P_0201_50V8-J
C724 RF@ RF@ TOUCH_EN_R
0.01U_25V_K_X5R_0201 1 1
2
D
RF D
2
C10158
EMC@
10P_0201_25V8-J
1
+3VL +3VL
LCDVDD Circuit +3VL

+3VALW +LCDVDD_CON EMC_NS@


PANEL_PWM C10050 2 1 1000P_0201_25V7-K

1
U238

100K_0201_5%
W= 60 mil 5 1
W= 60 mil

R8954
IN OUT
1 1 1
2 C9555 CD@?? RF_CD@ RF@
GND C9103 C9119 JHLSR1

2
APU_ENVDD_EN 4 3 4.7U_0603_6.3V6-K 47P_0201_25V8-J 100P_0201_50V8-J 1
EN OCB 2 2 2 2 1
44 LID_SW# 2
SY6288C20AAC_SOT23-5 3
3
1

1 4
R11002 1026@ DYL follow T490 RF@ change to RF_CD@ 4

2200P_0201_25V7-K
C9556 5
1U_6.3V_M_X5R_0201 100K_0402_5% GND1 6
2 2 GND2

C5212
CD@??
2

HIGHS_FC1AF041-2201H
1 @

TOUCH_EN VCC3LCD +LCDVDD_CON


1

R11175

@ 100K_0402_5% @
R41117 1 2 0_0805_5%
2

0.9A
for touch panel
F3
+3VS 1 2 Grug:need confirm with DC this power timing
For IR_LED
3A_32V_ERBRD3R00X
2 0.5A_32V_ERBRD0R50X

C C
2 C311 +3VS +3VALW +3VS
1 0.1U_0201_6.3V6-K
1 RF@ RF@
C315 1 C9101 1 C9117
1U_6.3V_K_X5R_0201 47P_0201_25V8-J 100P_0201_50V8-J DYL@ 1017 F24 follow T490 SIT SCH from 1A to 2A
1 C308 Camera current change
100K_0201_5%

2 2 0.01U_0201_6.3V7-K
2 2 F24

2
F16 F26

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
2A_32V_ERBRD2R00X
2 2

0.5A_32V_ERBRD0R50X
0.5A_32V_ERBRD0R50X
VBL20
1

1.2A

1
1 1

C2578

C2579
JCAM1
1
F63
2

1 1 1 30 41
29 30 GND11 40
29 GND10
R38

C307 C310 C313 28 39


+3VS_LCD 0.01U_25V_K_X5R_0201 0.1U_25V_K_X5R_0402 1U_0603_25V6-K 27 28 GND9 38
2 2 2 26 27 GND8 37
25 26 GND7 36
D743 @ 1 2 RB521CM-30T2R_VMN2M-2 LOGO_LED# R102 1 2 3.9K_0402_1% 24 25 GND6 35
8 TOUCH_EN 1 1 44 LOGO_LED# +3VALW_CAM 24 GND5
RF@ RF@ 23 34
DYL@ 0918
SCS00007L00 to SCS00006V00
For sort out material 2
C10121 C10120
47P_25V_J_NPO_0201
33P_25V_J_NPO_0201_MURATA
2
LCD CONNECTOR JLCD1 @
+3VS_CAM2
22
21
20
23
22
21
GND4
GND3
GND2
33
32
31
40 52 19 20 GND1
39 40 GND12 51 18 19
38 39 GND11 50 17 18
DYL@ 0918 37 38 GND10 49 16 17
SCS00007L00 to SCS00006V00 36 37 GND9 48 15 16
For sort out material 35 36 GND8 47 14 15
LID_SW# D742 1 2 RB521CM-30T2R_VMN2M-2 TOUCH_EN_R 34 35 GND7 46 13 14
PANEL_PWM 33 34 GND6 45 12 13
BKOFF# 32 33 GND5 44 +3VS_CAM1 11 12
44 BKOFF# 32 GND4 USBP4+_CONN 11
31 43 CAM_DT@ 2 R42463 1 1/20W_0_5%_0201 10
31 GND3 7,8 IR_CAM_DTCT# USBP4-_CONN 10
30 42 9
USBP9-_CONN 29 30 GND2 41 @ 8 9
USBP9+_CONN 28 29 GND1 IR_FW_FLASH_EN R42462 1 2 0_0201_5% 7 8
APU_EDP_HPD 28 44 IR_FW_FLASH_EN INT_MIC_DTCT# 7
27 6
6 APU_EDP_HPD 27 7 INT_MIC_DTCT# MIC_DATA 6
26 EMC@ 1 R513 2 33_0402_5% 5
26 38 MIC_DATA MIC_CLK 5
R42291 1 @ 2 0_0402_5% 25 EMC@ 1 R514 2 0_0402_5% 4
8 SIZE_CTL LCD_SELF_TEST_ON 25 38 MIC_CLK 4
B 24 3 B
44 LCD_SELF_TEST_ON 24 IR_FW_FLASH_EN 3
23 R42461 2 @ 1 1/20W_0_5%_0201 2
22 23 1 2
22 1

1
21 DYL@ 1017 R514 follow T490 SIT SCH from 33 to 0
20 21 R42461 R42462 follow T490 SIT SCH EMC@
20 1 I-PEX_20654-030E-01
19 EMC_NS@ R42489
18 19 C33 10_0201_5% @
EPRIVACY_ON 17 18 0.1U_25V_K_X5R_0201
8 EPRIVACY_ON

2
17 2

33P_25V_J_NPO_0201_MURATA
16 1 1
C8289 1 2 0.1U_0201_6.3V6-K EDP_AUXN_CONN 15 16 EMC@
6 EDP_AUXN EDP_AUXP_CONN 15
C8290 1 2 0.1U_0201_6.3V6-K 14 EMC@ C817 DYL@ SVT 190307 R42489
6 EDP_AUXP 14 For EMC test issue --- Kevin.P&Andy.H,
13 C815 33P_25V_J_NPO_0201_MURATA
C8299 1 2 0.1U_0201_6.3V6-K EDP_TXP0_CONN 12 13 2 2 Change to 10Ω from 0Ω
6 EDP_TXP0 C815
C8298 1 2 0.1U_0201_6.3V6-K EDP_TXN0_CONN 11 12 For EMC test issue --- Kevin.P&Andy.H,
6 EDP_TXN0 11 Change to stuff from unstuff
10
C8296 1 2 0.1U_0201_6.3V6-K EDP_TXP1_CONN 9 10
6 EDP_TXP1 EDP_TXN1_CONN 9
C8295 1 2 0.1U_0201_6.3V6-K 8
6 EDP_TXN1 8
7
C9507 @1 2 0.1U_0201_6.3V6-K EDP_TXP2_CONN 6 7
6 EDP_TXP2 EDP_TXN2_CONN 6
C9506 @1 2 0.1U_0201_6.3V6-K 5 Power LED Board +3VALW
6 EDP_TXN2 5
4
C9504 @1 2 0.1U_0201_6.3V6-K EDP_TXP3_CONN 3 4
6 EDP_TXP3 EDP_TXN3_CONN 3
C9505 @1 2 0.1U_0201_6.3V6-K 2 R9119 1 @ 2 0_0402_5%
6 EDP_TXN3 2

1
VCC3LCD 1 F31
No need SMT? 1 0.5A_32V_ERBRD0R50X
APU_EDP_HPD L15 EMC_NS@
I-PEX_20654-040E-01 USBP4- 4 3 USBP4-_CONN
PANEL_PWM 19 USBP4- 4 3
1

R668
10K_0402_5%

2
USBP4+ 1 2 USBP4+_CONN
19 USBP4+ 1 2 JPWR1
EMC@

EMC@

DYL@ 1017 R13 follow T490 SIT SCH from 680Ω to 330Ω
R2078 1 @ 2 0_0402_5% EXC24CH900U_4P DYL@ 1217 R13 follow T490 SVT&Kevin advice SCH from 330Ω to 240Ω +3VALW_PWRB 1
2

LEDPWR# R13 1 2 1/16W_330_+-1%_0402 LEDPWR#_R 2 1


44 LEDPWR# 2
R9120 1 @ 2 0_0402_5% PWRSWITCH# 3
25,44 PWRSWITCH# 3
BKOFF# 4
LID_SW# 4
C9472

C2610

L75 EMC_NS@
USBP9-_CONN USBP9- 19 USBP4-_CONN USBP4+_CONN
EMC@

4 3 USBP9- 5
4 3 GND1
1

3
R42253 6
10K_0402_5% J5 1 2 @ GND2
1 1 1 USBP9+_CONN
1000P_0201_25V7-K

1 1 2 USBP9+ USBP9+ 19 EMC@ HIGHS_FC1AF041-2201H


1 2
C9473

EMC@ D91 D92 SHORT PADS D93 @


1

C9127 EXC24CH900U_4P AZ5125-02S.R7G_SOT23-3


2

2 2 2 USBP9-_CONN
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

10P_0201_25V8-J
1

@ 2
1000P_0201_25V7-K

1000P_0201_25V7-K

USBP9+_CONN R2079 1 @ 2 0_0402_5%


A A

1
EMC@

EMC@

D311 D312
1

1
PESD5V0H1BSF_SOD962-2

2
1

PESD5V0H1BSF_SOD962-2

DYL@0712 EMC require follow T490


2

Please near JCAM1


EMC_CD@

EMC_CD@
2

2
2

Security Classification LC Future Center Secret Data Title


Please near JLCD1
Change of the control method of E-PRIVACY LCD is supported. Issued Date 2015/11/02 Deciphered Date 2012/06/21 LCD/LID/MIC/CAMERA/PWR SW
1026@ DYL follow T490 EMC@ change to EMC_CD@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Thursday, March 07, 2019 Sheet 18 of 67
5 4 3 2 1
5 4 3 2 1

+3VS_HUB1 +3VS_HUB1

+3VS +3VS_HUB1
USB Hub1 RH2 1
@
2 0_5%_0603 +3VS_HUB1
UH1
1 1
HUB1_PSELF
+3VS_HUB1

CH22 CH2 RH9 1 2 10K_0402_5%


USB_HUB1_DN 1 28 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402
USB_HUB1_DP 2 DM0 V33 27 2 2
+3VS_HUB1 USBP4- 3 DP0 V5 26 SDA_HUB1 1 TP955 @ HUB1_PGANG RH11 1 2 100K_0402_5%
USBP4+ 4 DM1 PWREN1#/SDA 25 HUB1_OVCUR1#
DP1
GL852G OVCUR1#/SMC HUB1_OVCUR2#
5 24
USBP2- 6 AVDD QFN28 OVCUR2#/SMD 23 HUB1_PGANG DYL@ 0918
9 USB_HUB1_DP +3VS_HUB1 7 DM2 PGANG 22 HUB1_PSELF RP113 for FVT costdown
USBP2+ RP113
D 9 USB_HUB1_DN HUB1_RREF 8 DP2 PSELF 21 D
1/16W_10K_5%_4P2R_0404
9 RREF DVDD 20 HUB1_OVCUR3# 1 4
GL852G1_X1 10 AVDD1 OVCUR3# 19 HUB1_OVCUR4# 2 3
USBP4+ 18 1 1 GL852G1_X2 X1 OVCUR4# +3VS_HUB1
11 18 RH37 1 @ 2 0_0201_5%
USBP4- 18 Camera CH3 CH4 USBP9- 12 X2 TEST/SCL 17 HUB1_RESET# RH7 1 @ 2 0_0201_5% PLT_RST#
0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201 USBP9+ 13 DM3 RESET# 16 USBP8+ RH36 1 @ 2 0_0201_5%
USBP2+ 48 2 2 +3VS_HUB1 DP3 DP4 APU_HUB1_RESET# 8
14 15 USBP8-
USBP2- 48 Smart Cart AVDD2 DM4
29 +3VS_HUB1
USBP9+ 18 PAD
USBP9- 18 Touch Panel
HUB1_RREF
USBP8+ 48 GL852G-OHY50_QFN28_5X5
DYL@ 0918
USBP8- 48 Fingerprint

4
3
RH19 RP118 for FVT costdown
RP118
PORT1 IR Camera 680_0402_1% 1/16W_4.7K_5%_4P2R_0404

QH1
PORT2 M.2 WLAN BT

1
2
L2N7002KWT1G_SOT323-3
APU_SMB_CK0 3 1 HUB1_OVCUR1#
PORT3 Touch Panel

D
A. Vth = 2.5V (MAX)
B. Id = 295 mA (MAX)
PORT4 2D Camera C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 3.3V

G
YH1 +3VS_HUB1 +3VS

2
12MHZ_10PF_8Z12000006

4
GL852G1_X1 1 3RH15 1 @ 2 0_0201_5% GL852G1_X2

1
1 1
CH5 RH8 RH18

2
CH6
20PC_50VC_JC_NPOC_0402 20PC_50VC_JC_NPOC_0402 10K_0402_5% 10K_0402_5%
2 2

2
CH23 1 2 0.1U_16V_K_X5R_0201

1
D
HUB1_RESET# 2
G QH4
L2N7002KWT1G_SOT323-3
C S A. Vth = 2.5V (MAX) C
1

3
CH8 B. Id = 340 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 3.3V

2
1U_0201_6.3V6-K

G
2

APU_SMB_DA0 3 1 HUB1_OVCUR2#

D
A. Vth = 2.5V (MAX)
L2N7002KWT1G_SOT323-3 B. Id = 295 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
QH2 D. Vth in schematic = 3.3V

USB Hub2
+3VS +3VS_HUB2
HUB2@ UH2 HUB2@ +3VS_HUB2 +3VS_HUB2 +3VS_HUB2
RH22 1 2 0_0603_5% +3VS_HUB2 HUB2@
RH107 HUB2_PSELF RH31 1 2 10K_0402_5%
USB_HUB2_DN 10_0201_5%2 HUB2@ USB_HUB2_DN_R 1 28
USB_HUB2_DP 1 2 USB_HUB2_DP_R 2 DM0 V33 27 TP953 HUB2@
USBP6-_HUB2 DP0 V5 SDA_HUB2 1 1 HUB2_PGANG RH33
0_0201_5% 0_0201_5% +3VS_HUB2 0_0201_5% HUB2@ 3 26 1 @ 1 2 100K_0402_5%
RH101 RH103 RH108 USBP6+_HUB2 4 DM1 PWREN1#/SDA 25 HUB2_OVCUR1# CH7 CH24
DP1
GL852G OVCUR1#/SMC
1HUB2_NS@2USB_DP_R 1HUB2_NS@2 5 24 HUB2_OVCUR2# 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402
9 USB_HUB2_DP 1 2USB_DN_R 1 2 USBP6+ 19,35 6 AVDD OVCUR2#/SMD 23 HUB2_PGANG 2 2
QFN28 HUB2@ HUB2@
9 USB_HUB2_DN
HUB2_NS@ HUB2_NS@
USBP6- M.2 WLAN BT
19,35 7 DM2 PGANG 22 HUB2_PSELF
RH102 RH104 +3VS_HUB2 HUB2_RREF 8 DP2 PSELF 21 HUB2@
0_0201_5% 0_0201_5% 9 RREF DVDD 20 HUB2_OVCUR3# RP114 1 4 1/16W_10K_5%_4P2R_0404
GL852G2_X1 AVDD1 OVCUR3# HUB2_OVCUR4# +3VS_HUB2
1 0.1U_16V_K_X5R_0201 1 0.1U_16V_K_X5R_0201 10 19 2 3
GL852G2_X2 11 X1 OVCUR4# 18 RH39 1 @ 2 0_0201_5% DYL@ 0918
USBP5+ 36 CH9 CH10 12 X2 TEST/SCL 17 HUB2_RESET# RP114 for FVT costdown
USBP5- RH28 1 @ 2 0_0201_5%
USBP5- 36 M.2 WWAN HUB2@ HUB2@ USBP5+ 13 DM3 RESET# 16 RH38 1 @ 2 0_0201_5%
PLT_RST# 7,29,31,32,35,36,37,51
2 2 +3VS_HUB2 DP3 DP4 APU_HUB2_RESET# 8
14 15
AVDD2 DM4
B +3VS_HUB2 B
29 @
0_0201_5% PAD HUB2_OVCUR3# RH41 1 2 10K_0402_5%
RH105
1HUB2@ 2 USBP6+_HUB2 HUB2_RREF @
19,35 USBP6+ USBP6-_HUB2 GL852G-OHY50_QFN28_5X5 HUB2_OVCUR4#
1 2 RH42 1 2 10K_0402_5%
19,35 USBP6-
1

HUB2@ RH32

4
3
RH106 HUB2@ HUB2@
0_0201_5% 680_0402_1% RP119
1/16W_4.7K_5%_4P2R_0404
DYL@ 0918
2

QH6 HUB2@ RP119 for FVT costdown

1
2
PORT1 Finger print L2N7002KWT1G_SOT323-3
3 1 HUB2_OVCUR1#

D
7,12,16 APU_SMB_CK0
A. Vth = 2.5V (MAX)
B. Id = 295 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
PORT3 M.2 WWAN D. Vth in schematic = 3.3V
+3VS_HUB2 +3VS

G
PORT4 smart card

2
1

1
4

HUB2@ RH30 RH29


GL852G2_X1 1 3 RH23 1 @ 2 0_0201_5% GL852G2_X2 HUB2@ HUB2@
1 1 10K_0402_5% 10K_0402_5%
HUB2@ YH2 HUB2@ HUB2@
2

2
CH11 CH12 CH1 1 2 0.1U_16V_K_X5R_0201
20PC_50VC_JC_NPOC_0402
12MHZ_10PF_8Z12000006 20PC_50VC_JC_NPOC_0402

1
2 2 D HUB2@
HUB2_RESET# 2 QH3
G L2N7002KWT1G_SOT323-3

1 S A. Vth = 2.5V (MAX)

3
CH21 B. Id = 340 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
HUB2@ D. Vth in schematic = 3.3V

2
1U_0201_6.3V6-K

G
2

A 3 1 HUB2_OVCUR2# A
7,12,16 APU_SMB_DA0

D
A. Vth = 2.5V (MAX)
L2N7002KWT1G_SOT323-3B. Id = 295 mA (MAX)
QH5 HUB2@ C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 3.3V

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date USB HUB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 19 of 67
5 4 3 2 1
5 4 3 2 1

+3VS
+1.2V_RE

C10117 2 2 1
1 1 1 1

0.01U_25V_K_X5R_0201
@ C10078
C10115 0.01U_25V_K_X5R_0201
1
0.01U_25V_K_X5R_0201 1 2
2 2 2 2

@
C10116 C10114 C10076 C10077
0.01U_25V_K_X5R_0201 0.01U_25V_K_X5R_0201 0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201

1026 DYL@ For FVT BOM C10076 change to CD@


D D

+1.2V_RE

+3VS +1.2V_RE
1 1 1 1 1 1 1
@ @ @
C2546 C2576 C2543 C2545 C10074 C2544 C10075
0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201 4.7U_0402_6.3V6-M
2 2 2 2 2 2 2

HDMI Re-timer U147

24

15
18

43
46

30

11
1

6
VDD33_1
VDD33_2

VDDTX12_1
VDDTX12_2

VDDRX12_1
VDDRX12_2

VDD12_1
VDD12_2

VDDA12
+1.2V_RE

DCIN_EN 3 37
DCIN_ENB POWERSWITCH
C2522 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX0+_C 44 17 HDMI_TX0+_C
6 APU_HDMI_TX0+ 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX0-_C 45 IN_D0p OUT_D0p 16 HDMI_TX0-_C HDMI_TX0+_C 21
C2523 2 1
6 APU_HDMI_TX0- IN_D0n OUT_D0n HDMI_TX0-_C 21 0.1U_16V_K_X5R_0201
C2524 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX1+_C 41 20 HDMI_TX1+_C C11187 C11188
6 APU_HDMI_TX1+ 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX1-_C 42 IN_D1p OUT_D1p 19 HDMI_TX1-_C HDMI_TX1+_C 21 @ 0.01U_25V_K_X5R_0201
C2525
6 APU_HDMI_TX1- IN_D1n OUT_D1n HDMI_TX1-_C 21 1 2
C2526 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX2+_C 38 23 HDMI_TX2+_C
6 APU_HDMI_TX2+ 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX2-_C 39 IN_D2p OUT_D2p 22 HDMI_TX2-_C HDMI_TX2+_C 21
C2527
6 APU_HDMI_TX2- IN_D2n OUT_D2n HDMI_TX2-_C 21
C2528 1 2 0.1U_0201_6.3V6-K APU_HDMI_CLK+_C 47 14 HDMI_CLK+_C
6 APU_HDMI_CLK+ 1 2 0.1U_0201_6.3V6-K APU_HDMI_CLK-_C 48 IN_CLKp OUT_CLKp 13 HDMI_CLK-_C HDMI_CLK+_C 21
C2529
6 APU_HDMI_CLK- IN_CLKn OUT_CLKn HDMI_CLK-_C 21
C
HDMI_RST 35 12 C
RESETB CEC_EN
4 9
PDB HDMI_CEC
2 7 HDMI_SNK_SCL_R R11160 1 @ 2 0_0402_5%
TESTMODEB SCL_SNK HDMI_SNK_SCL 21
HDMI_REDRIVER_EQ 5 8 HDMI_SNK_SDA_R R11161 1 @ 2 0_0402_5%
EQ SDA_SNK HDMI_SNK_SDA 21
R11073 1 2 4.99K_0402_1% 36 29 HDMI_SCL R11166 1 @ 2 0_0402_5% +1.2V_RE
REXT CSCL EC_SMB_CK4 44,45,50
R11074 1 2 10K_0402_5% 27 28 HDMI_SDA R11167 1 @ 2 0_0402_5%
PRE CSDA EC_SMB_DA4 44,45,50

1
R11157 1 @ 2 0_0402_5% APU_DDC_CLK_R 34 40 HDMI_HPD_R R11159 2 @ 1 0_0402_5%
6 APU_DDC_CLK SCL_SRC/AUXP HPD_SRC APU_HDMI_HPD 6
R41224
R11158 1 @ 2 0_0402_5% APU_DDC_DATA_R 33 10 1/10W_470_5%_0603
6 APU_DDC_DATA SDA_SRC/AUXN RSV1
HDMI_DET 21 26
21,44 HDMI_DET

2
HPD_SNK RSV2
@
R11075 1 2 10K_0402_5% 31 25
+3VS I2C_ADDR NC

1
D
@
R11076 1 2 10K_0402_5% 32 49 SUSP 2
+3VS HDMI_ID EPAD G Q6446
L2N7002KWT1G_SOT323-3
S

3
PS8409AQFN48GTR2-A2_QFN48_6X6
+3VS +1.2V +1.2V_R
2

R11077
10K_0402_5% @
R11037 1 2 0_0603_5% +1.2_RE discharge 7/25
+3VS
1

HDMI_RST @
+3VS R11176 1 2 0_5%_0603
1
+1.2V_RE
C10119 +1.2V +1.2V_R L70
+/- 1.5%
1

1U_6.3V_M_X5R_0201 Q632

4.7K_0201_5%

4.7K_0201_5%
BLM18PG181SN1D_2P

1
B 2 AON6414AL_DFN8-5 B

10K_0402_5%

10K_0402_5%
R11024 R11025 @
47K_0402_5% 47K_0402_5% 1 2
1 1 1
1 2
2

5 3 C10157 C10154
1

2
DCIN_EN @ @ 10U_6.3V_M_X5R_0402
C10156
HDMI_REDRIVER_EQ 10U_6.3V_M_X5R_0402 2 2 1U_6.3V_K_X5R_0201
2 1 1
R11078

R11079

R11168

R11169
C10152

4
@
@ C10155 @
0.1U_0201_6.3V6-K 0.01U_0201_25V6-K
2 2
APU_DDC_CLK @ @ @ @ B+
1

APU_DDC_DATA R11117
R11030 R11029 R11116 1 @ 2 0_0402_5% 1 2
47K_0402_5% 47K_0402_5% HDMI_SCL
1/16W_510K_5%_0402

1
HDMI_SDA D
1
2

C10153 R11118 2 SUSP


@ SUSP 52
1M_0402_5% G
0.01U_0201_25V6-K
2 S

3
Q631
+3VS L2N7002KWT1G_SOT323-3
5
G

Q1B
R11236
HDMI_HPD_R 1 2 100K_0402_5% APU_DDC_CLK 4 3 HDMI_SNK_SCL
S

2N7002KDW H_SOT363-6
2
G

@
Q1A

A A
APU_DDC_DATA 1 6 HDMI_SNK_SDA
S

2N7002KDW H_SOT363-6
@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 HDMI RETIMER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 20 of 67
5 4 3 2 1
5 4 3 2 1

D +5VS_HDMI D

No need diode here because TPS2553 has


reverse voltage protection function.

2
1
RP8
2.2K_0404_4P2R_5%
+5VS_HDMI

3
4
2
@ @
+5VS JHDMI1
R10193
HDMI_TX2+_CON 1 2
0_1%_0603_LE
HDMI_TX2-_CON 3 TMDS_Data2+ TMDS_Data2_Shield 4 HDMI_TX1+_CON
5 TMDS_Data2- TMDS_Data1+ 6 HDMI_TX1-_CON

1
HDMI_TX0+_CON 7 TMDS_Data1 shield TMDS_Data1- 8
U110 HDMI_TX0-_CON 9 TMDS_Data0+ TMDS_Data0 shield 10 HDMI_CLK+_CON
6 1 +5VS_HDMI_R 11 TMDS_Data0- TMDS_CLOCK+ 12 HDMI_CLK-_CON
IN OUT 13 TMDS_CLOCK shield TMDS_CLOCK- 14
2 15 CEC RESERVED 16
ILIM 20 HDMI_SNK_SCL SCL SDA HDMI_SNK_SDA 20
3 17 18
FAULT DDC/CEC GND +5V

2
HDMI_DET

680P_25V_K_X7R_0201
EMC_NS@
4 5 2 19
EN GND 20,44 HDMI_DET HPD

680P_25V_K_X7R_0201
EMC_NS@
2 R1119 C994 20
C1426 7 61.9K_0201_1% 4.7U_0402_6.3V6-M 21 GND1
0.1U_0201_6.3V6-K GND_PAD 22 GND2
1 GND3 2 2
TPS2553DRVR_SON6_2X2 2 23 C2731

1
1 GND4 1000P_0201_25V7-K
EMC@
ALLTO_C128AU-K1935-L 1 1

C5406
1

C5402
C C

R10921 2 @ 1 0_0402_5%

R10917 2 @ 1 0_0402_5%
EMC@
EMC@
EXC24CH500U_4P
EXC24CH500U_4P HDMI_TX1-_C 4 3 HDMI_TX1-_CON
HDMI_CLK-_C HDMI_CLK-_CON 20 HDMI_TX1-_C 4 3
1 4 3
20 HDMI_CLK-_C 4 3
C10118 HDMI_TX1+_C 1 2 HDMI_TX1+_CON
HDMI_CLK+_C 3.3P_25V_C_COG_0201 HDMI_CLK+_CON 20 HDMI_TX1+_C 1 2
1 2
20 HDMI_CLK+_C 2 1 2 L63
@ L64
R10919 2 @ 1 0_0402_5%
R10915 2 @ 1 0_0402_5%

R10916 2 @ 1 0_0402_5%

R10918 2 @ 1 0_0402_5%
EMC@
EXC24CH500U_4P
EMC@ HDMI_TX2-_C HDMI_TX2-_CON
4 3
EXC24CH500U_4P 20 HDMI_TX2-_C 4 3
HDMI_TX0-_C 4 3 HDMI_TX0-_CON
20 HDMI_TX0-_C 4 3 HDMI_TX2+_C HDMI_TX2+_CON
1 2
20 HDMI_TX2+_C 1 2
B B
HDMI_TX0+_C 1 2 HDMI_TX0+_CON L65
20 HDMI_TX0+_C 1 2
L62
R10920 2 @ 1 0_0402_5%
R10914 2 @ 1 0_0402_5%

D4039 D4037 D4079


HDMI_CLK-_CON 1 1 10 9 HDMI_CLK-_CON HDMI_TX1-_CON 1 1 10 9 HDMI_TX1-_CON HDMI_SNK_SDA 1 1 10 9 HDMI_SNK_SDA

HDMI_CLK+_CON 2 2 9 8 HDMI_CLK+_CON HDMI_TX1+_CON 2 2 9 8 HDMI_TX1+_CON HDMI_SNK_SCL 2 2 9 8 HDMI_SNK_SCL

HDMI_TX0-_CON 4 4 7 7 HDMI_TX0-_CON HDMI_TX2-_CON 4 4 7 7 HDMI_TX2-_CON HDMI_DET 4 4 7 7 HDMI_DET

HDMI_TX0+_CON 5 5 6 6 HDMI_TX0+_CON HDMI_TX2+_CON 5 5 6 6 HDMI_TX2+_CON +5VS_HDMI 5 5 6 6 +5VS_HDMI

3 3 3 3 3 3

8 8 8

AZ1045-04F_DFN2510P10E-10-9 AZ1045-04F_DFN2510P10E-10-9 AZ1045-04F_DFN2510P10E-10-9


EMC@ EMC@ EMC@

EMC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2013/08/05 HDMI CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 21 of 67
5 4 3 2 1
5 4 3 2 1

+3V_REDP +3V_REDP +3V_REDP

1
R11283 R11281 R1006

1K_0402_5% 1K_0402_5% 1K_0402_5%

2
PD_GPIO0 @ PD_GPIO5 @ PD_GPIO1 @

1
D D
R11284 R11282 R11001
100K_0402_5% 100K_0402_5% 100K_0402_5%

2
@ @ @

L = DisplayPort Disabled.
+3VALW +3V_REDP H = DisplayPort Enabled.
@ 1026 DYL@ For FVT BOM C51 change to CD@
When I2C_EN = 0, this pin is not used by device.

10U_6.3V_M_X5R_0603_YAGEO
1 2 @

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201
R881 0_5%_0603 1 1 1 1 1
C47 C50 C51 C10032 C10033
2 2 2 2 2

20

28
1

6
U18

VCC_1

VCC_2

VCC_3

VCC_4
USB30_C_RX3BP C60 1 2 0.33U_0402_10V6-K USB30_C_RX3BP_R 9 40 USBC_SS+_RX3BP_R
9 USB30_C_RX3BP USB30_C_RX3BN USB30_C_RX3BN_R URX2P DRX2P USBC_SS+_RX3BN_R USBC_SS+_RX3BP_R 26
C62 1 2 0.33U_0402_10V6-K 10 39
9 USB30_C_RX3BN USB30_C_TX3BP USB30_C_TX3BP_R URX2N DRX2N USBC_SS+_TX3BP_R USBC_SS+_RX3BN_R 26
9 USB30_C_TX3BP
C59 1 2 0.22U_0402_10V6-K 12 37
+3V_REDP USB30_C_TX3BN C61 1 2 0.22U_0402_10V6-K USB30_C_TX3BN_R 13 UTX2P DTX2P 36 USBC_SS+_TX3BN_R USBC_SS+_TX3BP_R 26 +3V_REDP
9 USB30_C_TX3BN UTX2N DTX2N USBC_SS+_TX3BN_R 26 +3V_REDP
DP3_AUXP C67 1 2 0.1U_0402_10V7-K DP3_AUXP_R 24 8 TUSB_DIR0
Check
6 DP3_AUXP AUXP DIR0
R85 1 2 100K_0402_5% DP3_AUXN_R DP3_AUXN C69 1 2 0.1U_0402_10V7-K DP3_AUXN_R 25 11 TUSB_DIR1
6 DP3_AUXN AUXN DIR1

1
TUSB_SWAP 5 27 DP3_SBU1_R R95 1 @ 2 0_0402_5% DP3_SBU1
SWAP SBU1 DP3_SBU1 26

1
TUSB_SLP 7 26 DP3_SBU2_R R94 1 @ 2 0_0402_5% DP3_SBU2
R1000
C 1 2 100K_0402_5% DP3_AUXP_R SLP_S0# SBU2 DP3_SBU2 26 C
R87 R998 @ 1K_0402_5%
USB30_C_TX3AP C64 1 2 0.22U_0402_10V6-K USB30_C_TX3AP_R 16 33 USBC_SS+_TX3AP_R @ 1K_0402_5%
9 USB30_C_TX3AP USB30_C_TX3AN C63 1 2 0.22U_0402_10V6-K USB30_C_TX3AN_R 15 UTX1P DTX1P 34 USBC_SS+_TX3AN_R USBC_SS+_TX3AP_R 26

2
9 USB30_C_TX3AN USB30_C_RX3AP C66 1 2 0.33U_0402_10V6-K USB30_C_RX3AP_R 19 UTX1N DTX1N 30 USBC_SS+_RX3AP_R USBC_SS+_TX3AN_R 26
9 USB30_C_RX3AP USBC_SS+_RX3AP_R 26

2
USB30_C_RX3AN C65 1 2 0.33U_0402_10V6-K USB30_C_RX3AN_R 18 URX1P DRX1P 31 USBC_SS+_RX3AN_R TUSB_DIR1
9 USB30_C_RX3AN URX1N DRX1N USBC_SS+_RX3AN_R 26 TUSB_DIR0
TUSB_I2CEN 17 21 PD_GPIO0_RE R97 1 @ 2 0_0402_5%
I2C_EN FLIP/SCL PD_GPIO0 24

1
TUSB_UEQ0/A0 35 22 PD_GPIO5_RE R96 1 @ 2 0_0402_5%
UEQ0/A0 CTL0/SDA PD_GPIO5 24

1
TUSB_UEQ1/A1 2 23 PD_GPIO1_RE R11280 1 @ 2 0_0402_5% R999
UEQ1/A1 CTL1 PD_GPIO1 24
32 DP3_HPD DP3_HPD 6,24 R997 100K_0402_5%
+3V_REDP TUSB_DEQ0 38 HPDIN
TUSB_DEQ1 DEQ0 100K_0402_5%
+3V_REDP +3V_REDP 29 14 TUSB_SEL

2
DEQ1 VIO_SEL

2
TUSB_CFG0 3
TUSB_CFG1 4 CFG0 41 @
CFG1 GND
1
R411281 2 0_0402_5% EC_I2C2_SCL_RE
EC_I2C2_SCL_RE 23
1

R93
R99 R100 1K_0402_5% @
@ 1K_0402_5% @ 1K_0402_5% I2C_EN=0 GPIO MODE TUSB1044RNQ_QFN40_4X6 R411291 2 0_0402_5% EC_I2C2_SDA_RE +3VALW
I2C_EN=1 I2C enable EC_I2C2_SDA_RE 23
2
2

@
R11307 1 2 0_0402_5%
TUSB_UEQ0/A0 TUSB_UEQ1/A1
@

1
TUSB_I2CEN
1

R10956 R10957 EC_I2C2_SCL_RE 2 3


EC_I2C2_SCL_PD 15,24
20K_0402_5% 20K_0402_5% R11308 1 @ 2 0_0402_5%

@ Q6246
2

R88 1 2 2M_0402_1% DP3_SBU2 LSK3541G1ET2L_VMT3


1

Address 00 @
R101
1K_0402_5% @
R90 2 2M_0402_1%

1
1 DP3_SBU1
2

EC_I2C2_SDA_RE 2 3
EC_I2C2_SDA_PD 15,24

B Q6247 B
LSK3541G1ET2L_VMT3
+3V_REDP +3V_REDP @

0 – RX Detect disabled
1

1 – RX Detect enabled (Default)


R109 R110
@ 1K_0402_5% 1K_0402_5% EQ setting
0 – Do not swap channel directions and EQ settings (Default)
1. – Swap channel directions and EQ settings
2

TUSB_SWAP TUSB_SLP +3V_REDP +3V_REDP +3V_REDP


+3V_REDP
1

R114 R106

1
100K_0402_5% 100K_0402_5% R78 R75

1
R989 R84
1K_0402_5% @ 1K_0402_5%
2

1K_0402_5% @ 1K_0402_5%
@

2
2

2
TUSB_CFG0 TUSB_CFG1
TUSB_DEQ1
+3V_REDP TUSB_DEQ0

1
1
+3V_REDP R86 R82 R77

1
20K_0402_5% 20K_0402_5%
R990 1K_0402_5% @
1

20K_0402_5%

2
R89 @

2
1

@ 1K_0402_5% R1007

2
@ 1K_0402_5%
2

TUSB_SEL
2

A DP3_HPD A
1

R92
1K_0402_5%
1

R1008
2

100K_0402_5%
2

@
Security Classification LC Future Center Secret Data Title
0 = 3.3-V configuration I/O voltage, 3.3-V I2C interface (Default)
Issued Date 2015/11/02 Deciphered Date 2015/08/10 TYPE-C_USB/DP redriver1
1 = 1.8-V configuration I/O voltage, 1.8-V I2C interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 22 of 67
5 4 3 2 1
5 4 3 2 1

+3V_REDP2 +3V_REDP2 +3V_REDP2

1
R11294 R11292 R10996

1K_0402_5% 1K_0402_5% 1K_0402_5%

2
PD_GPIO6 @ PD_GPIO15 @ PD_GPIO14 @

1
D R11295 R11293 R10999 D
100K_0402_5% 100K_0402_5% 100K_0402_5%

2
@ @ @

L = DisplayPort Disabled.
+3VALW +3V_REDP2 H = DisplayPort Enabled.
@ 1026 DYL@ For FVT BOM C10037 change to CD@
When I2C_EN = 0, this pin is not used by device.

10U_6.3V_M_X5R_0603_YAGEO
1 2

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201
R10970 0_5%_0603 1 1 1 1 1
@
C10038 C10036 C10035 C10034 C10037
2 2 2 2 2

20

28
1

6
U237

VCC_1

VCC_2

VCC_3

VCC_4
USB30_RX_P4 C10040 1 20.33U_0402_10V6-K USB30_RX_P4_R 9 40 USBC_SS+_RX2BP_R
9 USB30_RX_P4 USB30_RX_N4 USB30_RX_N4_R URX2P DRX2P USBC_SS+_RX2BN_R USBC_SS+_RX2BP_R 25
C10042 1 20.33U_0402_10V6-K 10 39
9 USB30_RX_N4 USB30_TX_P4 C10043 USB30_TX_P4_R URX2N DRX2N USBC_SS+_TX2BP_R USBC_SS+_RX2BN_R 25
9 USB30_TX_P4 1 2 0.22U_0402_10V6-K 12 37
+3V_REDP2 USB30_TX_N4 C10045 1 2 0.22U_0402_10V6-K USB30_TX_N4_R 13 UTX2P DTX2P 36 USBC_SS+_TX2BN_R USBC_SS+_TX2BP_R 25 +3V_REDP2
9 USB30_TX_N4 UTX2N DTX2N USBC_SS+_TX2BN_R 25 +3V_REDP2
DP2_AUXP C10039 1 2 0.1U_0402_10V7-K DP2_AUXP_R 24 8 TUSB2_DIR0
Check
2 100K_0402_5% DP2_AUXN_R 6 DP2_AUXP DP2_AUXN DP2_AUXN_R AUXP DIR0 11 TUSB2_DIR1
R10960 1 C10041 1 2 0.1U_0402_10V7-K 25
6 DP2_AUXN AUXN DIR1

1
TUSB2_SWAP 5 27 DP2_SBU1_R R10966 1 @ 2 0_0402_5% DP2_SBU1
SWAP SBU1 DP2_SBU1 25

1
TUSB2_SLP 7 26 DP2_SBU2_R R10967 1 @ 2 0_0402_5% DP2_SBU2
R10994
2 100K_0402_5% DP2_AUXP_R SLP_S0# SBU2 DP2_SBU2 25
R10961 1 R10995 @ 1K_0402_5%
C USB30_TX_P3 C10044 1 2 0.22U_0402_10V6-K USB30_TX_P3_R 16 33 USBC_SS+_TX2AP_R @ 1K_0402_5% C
9 USB30_TX_P3 USB30_TX_N3 C10047 1 2 0.22U_0402_10V6-K USB30_TX_N3_R 15 UTX1P DTX1P 34 USBC_SS+_TX2AN_R USBC_SS+_TX2AP_R 25

2
9 USB30_TX_N3 USB30_RX_P3 C10046 1 20.33U_0402_10V6-K USB30_RX_P3_R 19 UTX1N DTX1N 30 USBC_SS+_RX2AP_R USBC_SS+_TX2AN_R 25
9 USB30_RX_P3 USBC_SS+_RX2AP_R 25

2
USB30_RX_N3 C10048 1 20.33U_0402_10V6-K USB30_RX_N3_R 18 URX1P DRX1P 31 USBC_SS+_RX2AN_R TUSB2_DIR1
9 USB30_RX_N3 URX1N DRX1N USBC_SS+_RX2AN_R 25 TUSB2_DIR0
TUSB2_I2CEN 17 21 PD_GPIO6_RE R10968 1 @ 2 0_0402_5%
I2C_EN FLIP/SCL PD_GPIO6 24

1
TUSB2_UEQ0/A0 35 22 PD_GPIO15_RE R10969 1 @ 2 0_0402_5%
UEQ0/A0 CTL0/SDA PD_GPIO15 24

1
TUSB2_UEQ1/A1 2 23 PD_GPIO14_RE R11291 1 @ 2 0_0402_5% R10963
UEQ1/A1 CTL1 PD_GPIO14 24
32 DP2_HPD R10962 100K_0402_5%
TUSB2_DEQ0 HPDIN DP2_HPD 6,24
+3V_REDP2 38 100K_0402_5%
+3V_REDP2 +3V_REDP2 TUSB2_DEQ1 29 DEQ0 14 TUSB2_SEL

2
DEQ1 VIO_SEL

2
TUSB2_CFG0 3
TUSB2_CFG1 4 CFG0 41 @
1 CFG1 GND R411301 2 0_0402_5% EC_I2C2_SCL_RE
EC_I2C2_SCL_RE 22
1

R10982
R10984 R10985 1K_0402_5% @
1K_0402_5% @ 1K_0402_5% I2C_EN=0 GPIO MODE TUSB1044RNQ_QFN40_4X6 R411311 2 0_0402_5% EC_I2C2_SDA_RE
I2C_EN=1 I2C enable EC_I2C2_SDA_RE 22
2
2

@
R11309 1 2 0_0402_5%
TUSB2_UEQ0/A0 TUSB2_UEQ1/A1
@
TUSB2_I2CEN
1

R10981 R10983
20K_0402_5% 20K_0402_5% R11310 1 @ 2 0_0402_5%

@
2

R109971 2 2M_0402_1% DP2_SBU2


@
1

Address 01 R10986
1K_0402_5% @
R109981 2 2M_0402_1% DP2_SBU1
2

B B
+3V_REDP2 +3V_REDP2

0 – RX Detect disabled
1

1 – RX Detect enabled (Default)


R10980 R10979
@ 1K_0402_5% 1K_0402_5% EQ setting
0 – Do not swap channel directions and EQ settings (Default)
1. – Swap channel directions and EQ settings
2

TUSB2_SWAP TUSB2_SLP +3V_REDP2 +3V_REDP2


+3V_REDP2
+3V_REDP2
1

R10959 R10958

1
100K_0402_5% 100K_0402_5% R10977 R10978

1
R10976

1
R10975 1K_0402_5% @ 1K_0402_5%
2

@ 1K_0402_5%
@
1K_0402_5%

2
2
TUSB2_CFG0 TUSB2_CFG1

2
TUSB2_DEQ1
+3V_REDP2 TUSB2_DEQ0

1
1
+3V_REDP2 R10971 R10972 R10973

1
20K_0402_5% 20K_0402_5%
R10974 1K_0402_5% @
1

20K_0402_5%

2
R10987 @

2
1

@ 1K_0402_5% R10989

2
@ 1K_0402_5%
2

TUSB2_SEL
2

DP2_HPD
A A
1

R10988
1K_0402_5%
1

R11000
2

100K_0402_5%
2

0 = 3.3-V configuration I/O voltage, 3.3-V I2C interface (Default) Security Classification LC Future Center Secret Data Title
1 = 1.8-V configuration I/O voltage, 1.8-V I2C interface Issued Date 2015/11/02 Deciphered Date 2015/08/10 DOCK_USB/DP redriver2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 23 of 67
5 4 3 2 1
5 4 3 2 1

VCC3_LDO_DOCK

+3VL VCC3_LDO_DOCK V1P8_LDO_DOCK

+5VALW_PD +3VALW VCC3_LDO_DOCK_R DOCK_VBUS20 DOCK_VBUS20 USBC_VBUS20 R10429 1 2 100K_0201_1% ADCIN2 R10427 1 2 10K_0201_1%

1
@
R10673 R10672 I2C Addressing
0_0201_5% 0_0201_5%

NSR20F30NXT5G_DSN2-2

NSR20F30NXT5G_DSN2-2
USBC_VBUS20

10U_0402_6.3V6-M

10U_0402_6.3V6-M

4.7U_0402_6.3V6-M

1
@ 2 2 2 I2C1(to EC)

1U_0402_25V6-K

1U_0402_25V6-K
-TBT Port : 0x23

C9549

C9550
2 2

C9551

1
-USBC Port : 0x27

D752

D753
C9553

C9554
D
V1P8_LDO_DOCK +3VL 1 1 1 I3C2(to AR) D
+1.8VALW VCC3_LDO_DOCK 1 1 -TBT Port : 0x38

2
-USC Port : 0x3f

10K_0201_1%

10K_0201_1%

10K_0201_1%

10K_0201_1%
TABLE I2C Address Selection

2
EMC@ EMC@

DIV = R2 / (R1+R2) I2C Unique Address [3:1]

2
2
R504 R505 R10427

10

30

11
12
9

1
2

3
4
U207 DIV_Min DIV_Max I2C_ADDR_DECODE_C1 I2C_ADDR_DECODE_C2

3.3K_0201_5%

3.3K_0201_5%

2
PLACE NEAR U203 Pin11.12 PLACE NEAR U203 Pin3,4

PP_HV1_1
PP_HV1_2

PP_HV2_1
PP_HV2_2

VBUS1_1
VBUS1_2

VBUS2_1
VBUS2_2
VIN_3V3

LDO_3V3

LDO_1V8
1 R10431

1 R11241

1 R10430

R11242
1 +5VALW_PD NA 0.00 0.18 000b 100b
1
191K 0.20 0.38 001b 101b

1
100K 0.40 0.58 010b 110b
@ @
PD_EE_CLK
10K 0.60 1.00 011b 111b
TP975 @1 Test_Point_40MIL R10628 1 @ 2 0_0201_5% 33
TP974 @1 Test_Point_40MIL PD_EE_DO 31 SPI_CLK/GPIO10 +3VS
TP976 @1 Test_Point_40MIL PD_EE_DI 32 SPI_MISO/GPIO8 6 ADCIN1
TP977 @1 Test_Point_40MIL PD_EE_CS# 34 SPI_MOSI/GPIO9 ADCIN1
SPI_SS#/GPIO11 20 VCC3_LDO_DOCK
PP1_CABLE

1
R3108
PD CONTROLLER C1_CC1
19
DP2_CC1 25
1M_0402_5%

1
1 R11081 2 1M_0201_5% 45 21 @ R10428 1 2 100K_0201_1% ADCIN1 R10426 1 2 10K_0201_1%
C1_USB_P/GPIO18 C1_CC2 DP2_CC2 25
1 R11082 2 1M_0201_5% 46

2
C1_USB_N/GPIO19 25 DP2_HPD_Q 3 2
PD_I2C_INT# HPD1/GPIO3 DP2_HPD 6,23 BUSPOWER Config.
24 @ Q6240
I2C1_IRQ# BP_NoWait

1
43 TABLE BUS POWER Configuration
PP_EXT1/GPIO16 TBT_HV_GATE 55
C 23 R4101 LSK3541G1ET2L_VMT3 C
15 CCG4_APU_USBC_SDA I2C1_SDA
15 CCG4_APU_USBC_SCL 22 100K_0402_5% Configuration
I2C1_SCL
44 EC_PD_RST DIV=R2/ (R1+R2)
2

22P_25V_J_NPO_0201

EMC_NS@

R11350 1 @ 2 0_0402_5%
10K_0201_1%

2
1

1
C9878

@ DIV MIN DIV MAX


R42282

R42283
10K_0201_1%

100K_0402_5%

@ @ R11326
RE4293

0_0402_5% 0.00 0.18 BP_NoRespones


2 39 0.20 0.38 BP_WaitFor3V3_Internal
1

HRESET
0.40 0.58 BP_WaitFor3V3_External
2

2
+3VS 0.60 1.00 BP_NoWait
+3VL VCC3_LDO_DOCK @
8 ADCIN2
ADCIN2
1 R11083 2 1M_0201_5% 47 41
C2_USB_P/GPIO20 PP2_CABLE

1
1 R11084 2 1M_0201_5% 48
C2_USB_N/GPIO21 R3109
R11304 1 @ 2 0_0402_5% INT#_TYPEC_PD 29 40 1M_0402_5% VCC3_LDO_DOCK
44 INT#_TYPEC I2C2_IRQ# C2_CC1 USBC_CC1 26

1
42 USBC_CC2 26 @
R11305 1 @ 2 0_0402_5% EC_I2C2_SDA_PD 28 C2_CC2
27,44 EC_I2C2_SDA
SN1701012RJTR

2
R11306 1 @ 2 0_0402_5% EC_I2C2_SCL_PD 27 I2C2_SDA 26 DP3_HPD_Q 3 2
27,44 EC_I2C2_SCL I2C2_SCL HPD2/GPIO4 DP3_HPD 6,22
@ Q6241 DYL@ 0904

2
44 LSK3541G1ET2L_VMT3 SCS00007M00 to SCS00007L00
15,22 EC_I2C2_SDA_PD PP_EXT2/GPIO17 USBC_HV_GATE 55 For sort out material RB521CM-30T2R_VMN2M-2
R3107
15,22 EC_I2C2_SCL_PD DYL@ 0918 D714
100K_0402_5%
R11351 1 @ 2 0_0402_5% SCS00007L00 to SCS00006V00

1
R11251 1 @ 2 0_0201_5% 15 For sort out material
25 DOCK_DISCHARGE

2
GPIO2
R11286 1 @ 2 0_0402_5% PD_GPIO1_R 14 38 R11285 1 @ 2 0_0402_5% VCC3_LDO_TBT_SPI
22 PD_GPIO1 GPIO1 GPIO15/PWM2 PD_GPIO15 23
R11287 1 @ 2 0_0402_5% PD_GPIO0_R 13 37 R11290 1 @ 2 0_0402_5%

1 R10148

1 R10149

1 R10150

R10151
22 PD_GPIO0 GPIO0 GPIO14/PWM1 PD_GPIO14 23
B PD_GPIO5_R B
22 PD_GPIO5 R11288 1 @ 2 0_0402_5% 16

0.1U_0201_6.3V6-K
GPIO5 TP962 1

C9468
R11289 1 @ 2 0_0402_5% PD_GPIO6_R 17 49 1 @

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K
23 PD_GPIO6 GPIO6 NC1

1
TP963

C9559

C9560

C9557

C9558
R11303 1 @ 2 0_0402_5% PD_GPIO7 18 50 1 @
25,44 DOCK_USB2_BUS_EN# GPIO7 NC2 2 2 2 2 2
R11252 1 @ 2 0_0201_5% 35
26 USBC_DISCHARGE

2
GPIO12

EMC@

EMC@

EMC@

EMC@

2
R11302 1 @ 2 0_0402_5% PD_GPIO13 36 1 1 1 1

3.3K_0201_5%

3.3K_0201_5%

3.3K_0201_5%
26,44 USBC_USB2_BUS_EN# GPIO13 51
1M_0201_5%

1M_0201_5%

3.3K_0201_5%
GND
2

8
U15
1M_0201_5%

1M_0201_5%
2

AP1

AP2

AP3

AP4
R11049

R10425

VCC
R11313

R11314

SN1701012RJTR_QFN48_6X6
A1

A2

A3

A4

PD_EE_CS# 1 5 PD_EE_DI
1

/CS DI(IO0)
1

PD_EE_DO 2 6 PD_EE_CLK
DO(IO1) CLK
Note: SDV Phase mounts "PTPS65988CRSLR"
(Production Sample1.2)
3 7
VCC3_LDO_DOCK_R @ VCC3_LDO_DOCK /WP(IO2) /HOLD(IO3)
+5VALW_PD R11050 1 2 0_5%_0603

PLACE NEAR U203 Pin9 PLACE NEAR U203 Pin1 PLACE NEAR U203 Pin20 PLACE NEAR U203 Pin41

GND
1
@ C10081 W25Q80JVSSIQ_SO8
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

4
2 2 2 2 2 2 2 2 FDG316P_SC70-6 10U_0402_6.3V6-M
A
2 A
C9614

C9613

C9612

C9611

C9616

C9615

C9618

C9617

6 1
1 1 1 1 1 1 1 1

5 2
Security Classification LC Future Center Secret Data Title
4 3 USB PD CONNTROLLER
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Q831 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 24 of 67
5 4 3 2 1
5 4 3 2 1

VCC3_LDO_DOCK +3VALW

+3VALW +3VALW
1
C9543
0.1U_0201_6.3V6-K

2
2

0.1U_6.3V_K_X5R_0201
2 2

USB_SW@

USB_SW@

1U_6.3V_M_X5R_0201
R10421
U202

2
C11206

C11207
DOCK_VBUS20_CONN 10K_0201_5% DOCK_VBUS20 @
DOCK_VBUS20_CONN R6212
10 1 1
0_0201_5%

1
VPWR

1
U201 USB_SW@
DP2_SBU1 15 1 DOCK_SBU1_CONN R10608
23 DP2_SBU1

1
DP2_SBU2 14 SBU1 C_SBU1 2 DOCK_SBU2_CONN VCC3_LDO_DOCK B3 A2 1/20W_10K_5%_0201

1U_0402_25V6-K

1U_0402_25V6-K
0.47U_0402_25V6-K

0.47U_0402_25V6-K
23 DP2_SBU2 SBU2 C_SBU2 IN1 OUT1

0.1U_6.3V_K_X5R_0201
2 2 2 2 C2 A3
DP2_CC1 12 4 DOCK_CC1_CONN C3 IN2 OUT2 B2

C9442

C9441

C9440

C9439
24 DP2_CC1 2

2
DP2_CC2 CC1 C_CC1 DOCK_CC2_CONN IN3 OUT3

@ C6214
24 DP2_CC2 11 5
CC2 C_CC2

9
R10423 A1 B1 U19 USB_SW@
20 7 1 1 1 1 R10422 EN# ACOK# 4 2 DOCK_USB2N_R
D 100K_0201_5% 2 1 D

VDD
19 D1 RPD_G1 0.1U_25V_K_X5R_0402 1 2 C1 M- Y- 1

GND_1
GND_2
GND_3
17 D2 6 C9541 OVLO C9542 5 1 DOCK_USB2P_R

2
16 NC1 RPD_G2 1M_0201_5% 1U_25V_K_X5R_0402 M+ Y+
NC2 FLT_REPORT# @ @ DOCK_USB2N_CONN

2
9 1 2 6 10
1 2 3 FLT R10420 FPF2281BUCX-F130_WLCSP12 D- SEL

A4
B4
C4
VBIAS DOCK_USB2P_CONN

1
8 51.1K_0201_1% 7 8

GND
GND1 D+ OE DOCK_USB2_BUS_EN# 24,44
C9544 13 R11047
GND2

2
0.1U_50V_K_X5R_0402 18 @ 100_0603_5% @

1
GND3 21 R6214

3
THERMAL_PAD PI3USB102ZMEX_UQFN10_1P4X1P8 1/20W_0_5%_0201

2
SN1710033RUKR_WQFN20_3X3

1
@ Pericom PI3USB102ZMEX

1
Q623 D
DOCK_DISCHARGE 2
24 DOCK_DISCHARGE G
R10647
DOCK_SBU1_CONN R11177 1 2 2M_0201_5% SSM3K72KFS_2-2H1S
DOCK_SBU2_CONN R11178 1 2 2M_0201_5% S
Vendor P/N LCFC P/N

3
KOA 100 +-5% 0603 SD000022U0T
Rohm 100 +-5% 0603 SD000022V0T
Q269
Grug:refer other typec USB2.0
Vendor P/N LCFC P/N EMC_NS@
ON-semi 2N7002KW SB00001JY00 R10827 1 2 0_0402_5%
F60
NXP NX7002BKW SB00001GU00 L61 EMC@
Vendor P/N LCFC P/N DOCK_USB2P_R 4 3
4 3 DOCK_USB2P 9
LIITELFUSE 0603L035YR SP040007900 +3VALW_LAN DOCK_VBUS20_CONN DOCK_VBUS20_CONN
JDOCK1 @
DOCK_USB2N_R 1 2
BOURNS MF-FSMF035X-2 SP040007700 1 2 DOCK_USB2N 9

AEM PMS0603-035 SP040007B00 15 16 EXC24CH900U_4P


SHELL1 SHELL2

1
F60 EMC_NS@
0.35A_6V_0603L035YR R10828 1 2 0_0402_5%

17 18

2
19 SHELL3 SHELL5
SHELL4
C C

A1 B12
USBC_SS+_TX2AP_C A2 GND1 GND4 B11 USBC_SS+_RX2AP_C
USBC_SS+_TX2AN_C A3 TX1+ RX1+ B10 USBC_SS+_RX2AN_C
A4 TX1- RX1- B9
DOCK_CC1_CONN A5 VBUS1 VBUS4 B8 DOCK_SBU2_CONN
DOCK_USB2P_CONN A6 CC1 SBU2 B7 DOCK_USB2N_CONN
DOCK_USB2N_CONN A7 D1+ D2- B6 DOCK_USB2P_CONN
DOCK_SBU1_CONN A8 D1- D2+ B5 DOCK_CC2_CONN
A9 SBU1 CC2 B4
USBC_SS+_RX2BN_C A10 VBUS2 VBUS3 B3 USBC_SS+_TX2BN_C
USBC_SS+_RX2BP_C A11 RX2- TX2- B2 USBC_SS+_TX2BP_C
A12 RX2+ TX2+ B1
GND2 GND3

20
SHELL6 D4048
21 22
SHELL7 SHELL8 USBC_SS+_TX2BN_C 1 10 USBC_SS+_TX2BN_C
Line-1 NC1
23 24 USBC_SS+_TX2BP_C 2 9 USBC_SS+_TX2BP_C
SHELL9 SHELL10 Line-2 NC2
3 8
GND1 GND2
USBC_SS+_RX2BN_C 4 7 USBC_SS+_RX2BN_C
Line-3 NC3
USBC_SS+_RX2BP_C 5 6 USBC_SS+_RX2BP_C
MDI_2N_CONN 1 8 MDI_3N_CONN Line-4 NC4
MDI_2P_CONN 2 MDI_2N MDI_3N 9 MDI_3P_CONN
DOCK_LINKUP_SYS# R10436 1 @ 2 0_0402_5% 3 MDI_2P MDI_3P 10 AZ1023-04F.R7G_DFN2510P10E10
32 DOCK_LINKUP_SYS# +3VALW_LAN_DOCK -LINK_LED GND EMC@
4 11 PWRSWITCH#
DOCK_ACTIVITY_SYS# LED_PWR -PWRSWITCH DOCK_RJ45_DET# PWRSWITCH# 18,44
R10437 1 @ 2 0_0402_5% 5 12
32 DOCK_ACTIVITY_SYS# MDI_1N_CONN -ACT_LED -DOCK_RJ45_DET MDI_0N_CONN DOCK_RJ45_DET# 7,44
6 13
MDI_1P_CONN 7 MDI_1N MDI_0N 14 MDI_0P_CONN
MDI_1P MDI_0P
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
D4047
HIGHS_DK11197-D20A2-1H
USBC_SS+_TX2AN_C USBC_SS+_TX2AN_C
1

1
1 10
Line-1 NC1
B 1 B
1

1
EMC@ USBC_SS+_TX2AP_C 2 9 USBC_SS+_TX2AP_C
C9877 Line-2 NC2
0.1U_0201_6.3V6-K 3 8
2 GND1 GND2
USBC_SS+_RX2AN_C 4 7 USBC_SS+_RX2AN_C
Line-3 NC3
USBC_SS+_RX2AP_C USBC_SS+_RX2AP_C
2

2
5 6
D757
EMC@

D756
EMC@

D755
EMC@

D754
EMC@

EMC@

EMC@
D4051

D4052
Line-4 NC4
2

2
AZ1023-04F.R7G_DFN2510P10E10
EMC@

L56 EMC@ D760 EMC@


4 3 MDI_0P_CONN MDI_0P_CONN 1 1 MDI_0P_CONN
32 DOCK_MDI_0+ 10 9
4 3
MDI_0N_CONN 2 2 MDI_0N_CONN
9 8
1 2 MDI_0N_CONN
32 DOCK_MDI_0- 1 2 MDI_1P_CONN MDI_1P_CONN
R42469 1 @ 2 0_0201_5% 4 4 7 7
EXC24CH900U_4P
MDI_1N_CONN 5 5 MDI_1N_CONN
6 6
USBC_SS+_TX2AN_R C10053 1 2 USBC_SS+_TX2AN_L USBC_SS+_TX2AN_C L57 EMC@
23 USBC_SS+_TX2AN_R MDI_1P_CONN
0.22U_25V_K_X5R_0402 32 DOCK_MDI_1+ 4 3 3 3
4 3
USBC_SS+_TX2AP_R C10054 1 2 USBC_SS+_TX2AP_L USBC_SS+_TX2AP_C 8
23 USBC_SS+_TX2AP_R MDI_1N_CONN
0.22U_25V_K_X5R_0402 32 DOCK_MDI_1- 1 2
1 2
R42470 1 @ 2 0_0201_5% EXC24CH900U_4P AZ1045-04F_DFN2510P10E-10-9

R42467 1 @ 2 0_0201_5% L58 EMC@ D761 EMC@


4 3 MDI_2P_CONN MDI_2P_CONN 1 1 MDI_2P_CONN
32 DOCK_MDI_2+ 10 9
4 3
USBC_SS+_RX2AP_R C11193 1 2 USBC_SS+_RX2AP_L USBC_SS+_RX2AP_C MDI_2N_CONN 2 2 MDI_2N_CONN
23 USBC_SS+_RX2AP_R 9 8
0.22U_25V_K_X5R_0402 1 2 MDI_2N_CONN
32 DOCK_MDI_2- 1 2 MDI_3P_CONN MDI_3P_CONN
4 4 7 7
USBC_SS+_RX2AN_R C11194 1 2 USBC_SS+_RX2AN_L USBC_SS+_RX2AN_C EXC24CH900U_4P
23 USBC_SS+_RX2AN_R MDI_3N_CONN MDI_3N_CONN
0.22U_25V_K_X5R_0402 5 5 6 6
L59 EMC@
R42468 1 @ 2 0_0201_5% 4 3 MDI_3P_CONN 3 3
32 DOCK_MDI_3+ 4 3
8
R42466 1 @ 2 0_0201_5% 1 2 MDI_3N_CONN
32 DOCK_MDI_3- 1 2
A A
EXC24CH900U_4P AZ1045-04F_DFN2510P10E-10-9
USBC_SS+_TX2BN_R C10055 1 2 USBC_SS+_TX2BN_L USBC_SS+_TX2BN_C
23 USBC_SS+_TX2BN_R
0.22U_25V_K_X5R_0402 DYL@ 0904 for BOM
L56 - L59 For sort out the material,change from SC30000330J to SC300001Y0J
USBC_SS+_TX2BP_R C10056 1 2 USBC_SS+_TX2BP_L USBC_SS+_TX2BP_C
23 USBC_SS+_TX2BP_R
0.22U_25V_K_X5R_0402 Vendor P/N LCFC P/N
R42465 1 @ 2 0_0201_5% 1st: Murata DLP11SN900HL2 SM070002Y00

R42464 1 @ 2 0_0201_5%
2nd: TDK MCZ1210AH900L2TA0G SM070004A00

USBC_SS+_RX2BN_R C11195 1 2 USBC_SS+_RX2BN_L USBC_SS+_RX2BN_C


23 USBC_SS+_RX2BN_R Security Classification LC Future Center Secret Data Title
0.22U_25V_K_X5R_0402
USBC_SS+_RX2BP_R Issued Date Deciphered Date DOCKING CONNECTOR
C11196 1 2 USBC_SS+_RX2BP_L USBC_SS+_RX2BP_C
23 USBC_SS+_RX2BP_R
0.22U_25V_K_X5R_0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
R42437 1 @ 2 0_0201_5% Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 25 of 67
5 4 3 2 1
5 4 3 2 1

+3VALW +3VALW
VCC3_LDO_DOCK

0.1U_6.3V_K_X5R_0201
1 +3VALW 2 2

USB_SW@

USB_SW@

1U_6.3V_M_X5R_0201

2
C11210

C11211
C9889 @
0.1U_16V_K_X5R_0201 R42281

2
2 1 1
0_0201_5%

1
USB_SW@
U199
USBC_VBUS20_CONN R10372 USBC_VBUS20 R42236

1
USBC_VBUS20_CONN 10K_0201_5% 1/20W_10K_5%_0201

0.1U_6.3V_K_X5R_0201
10

1
VPW R U200 2

2
DP3_SBU1 USBC_SBU1_CONN

@ C11250
15 1
22 DP3_SBU1 DP3_SBU2 USBC_SBU2_CONN

9
14 SBU1 C_SBU1 2 VCC3_LDO_DOCK B3 A2 U20 USB_SW@
D D
22 DP3_SBU2 SBU2 C_SBU2 C2 IN1 OUT1 A3 4 2 USBP3-_R

VDD
USBC_CC1 12 4 USBC_CC1_CONN C3 IN2 OUT2 B2 M- Y- 1

1U_0402_25V6-K

1U_0402_25V6-K
0.47U_0402_25V6-K

0.47U_0402_25V6-K
24 USBC_CC1 USBC_CC2 CC1 C_CC1 USBC_CC2_CONN IN3 OUT3 USBP3+_R

1
11 5 2 2 2 2 5 1
24 USBC_CC2 CC2 C_CC2 M+ Y+

C9623

C9624

C9625

C9626
R10370 A1 B1
20 7 EN# ACOK# USBP3-_CONN 6 10
100K_0201_5% 2 R10373 1
19 D1 RPD_G1 0.1U_25V_K_X5R_0402 1 2 C1 C9540 D- SEL

GND_1
GND_2
GND_3
17 D2 6 1 1 1 1 C9539 OVLO USBP3+_CONN 7 8

GND
2
16 NC1 RPD_G2 D+ OE USBC_USB2_BUS_EN# 24,44
1M_0201_5% 1U_25V_K_X5R_0402
NC2

2
9 1 2 @
1 2 3 FLT R10371 FPF2281BUCX-F130_WLCSP12 R42280

C4
A4
B4

3
VBIAS 8 @ @ PI3USB102ZMEX_UQFN10_1P4X1P8
GND1 51.1K_0201_1% 1/20W_0_5%_0201
C9538 13
GND2

1
0.1U_50V_K_X5R_0402 18

1
GND3 21 R11048
THERMAL_PAD Pericom PI3USB102ZMEX
100_0603_5%
SN1710033RUKR_WQFN20_3X3

2
@
Over Voltage Lock Out Trip Threshold = 1.20 * ( 1 + R10373 / R10371 )
@

1
Q624 D
USBC_SBU1_CONN USBC_DISCHARGE
R10639 1 2 2M_0201_5% 2
USBC_SBU2_CONN 24 USBC_DISCHARGE
R10640 1 2 2M_0201_5% G
SSM3K72KFS_2-2H1S
S USBC_VBUS20_CONN

3
R10647
Vendor P/N LCFC P/N EMC_NS@
R10629 1 2 0_0402_5%
KOA 100 +-5% 0603 SD000022U0T
L74 EMC@
USBP3+_R 4 3
C Rohm 100 +-5% 0603 SD000022V0T 4 3 USBP3+ 9 C

Q269 USBP3-_R 1 2

25
26
27
28
29
1 2 USBP3- 9
Vendor P/N LCFC P/N JUSBC1
@ EXC24CH900U_4P

GND25
GND26
GND27
GND28
GND29
ON-semi 2N7002KW SB00001JY00 1 2 0_0402_5%
R10630
NXP NX7002BKW SB00001GU00 EMC_NS@
B12 A1
GND_B12 GND_A1
USBC_RX1P_CONN B11 A2 USBC_TX1P_CONN
RX1+B11 TX1+_A2
USBC_RX1N_CONN B10 A3 USBC_TX1N_CONN
RX1-_B10 TX1-_A3
B9 A4
VBUS_B9 VBUS_A4
USBC_SBU2_CONN B8 A5 USBC_CC1_CONN
SBU2_B8 CC1_A5
USBP3-_CONN B7 A6 USBP3+_CONN
R42474 1 @ 2 0_0201_5% D-_B7 D+_A6
USBP3+_CONN B6 A7 USBP3-_CONN
D+_B6 D-_A7
USBC_SS+_TX3AN_R 1 2 USBC_SS+_TX3AN_L USBC_TX1N_CONN USBC_CC2_CONN B5 A8 USBC_SBU1_CONN
22 USBC_SS+_TX3AN_R C74
0.22U_25V_K_X5R_0402 CC2_B5 SBU1_A8
B4 A9
USBC_SS+_TX3AP_R 1 2 USBC_SS+_TX3AP_L USBC_TX1P_CONN VBUS_B4 VBUS_A9
22 USBC_SS+_TX3AP_R C75
USBC_TX2N_CONN B3 A10 USBC_RX2N_CONN
0.22U_25V_K_X5R_0402
TX2-_B3 RX2-_A10
USBC_TX2P_CONN USBC_RX2P_CONN
R42475 1 @ 2 0_0201_5% B2 A11
TX2+_B2 RX2+_A11
B1 A12
GND_B1 GND_A12

GND30
B B

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
R42476 1 @ 2 0_0201_5%

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

30
HIGHS_UB11247-A600C-1H
USBC_SS+_RX3AP_R 2 USBC_SS+_RX3AP_L USBC_RX1P_CONN
C11189 1
22 USBC_SS+_RX3AP_R

1
0.22U_25V_K_X5R_0402

1
USBC_SS+_RX3AN_R 2 USBC_SS+_RX3AN_L USBC_RX1N_CONN
C11190 1

1
22 USBC_SS+_RX3AN_R
0.22U_25V_K_X5R_0402

R42477 1 @ 2 0_0201_5%

EMC@

EMC@

EMC@

EMC@
2

2
D4058

D4059

D4064

D4065
EMC@

EMC@
2

2
D746

D748

2
2

2
R42478 1 @ 2 0_0201_5%

USBC_SS+_TX3BN_R 1 2 USBC_SS+_TX3BN_L USBC_TX2N_CONN


22 USBC_SS+_TX3BN_R C76
0.22U_25V_K_X5R_0402
USBC_SS+_TX3BP_R 1 2 USBC_SS+_TX3BP_L USBC_TX2P_CONN D4074 D4075
C77
22 USBC_SS+_TX3BP_R USBC_RX1P_CONN USBC_RX1P_CONN USBC_TX1P_CONN USBC_TX1P_CONN
0.22U_25V_K_X5R_0402 1 10 1 10
Line-1 NC1 Line-1 NC1
USBC_RX1N_CONN USBC_RX1N_CONN USBC_TX1N_CONN USBC_TX1N_CONN
R42479 1 @ 2 0_0201_5% 2 9 2 9
Line-2 NC2 Line-2 NC2
3 8 3 8
GND1 GND2 GND1 GND2
USBC_TX2N_CONN 4 7 USBC_TX2N_CONN USBC_RX2N_CONN 4 7 USBC_RX2N_CONN
A
R42480 1 @ 2 0_0201_5% Line-3 NC3 Line-3 NC3 A
USBC_TX2P_CONN 5 6 USBC_TX2P_CONN USBC_RX2P_CONN 5 6 USBC_RX2P_CONN
Line-4 NC4 Line-4 NC4
USBC_SS+_RX3BN_R 2 USBC_SS+_RX3BN_L USBC_RX2N_CONN
C11191 1
22 USBC_SS+_RX3BN_R AZ1023-04F.R7G_DFN2510P10E10 AZ1023-04F.R7G_DFN2510P10E10
0.22U_25V_K_X5R_0402
EMC@ EMC@
USBC_SS+_RX3BP_R 2 USBC_SS+_RX3BP_L USBC_RX2P_CONN
C11192 1
22 USBC_SS+_RX3BP_R
0.22U_25V_K_X5R_0402
Security Classification LC Future Center Secret Data Title
R42481 1 @ 2 0_0201_5%
Issued Date Deciphered Date USB_TYPE-C CONNECTOR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 26 of 67
5 4 3 2 1
5 4 3 2 1

+3VALW _RE VCC1R2B +3VALW _RE


+3VALW _RE

1026 DYL@ For FVT BOM C11246 change to CD@

1
1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201
2

1
R42263 R42264 R42265 R42266

4.7K_0201_5%

4.7K_0201_5%

4.7K_0201_5%

4.7K_0201_5%

4.7K_0201_5%

4.7U_6.3V_M_X5R_0402

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201
0.01U_6.3V_K_X7R_0201

0.01U_6.3V_K_X7R_0201

0.01U_6.3V_K_X7R_0201

0.01U_6.3V_K_X7R_0201
1 1

10K_0201_5%
R11106

R11107

R11102

R11103

C11237

C11245
4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5%

R11104

R11105
1 1 1 1 1 1 1 @ 1 1 @ @ @ @

2
2 2

2
@ @

2
U3323 2 2 2 2 2 2 2 2 2 U3323_A_DE

C11238

C11239

C11241

C11243

C11240

C11244

C11242

C11246

C11247
U3323_RESET# 16 1 U3323_B_EQ
D RESET# VDD33_1 D
18
USBA_RE_EN R41112 1 @ 2 0_0402_5% U3323_EN 11 VDD33_2
44 USBA_RE_EN EN U3323_A_EQ
5
U3323_MODE 30 VDDDCI
MODE 34 U3323_B_DE
U3323_REXT 29 VDDD
REXT 10
VDDM_1

1
+3VALW _RE EC_I2C2_SDA 0_0402_5% 1 @ 2 R11181 U3323_CSDA 32 19
24,44 EC_I2C2_SDA CSDA VDDM_2 28 R42267 R42268 R42269 R42270
EC_I2C2_SCL 0_0402_5% 1 @ 2 R11182 U3323_CSCL 33 VDDM_3
24,44 EC_I2C2_SCL 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5%
CSCL 4 @ @ @ @
U3323_ADDR1 35 VDDAX 24

2
ADDR1 VDDAA
U3323_ADDR0 36 22
ADDR0 VDDBX
2

23
VDDBA
G1

U3323_A_DE 12 25 U3323_A_EQ
U3323_CSDA 1 6 EC_I2C2_SDA ADE AEQ
S1 D1 U3323_B_EQ 14 15 U3323_B_DE
BEQ BDE
USB3P0_TXP C10132 1 2 0.22U_6.3V_K_X5R_0201 USB3P2_SYSP2_TXP_C 2 27 USB3P2_SYSP2_TXP_CONN_C C10136 1 2 0.22U_6.3V_K_X5R_0201
Q3A 9 USB3P0_TXP USB3P0_TXN USB3P2_SYSP2_TXN_C A_INP A_OUTP USB3P2_SYSP2_TXN_CONN_C USB3P0_TXP_U 30
C10131 1 2 0.22U_6.3V_K_X5R_0201 3 26 C10137 1 2 0.22U_6.3V_K_X5R_0201
9 USB3P0_TXN A_INN A_OUTN USB3P0_TXN_U 30
5

NTJD5121NT1G_SC88-6
USB3P0_RXP C10134 1 2 0.33U_10V_K_X5R_0402 USB3P2_SYSP2_RXP_C 8 20 USB3P2_SYSP2_RXN_R R11097 1 2 10_0201_5%
G2

9 USB3P0_RXP USB3P0_RXN USB3P2_SYSP2_RXN_C B_OUTP B_INN USB3P2_SYSP2_RXP_R USB3P0_RXN_U 30


C10133 1 2 0.33U_10V_K_X5R_0402 9 21 R11098 1 2 10_0201_5%
U3323_CSCL EC_I2C2_SCL 9 USB3P0_RXN B_OUTN B_INP USB3P0_RXP_U 30
4 3
S2 D2 6 31
7 DCI_CLK GND_2 13
NTJD5121NT1G_SC88-6 DCI_DATA GND_1
17 37

4.99K_0402_1%
Q3B
TEST ePAD

4.7K_0201_5%
R11101

R42279
1
@ PS8811QFN36GTR2_QFN36_4P2X4P2
C10135
2.2U_6.3V_K_X5R_0402 +3VALW _RE

2
2

2
@
R42287
0_5%_0603
+3VS
C C

1
R41132 1 2 0_0603_5%

+3VALW @ +3VALW _RE


+1.2V VCC1R2B

1
R11115 1 @ 2 0_5%_0603
+3VALW R42254
1/10W_470_5%_0603
LP2301ALT1G_SOT23-3
@

2
1
1 2 BLM18PG181SN1D_2P Q3067 3

D
L71 1

0.01U_6.3V_K_X7R_0201
R2308 1

1
10K_0402_5% 1 1 1 D
+3VALW _RE_G 2

C10341
C10339

G
2
0.1U_6.3V_K_X5R_0201 C10342 C10340 G Q6450

2
+1.2V_R 2 @ 10U_6.3V_M_X5R_0402 0.1U_6.3V_K_X5R_0201 L2N7002KWT1G_SOT323-3
@ 2 2 2 S

3
+3VALW _RE_G
1
@
R12117 1 2 0_0603_5% C10338
0.1U_6.3V_K_X5R_0201

1
@ D 2
44,64 SYSON R41110 1 @ 2 0_0402_5%
1 2
G Q31
@ L2N7002KWT1G_SOT323-3
C10343 S

3
0.1U_6.3V_K_X5R_0201 2

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 USBA REDRIVER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 27 of 67
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 28 of 67
5 4 3 2 1
5 4 3 2 1

+3VALW +3VS +3VS_SSD

@ MAX 3A
R41211 2 1 0_1%_0603_LE

10U_0402_6.3V6-M
R3102 IFDET @ @

10U_0402_6.3V6-M

4.7U_0402_6.3V6-M

0.1U_0201_10V6-K
10K_0402_5% 1 1 1 1
SATA Device GND

C137

C146

C207
PCIe Device NC

C2037
2
R1024 1 @ 2 0_0402_5% SSD_DET 2 2 2 2
7 IFDET

2
D D
R3101
20K_0402_5%
SSD_DET#
0--SATA +3VS_SSD

1--PCIE
1
@ +3VS_SSD

1
JSSD1
R3103
SSD_DETECT# 1 2 10K_0402_5%
36 SSD_DETECT# GND_1 3.3V_1
3 4
5 GND_2 3.3V_2 6 D6041 Need Connect EC 0727
3 PCIE_SSD_RX_N4

2
7 PERN3 N/C_2 8 PLP_INT# 2 1 R41236 1 @ 2 0_0402_5%
3 PCIE_SSD_RX_P4 PERP3 N/C_3 PBTN_OUT# 7,44
9 10
11 GND_3 DAS/DSS# 12 RB521CM-30T2R_VMN2M-2
3 PCIE_SSD_TX_N4 PETN3 3.3V_3
3 PCIE_SSD_TX_P4 13 14 DYL@ 0904
15 PETP3 3.3V_4 16 SCS00007M00 to SCS00007L00
17 GND_4 3.3V_5 18 For sort out material
3 PCIE_SSD_RX_N5 PERN2 3.3V_6
19 20 DYL@ 0918
3 PCIE_SSD_RX_P5 PERP2 N/C_4
21 22 SCS00007L00 to SCS00006V00
23 GND_5 N/C_5 24 For sort out material
3 PCIE_SSD_TX_N5 PETN2 N/C_6
3 PCIE_SSD_TX_P5 25 26
27 PETP2 N/C_7 28 DYL@ 1017 TP377 follow T490 SIT SCH X395
29 GND_6 N/C_8 30 PLP_FDBK# Test_Point_16MIL 1 TP377 New add test point
3 PCIE_SSD_RX_N6 PERN1 N/C_9
31 32 R70 1 @ 2 0_0402_5%
3 PCIE_SSD_RX_P6 PERP1 N/C_10 SATA2_DEVSLP 7
33 34
GND_7 N/C_11

1
3 PCIE_SSD_TX_N6 35 36
37 PETN1 N/C_12 38 R3100
3 PCIE_SSD_TX_P6 PETP1 DEVSLP
39 40 10K_0402_5%
swap R11011 1 @ 2 0_0402_5% PCIE_SSD_RX_P7_R 41 GND_8 N/C_13 42 @
C C
3 PCIE_SSD_RX_P7 PCIE_SSD_RX_N7_R PERN0/SATA-B+ N/C_14
R11012 1 @ 2 0_0402_5% 43 44
3 PCIE_SSD_RX_N7

2
45 PERP0/SATA-B- N/C_15 46
47 GND_9 N/C_16 48
3 PCIE_SSD_TX_N7 PETN0/SATA-A- N/C_17 SSD_RST#
49 50
3 PCIE_SSD_TX_P7 PETP0/SATA-A+ PERST# SSD_CLKREQ_Q#
51 52 R503 1 @ 2 0_0402_5% SSD_CLKREQ# 8
53 GND_10 CLKREQ# 54 TP954 1
8 CLK_PCIE_SSD# REFCLKN PEWAKE#
55 56
8 CLK_PCIE_SSD REFCLKP N/C_18
57 58
GND_11 N/C_19
PCIE AC decoupling cap should placed closed to APU +3VS_SSD
R5122
67 68 SUSCLK_SSD_R 1 2
SSD_DET N/C_1 SUSCLK SUSCLK_SSD 8
69 70 @ 0_0402_5%
71 PEDET 3.3V_7 72 R512
73 GND_12 3.3V_8 74 1 2
GND_13 3.3V_9 SUSCLK_32K 8,35
75 @ 0_0402_5%
GND_14

77 76
PEG1 PEG2
ARGOS_NASM0-S6705-TS20
@

B B

+3VS

1
R10519 1 @ 2 0_0402_5% R11120

10K_0201_5%
D747

2
PLT_RST# 3
7,19,31,32,35,36,37,51 PLT_RST# SSD_RST#
1 SSD_RST# 36
PCIE_SSD_RST# 2
7 PCIE_SSD_RST#
BAT54AWT1G_SOT323-3

1
R11119
100K_0402_5% DYL@ 1221
SCS00007K00 to SCS00009X00
For costdown

2
@

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 M.2 SSD CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 29 of 67
5 4 3 2 1
5 4 3 2 1

+3VS +3VALW_RE1
@
R41221
1/16W_0_5%_0402
+3VALW_RE 1 2
+5VALW

R41222 1 @ 2 0_0402_5%

0.5A_32V_ERBRD0R50X

3A_32V_ERBRD3R00X
1

2
D D

F7503

F7001
2

1
JUSB1
1
2 1 25
9 USB3P1_TXP_AOU 2 G1
3 26
9 USB3P1_TXN_AOU 3 G2
4
5 4
9 USB3P1_RXP_AOU 6 5
9 USB3P1_RXN_AOU 7 6
8 7
9 USBP1-_AOU 8
9
9 USBP1+_AOU 9
10
11 10
44 AOU_CTL1 +5VALW_AOU 12 11
13 12
14 13
15 14
16 15
17 16
+3VALW_RE2 18 17
19 18
20 19
44 AOU_CTL3 21 20
44 AOU_DET# 21
22
23 22
44 AOU_EN 23
24
9 USB_OC1# 24
ELCO_BJS6809018

C C

USB_PWR_S3
WIDE PATTERN(MIN 500mA)
PLACE NEAR USB CONN

1
2 2
0.1U_16V_K_X5R_0201 0.1U_16V_K_X5R_0201+ C1248 @ R10257 1 2 0_0402_5%
C771 C773 150U_B2_6.3VM_R35M
+5VALW USB_PWR_S3 EMC@ EMC@
1 1 2 JUSB2 @ FLJ1 EMC@
USBP0-_CONN 2 1 USBP0-
USB3P0_TXP_CONN 9 2 1 USBP0- 9
@ 1 StdA_SSTX+
C3 1 24.7U_0402_6.3V6-M USB3P0_TXN_CONN 8 VBUS USBP0+_CONN 3 4 USBP0+
USBP0+_CONN StdA_SSTX- 3 4 USBP0+ 9
3
7 D+ EXC24CH900U_4P
1 2 USBP0-_CONN 2 GND_DRAIN 10
C179 0.1U_0201_6.3V6-K USB3P0_RXP_CONN 6 D- GND_2 11 @ R10258 1 2 0_0402_5%
U53 4 StdA_SSRX+ GND_3 12
9 USB3P0_RXN_CONN 5 GND_1 GND_4 13 Place same location
GND_2 StdA_SSRX- GND_5
1 8 R42471 1 @ 2 0_0201_5%
2 GND_1 OUT_8 7
IN_2 OUT_7 ALLTO_C190FA-10935-L
3 6
USB_ON1 4 IN_3 OUT_6 5 USB_OC2#
44 USB_ON1 EN/EN FLT USB_OC2# 9 USB3P0_RXN_CONN
USB3P0_RXN_U 27
TPS2069CDGNR MSOP 8P
B USB3P0_RXP_CONN B
USB3P0_RXP_U 27

R42472 1 @ 2 0_0201_5%
D4077
TABLE of USB3.0 Single (U53) USB3P0_TXP_CONN 1 10 USB3P0_TXP_CONN R42434 1 @ 2 0_0201_5%
Line-1 NC1
Vendor P/N LCFC P/N USB3P0_TXN_CONN 2 9 USB3P0_TXN_CONN
Line-2 NC2
TI TPS2069CDGNR SA00005TE00 3 8 USB3P0_TXN_CONN USB3P0_TXN_U
GND1 GND2 USB3P0_TXN_U 27
Rohm G548A1F51U SA00005RL00 USB3P0_RXP_CONN 4 7 USB3P0_RXP_CONN
Line-3 NC3 USB3P0_TXP_CONN USB3P0_TXP_U
USB3P0_RXN_CONN USB3P0_RXN_CONN USB3P0_TXP_U 27
5 6
Line-4 NC4

AZ1023-04F.R7G_DFN2510P10E10 D6043 D6044


R42433 1 @ 2 0_0201_5%
EMC@
USBP0-_CONN 1 2 2 1 USBP0+_CONN
1 2 2 1

PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2
EMC@ EMC@

A A

KevinH: USB3.1 GEN2 common choke follow TINY5, NEED CONFIRM

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 USB POWER/CONN (1/2)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 30 of 67
5 4 3 2 1
5 4 3 2 1

D D

+3VALW TO +3VALW_LAN_SYS +3VALW_LAN rising t i me ( 10 %~90 %):


0 . 5 m s ＜s pec＜ 1 0 0m
s
+3VALW1_LAN +3VALW_LAN_SYS +3VALW_LAN_SYS +LAN_VDDREG_SYS
Need short
@ @
RL84 1 2 0_5%_0603 width : 40 mils RL1 1 2 0_5%_0603

2 1
CL1
2 2 1 1 4.7U_0402_6.3V6-M CL2
CL4 CL5 EMC@ 0.1U_0201_6.3V6-K
4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M CL6 CL7 1 2
@ @ 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K
1 1 2 2

Close to Pin11 Close to Pin32 Close to Pin11 Close to Pin32

+3VALW_LAN_SYS
2

RL5
C UL1 C
1K_0402_5%
1

RL6 1 @ 2 0_0402_5% SYS_LAN_WAKE#_R


44 SYS_LAN_WAKE#
33 +3VALW_LAN_SYS +3VS
+3VALW_LAN_SYS 32 GND 16 CLK_PCIE_LAN_SYS#
2 1 31 AVDD33_2 REFCLK_N 15 CLK_PCIE_LAN_SYS CLK_PCIE_LAN_SYS# 8
RL8 RSET
+LAN_VDD10 30 RSET REFCLK_P 14 GPP_SYS_LAN_TXN CLK_PCIE_LAN_SYS 8
2.49K_0402_1%
AVDD10 HSIN GPP_SYS_LAN_TXN 3

2
LAN_XTALO 29 13 GPP_SYS_LAN_TXP
CKXTAL2 HSIP GPP_SYS_LAN_TXP 3

2
LAN_XTALI 28 12 SYS_LAN_CLKREQ#_R RL90

G
+3VALW_LAN_SYS RJ45_ACTIVITY_SYS#
27 CKXTAL1 CLKREQB 11 +3VALW_LAN_SYS SYS_LAN_CLKREQ#_R
34 RJ45_ACTIVITY_SYS# 10K_0402_5% QL2
EC_WAKE# RL12 1 @ 2 0_0402_5% EC_WAKE#_R 26 LED0 AVDD33_1 10 SYS_MDI_3- @ @
7,32,44 EC_WAKE# RJ45_LINKUP_SYS# LED1/GPIO MDIN3 SYS_MDI_3+ SYS_MDI_3- 34
34 RJ45_LINKUP_SYS#
25 9

1
2 @ 10K_0402_5% EC_SYSLAN_NET_DET# +LAN_REGOUT LED2 MDIP3 +LAN_VDD10 SYS_MDI_3+ 34 SYS_LAN_CLKREQ#_R
RL299 1 RL298 24 8 1 3
EC_SYSLAN_NET_DET# 1 2 0_0402_5% +LAN_VDDREG_SYS23 REGOUT AVDD10_2 7 SYS_MDI_2- SYS_LAN_CLKREQ# 8

S
44 EC_SYSLAN_NET_DET# +LAN_VDD10 VDDREG MDIN2 SYS_MDI_2+ SYS_MDI_2- 34
@ 22 6 2N7002KW_SOT323-3
SYS_LAN_WAKE#_R21 DVDD10 MDIP2 5 SYS_MDI_1- SYS_MDI_2+ 34
20 LANWAKEB MDIN1 4 SYS_MDI_1+ SYS_MDI_1- 34
ISOLATE#
PLT_RST# 19 ISOLATEB MDIP1 3 +LAN_VDD10 SYS_MDI_1+ 34 1 2 0_0402_5%
RL85 @
7,19,29,32,35,36,37,51 PLT_RST# 2 0.1U_0201_16V6-K GPP_SYS_LAN_RXN_C 18 PERSTB AVDD10_1 SYS_MDI_0-
CL10 1 2
3 GPP_SYS_LAN_RXN GPP_SYS_LAN_RXP_C HSON MDIN0 SYS_MDI_0+ SYS_MDI_0- 34
CL11 1 2 0.1U_0201_16V6-K 17 1
3 GPP_SYS_LAN_RXP HSOP MDIP0 SYS_MDI_0+ 34

CL10 close to Pin18


CL11 close to Pin17

+3VS RTL8111GUL-CG_QFN32_4X4
8111GUL@
1

RL9

1K_0402_1%
2

B B
ISOLATE#
For RTL8111GUL/ RTL8106EUL (SWR mode)
LAN_XTALI
For RTL8111H (LDO mode) RL19 stuf f
1

RL11 YL1 LAN_XTALO 8111H@ +LAN_VDD10


RL19 1 2 0_0805_5%
15K_0402_5% 1 4
OSC1 GND2
2

2 3 +LAN_REGOUT LL1 1 2
GND1 OSC2 2.2UH_LQM2HPN2R2MG0L_20%
1 1 1 8111GUL@ 1 1 1 1 1 1 1 1
CL15 CL22
CL1225MHZ_10PF_7V25000014 CL13 CL77 CL16 CL17 CL18 CL19 CL20 CL21 1U_0201_6.3V6-K
10P_50V_J_NPO_0402 10P_50V_J_NPO_0402 0.1U_0201_6.3V6-K 4.7U_0603_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K @
2 2 2 EMC@ 2 2 EMC@ 2 2 2 2 2@ 2
@
Layout Note: LL1 must be
DYL@ 1017 CL12 CL13 change from 12pF to 10pF within 200mil to Pin24,
Follow Vendor test result CL15,CL16 must be within Close to Pin3, 8, 22, 30 Close to Pin22(Reserved)
200mil to LL1
+LAN_REGOUT: Width =60mil

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 SYSTEM LAN 8111GUL


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 31 of 67
5 4 3 2 1
5 4 3 2 1

SKU_ID1 DASH Non-DASH


RL31 V X
+3VALW_LAN +LAN_VDD
RL32 X V RL70 1 @ 2 0_0603_5%

1
RL81 +LAN_SROUT1.05 LL3 1 2 2.2UH_LQM2HPN2R2MG0L_20%
D
W=60mils D
+3VALW_LAN @
@ 10K_0201_5% These components close to UL1 : Pin 36 W=60mils
RL63 1 2 0_5%_0603 +LAN_VDDREG
1 1 1

2
SKU_ID1 CL55 CL61 CL65
SKU_ID1 9
@
( Should be place within 200 mils )
2 1

1
CL70 CL74 0.1U_0402_10V7-K 0.1U_0402_10V7-K 4.7U_0603_6.3V6-K
RL66 2 2 2
4.7U_0402_6.3V6M 0.1U_0402_10V7-K @
1 2 2K_0402_5%
UL6

2
JTDI Test_Point_12MIL 1 TPC34
Close to UL4 Pin 22, 23
40 DOCK_ACTIVITY_SYS#
GPP_LAN_RXP GPP_LAN_RXP_C LED0/JTRSTN DOCK_ACTIVITY_SYS# 25
CL52 1 2 0.1U_0201_16V6-K 22 37 JTDI RL295 1 @ 2 0_0402_5% EC_DASHLAN_NET_DET#
3 GPP_LAN_RXP GPP_LAN_RXN GPP_LAN_RXN_C HSOP LED1/JTDI DOCK_LINKUP_SYS#
3 GPP_LAN_RXN CL53 1 2 0.1U_0201_16V6-K 23 31 DOCK_LINKUP_SYS# 25
HSON LED2/JTMS
GPP_LAN_TXP 17 30 SPISO RL62 1 @ 2 0_0402_5% SPI_DI_L
3 GPP_LAN_TXP GPP_LAN_TXN HSIP SPISO
3 GPP_LAN_TXN 18
HSIN 1 DOCK_MDI_0+
LAN_CLKREQ#_R MDIP0 DOCK_MDI_0- DOCK_MDI_0+ 25 +3VALW_LAN +3VS
16 2 DOCK_MDI_0- 25
CLKREQB MDIN0
PLT_RST# 25 4 DOCK_MDI_1+
7,19,29,31,35,36,37,51 PLT_RST# PERSTB MDIP1 DOCK_MDI_1- DOCK_MDI_1+ 25
5 DOCK_MDI_1- 25
MDIN1

2
+3VALW_LAN CLK_PCIE_LAN 19
8 CLK_PCIE_LAN REFCLK_P

2
CLK_PCIE_LAN# 20 7 DOCK_MDI_2+ RL91

G
8 CLK_PCIE_LAN# REFCLK_N MDIP2 DOCK_MDI_2- DOCK_MDI_2+ 25
8 10K_0402_5% QL1
Dock_LAN_WAKE#_R MDIN2 DOCK_MDI_2- 25
RL83 1 2 10K_0402_5% XTLI 43 @ @
XTLO 44 CKXTAL1 10 DOCK_MDI_3+
DOCK_MDI_3+ 25

1
CKXTAL2 MDIP3 11 DOCK_MDI_3- LAN_CLKREQ#_R 1 3
DOCK_ACTIVITY_SYS# MDIN3 DOCK_MDI_3- 25 LAN_CLKREQ# 8
RL69 1 2 @ 10K_0402_5%

S
RL78 1 2 @ 10K_0402_5% JTDI R11196 1 @ 2 0_0402_5% Dock_LAN_WAKE#_R 28 29 SPISI RL60 1 @ 2 0_0402_5% SPI_DO_L 2N7002KW_SOT323-3
44 Dock_LAN_WAKE# LANWAKEB SPISI
RL71 1 2 @ 10K_0402_5% DOCK_LINKUP_SYS# RL77 2 1 NDASH@ 0_0402_5% +LAN_VDD
C RL74 1 2 1K_0402_5% SMB_ALERT ISOLATEB 26 13 C
ISOLATEB DVDD10_1 +LAN_VDD
41 RL87 1 @ 2 0_0402_5%
APU_SMB_CK1 14 DVDD10_2
EC_DASHLAN_NET_DET# 7,44,48 APU_SMB_CK1 APU_SMB_DA1 SMBCLK SPI_CLK_L
RL297 1 2 @ 10K_0402_5%
7,44,48 APU_SMB_DA1
15 27 SPISK RL61 1 @ 2 0_0402_5%
SMBDATA SPISK RL79 2 1 NDASH@ 0_0402_5% +3VALW_LAN
JTDO 32 39 +3VALW_LAN
+3VS R11173 1 @ 2 0_0402_5% SMB_ALERT 38 GPIO0/JTDO DVDD33
7,31,44 EC_WAKE# GPIO1/SMBALERT/JCLK 12
33 AVDD33_1 42
+3VALW_LAN
1

+3VALW_LAN 34 VDDREG_1 AVDD33_2 47


+LAN_VDDREG VDDREG_2 AVDD33_3
RL68 RPL3 48
1 8 TP973 @ 1 35 AVDD33_4
1K_0402_1% 2 7 SPI_CS1#_L NC 21
SPI_WP#_L EVDD10 +LAN_VDD
3 6 RL76 2 1 2.49K_0402_1% 46
2

ISOLATEB 4 5 SPI_HOLD#_L RSET 3


AVDD10_1 6
1

DASH@ SPI_CS1#_L RL59 1 @ 2 0_0402_5% SPICSB 24 AVDD10_2 9


RL80 10K_0804_8P4R_5% SPICSB AVDD10_3 45

1
AVDD10_4
15K_0402_5% RL73 49 36 +LAN_SROUT1.05
NDASH@ GND REGOUT
2

0_0402_5%
+3VALW_LAN
2

UL5 DASH@
RTL8111EPV-CG_QFN48_6X6 SPI_CS1#_L 1 8 CL58 1 2 0.1U_16V_K_X5R_0201
CS# VCC
SPI_DI_L 2 7 SPI_HOLD#_L
TPC35 DO HOLD#
Test_Point_12MIL SPI_WP#_L 3 6 SPI_CLK_L
WP# CLK
+3VALW_LAN Rising time (10%~90%) >0.5mS and <100mS. 4 5 SPI_DO_L
GND DI
1
JTDO_R

W25Q80DVSNIG SOIC 8P SPI ROM

+3VALW_LAN +LAN_VDD
RL29 for DSAH debug. XTLI RL75 1 @ 2 0_0402_5% XTLO
1

B B

1
RL65 @
@ @ NDASH@ NDASH@ RL82
RL296 33_0402_5% 1 CL56 1 CL59 1 CL54 1 CL69 1 CL60 1 CL76 1 CL63 1 CL66 1 CL72 1 CL62 1 CL68 1 CL71 1 CL75 1 CL67 1 CL73 0_0201_5%
0_0402_5% YL3
2

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

1U_0402_6.3V6-K
44 EC_DASHLAN_NET_DET# 1 2 JTDO

2
1 4
OSC1 GND2
2

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
RL67 2 3
@ GND1 OSC2
1 1
10K_0402_5%
CL57 25MHZ_10PF_7V25000014 CL64
1

10P_50V_J_NPO_0402 10P_50V_J_NPO_0402
2 2

Close to UL1 Pin 12, 42, 47, 48, 39 & 27. Close to UL1 Pin 3, 6, 9, 45, 13, 41. Close to UL1 Pin 29. Close to UL1 Pin 21.

DYL@ 1017 CL57 CL64 change from 12pF to 10pF


Follow Vendor test result

+3VALW1_LAN
@ +3VALW_LAN +3VALW_LAN
RL64 1 2 0_5%_0603

+3VALW
1

@
LP2301ALT1G_SOT23-3 R42260
Q6452 1/10W_470_5%_0603
1

+3VALW
S

@ 3 1 @
0.1U_6.3V_K_X5R_0201

R42258 1
10U_6.3V_M_X5R_0402

@
C11225

10K_0402_5% 1 1 1
0.01U_6.3V_K_X7R_0201

C11224 @
C11226

C11227
G
2

0.1U_6.3V_K_X5R_0201 Q6454
2
2

A 2 +3VALW_LAN_G LSK3541G1ET2L_VMT3 A
RL93 2 2 2@
+3VALW_LAN_G @ @ 1
10K_0402_5%
@ 1
2
0.1U_6.3V_K_X5R_0201

@
C11223
1

Q6453
44 DOCKLAN_ON 1 @ 2 LSK3541G1ET2L_VMT3
2
R42259 1 1 @
2

0_0402_5% @
2

RL94 C11228 Title


10K_0402_5% 0.1U_6.3V_K_X5R_0201 Security Classification LC Future Center Secret Data
@ 2
Issued Date Deciphered Date DOCK LAN 8111EPV
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 32 of 67
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 33 of 67
5 4 3 2 1
5 4 3 2 1

+3VALW_LAN_SYS

D D

2
1A_32V_ERBRD1R00X
F7501

1
JLAN1 @
+3VALW_LAN_SYS_CONN 1 2
3 1 2 4 SYS_MDI_1-
5 3 4 6 SYS_MDI_1+ SYS_MDI_1- 31
7 5 6 8 SYS_MDI_1+ 31
RJ45_ACTIVITY_SYS# 9 7 8 10 SYS_MDI_2-
31 RJ45_ACTIVITY_SYS# RJ45_LINKUP_SYS# 11 9 10 12 SYS_MDI_2+ SYS_MDI_2- 31
31 RJ45_LINKUP_SYS# 11 12 SYS_MDI_2+ 31
13 14
SYS_MDI_0- 15 13 14 16 SYS_MDI_3-
31 SYS_MDI_0- SYS_MDI_0+ 17 15 16 18 SYS_MDI_3+ SYS_MDI_3- 31
31 SYS_MDI_0+ 19 17 18 20 SYS_MDI_3+ 31
19 20
C C
21 22
GND1 GND2

HIGHS_BT5P0201-1001H

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 SYSTEM LAN CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 34 of 67
5 4 3 2 1
5 4 3 2 1

D D

+3VS_WLAN

2 2
C9099 C9110
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

TYPE-A NGFF CARD FOR WLAN


+3VS_WLAN
3.2H CONNECTOR +3VS_WLAN

JWLAN1
1 2
USBP6+ R790 1 @ 2 0_0201_5% USBP6+_CONN 3 GND1 3.3VAUX1 4 +3VS_WLAN
19 USBP6+ 1 2 0_0201_5% USBP6-_CONN 5 USB_D+ 3.3VAUX2 6
USBP6- R792 @
19 USBP6- 7 USB_D- KEY A LED1#
GND2 NC 8
9 NC NC 10
11 12
2

NC NC
13 NC NC 14
RL92 15
16 2 2 2
17
NC LED2# 18 C1116 C1155
10K_0402_5% MLDIR_SENSE GND16
C 19 20 0.1U_0201_6.3V6-K C1117 10U_0402_6.3V6-M C
21 DP_ML3N DP_AUXN 22 1U_6.3V_K_X5R_0201 @
1

23 DP_ML3P DP_AUXP 24 1 1 1
25 GND3 GND13 26
27 DP_ML2N DP_ML1N 28
29 DP_ML2P DP_ML1P 30
31 GND4 GND14 32
33 DP_HPD DP_ML0N 34
GPP_WLAN_TXP 35 GND5 DP_ML0P 36
3 GPP_WLAN_TXP GPP_WLAN_TXN 37 PETP0 GND15 38
3 GPP_WLAN_TXN 39 PETN0 RESERVED1 40
GPP_WLAN_RXP 41 GND6 RESERVED2 42
3 GPP_WLAN_RXP GPP_WLAN_RXN 43 PERP0 RESERVED3 44
3 GPP_WLAN_RXN 45 PERN0 COEX3 46 C
CLK_PCIE_WLAN 47 GND7 COEX2 48
8 CLK_PCIE_WLAN CLK_PCIE_WLAN# 49 REFCLKP0 COEX1 50 SUSCLK_32K
8 CLK_PCIE_WLAN# 51 REFCLKN0 SUSCLK 52 PLT_RST# SUSCLK_32K 8,29
WLAN_CLKREQ#_R 53 GND8 PERST0# 54 PCH_BT_OFF# PLT_RST# 7,19,29,31,32,36,37,51
R10456 2 1 1K_0402_5%
WLAN_CLKREQ#_R WLAN_WAKE# PCIE_WAKE#_R CLKREQ0# W_DISABLE2# PCH_WLAN_OFF# PCH_BT_OFF# 7
R11162 1 @ 2 0_0201_5% 55 56
37,44 WLAN_WAKE# 57 PEWAKE0# W_DISABLE1# 58 PCH_WLAN_OFF# 7
59 GND9 I2C_DATA 60
61 PETP1 I2C_CLK 62 R10458 1 2 100_0402_1%
PETN1 ALERT# EC_TX_R EC_RX 40,44
63 64 R10459 1 2 100_0402_1% EC_TX 40,44
65 GND10 RESERVED4 66
67 PERP1 PERST1# 68
+3VS_WLAN +3VS 69 PERN1 CLKREQ1# 70 +3VS_WLAN
71 GND11 PEWAKE1# 72
73 REFCLKP1 3.3VAUX4 74
75 REFCLKN1 3.3VAUX5
GND12
2

1
RL96 76 77
G

PEG1 PEG2
3

10K_0402_5% QL3 R11006 2 2 2


@ @ D109 ARGOS_NASA0-S6705-TSH4 C2656 C2657 C2658
RCLAMP0502BPTCT_SC75-3 @ 100K_0402_5% 0.01U_0201_6.3V7-K 0.1U_0201_6.3V6-K 4.7U_0402_6.3V6-M
1

WLAN_CLKREQ#_R 1 3 EMC_NS@ @ @ @

2
WLAN_CLKREQ# 8 1 1 1
D

2N7002KW_SOT323-3 PLACE NEAR J32

B 1 2 0_0402_5% B
RL95 @

+3VS_WLAN

RL86 1 @ 2 10K_0402_5% PCIE_WAKE#_R

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 M.2 SOCKET WLAN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 35 of 67
5 4 3 2 1
5 4 3 2 1

+3VALW
+3VS +3VS
+3VALW

1
R10955

2
+3VALW R10502 MSATA_DTCT1# 10K_0402_1%
2
1 2 2 2 @ 1 1 1

2
1M_0201_5% @ C1118 C1156 C11203 RF@ RF_NS@ RF@
C11202 0.1U_0201_6.3V6-K C1119 10U_0402_6.3V6-M DEVICE_DETECT1# R10409 1 2 15K_0402_1%
33P_0201_25V8-J C9100 C9111 C11204 44 DEVICE_DETECT1# SSD_DETECT# 29

1
2
47U_6.3V_M_X5R_0805_H1.25 1U_6.3V_K_X5R_0201 @ 1 39P_50V_J_COG_0201 18P_25V_J_COG_0201 33P_25V_J_NPO_0201

3
R10501 Q284 2 1 1 1 2 2 2
R11007 1 2 33K_0402_1% MSATA_DTCT1#
1M_0201_5%
1 LSK3541G1ET2L_VMT3

3
Q283 R10411 1 2 51K_0402_5% WWAN_DTCT#

2
D WWAN_CFG2_SW DYL@ 0829 RF advice follow A285 D

1 LSK3541G1ET2L_VMT3
Vcc 3.32V

2
R10955 10K +/- 1%
+3VALW
DEVICE_DETECT1# 1.992V 1.686V 1.533V 2.548V 2.215V 3.32V
+3VALW SSD_DETECT# V V V X X X

2
R10500 WWAN_DTCT# MSATA_DTCT1# X V V V V X
WWAN_DTCT# X X V X V X
2

1M_0201_5%
R10503 Only 2280SSD 2280&2242 SSD 2280SSD&WWAN Only 2242SSD Only WWAN No Device
Configuration
1

3
Q282
1M_0201_5%
1

1 LSK3541G1ET2L_VMT3
3

Q285 +3VALW

2
WWAN_CFG1_SW

1 LSK3541G1ET2L_VMT3
L:WWAN
2
H:SSD C218
2

0.1U_0201_6.3V6-K

TYPE-B NGFF CARD FOR WWAN +3VS


@
1

5
R41125 1 @ 2 0_0402_5% U310
3.2H CONNECTOR 7,19,29,31,32,35,37,51 PLT_RST#

VCC
R41124 1 @ 2 0_0402_5% 3 4 WWAN_RST#_R
7 WWAN_RST# B1 A

2
+3VS @ 1
29 SSD_RST# B2
R1005 2
47K_0201_5% WWAN_CFG1_SW 6 C226
S

0.1U_6.3V_K_X5R_0201_MURATA
0.1U_0201_6.3V6-K
2 @ 1 @

GND
1
DYL@ 1017 Be careful C227 C228 1
TP957 T490 SIT SCH change FULL_CARD_POWER_OFF @
JWWAN1 0.1U_0201_6.3V6-K
1 WWAN_CFG3_SW 1 2 from PH to PL

2
2
3 CONFIG_3 3.3VAUX1 4 1 2 74LVC1G3157DCKRE4_SC70-6
GND1 3.3VAUX2 FULL_CARD_POWER_OFF @
C @ 5 6 R41109 C
USBP5+_CONN GND2 FULL_CARD_POWER_OFF# PCH_WWAN_OFF# FULL_CARD_POWER_OFF 8
USBP5+ R794 1 @ 2 0_0201_5% 7 8 100K_0402_5%
19 USBP5+ USBP5-_CONN USB_D+ W_DISABLE#1 PCH_WWAN_OFF# 7
USBP5- R793 1 @ 2 0_0201_5% 9 10 @
19 USBP5- USB_D- GPIO9/LED1#/DAS/DSS#
11 +3VALW

1
GND3 NC 12

2
13 NC NC 14
KEY-B

2
15 NC NC 16 R41133 DYL@ 0828 Vendor confirm no leakage.
17 NC NC 18 47K_0201_5% R41116
19 NC 20 100K_0402_5%
@ TP956 1 WWAN_CFG0 21 GPIO_5 22

1
23 CONFIG_0 GPIO_6 24 @ JSIM1

1
25 GPIO_11 GPIO_7 26
27 DPR GPIO_10 28
29 GND4 GPIO_8 30 UIM_RESET GND1
31 PERn1/USB3.0-RX-/SSIC-RxN UIM-RESET 32 R1066 1 2 10_0201_5% UIM_CLK GND1 GND2
33 PERp1/USB3.0-RX+/SSIC-RxP UIM-CLK 34 UIM_DATA UIM_DATA C7 GND2 GND3
35 GND5 UIM-DATA 36 UIM_PWR C6 I/O GND3 GND4
TX RX Need add test point 37 PETn1/USB3.0-TX-/SSIC-TxN UIM-PWR 38 0_0402_5% 2 @ 1 R41126 PLT_RST# C5 VPP GND4 GND5
Vendor require for debug 0828 39 PETp1/USB3.0-TX+/SSIC-TxP DEVSLP 40 GND GND5 GND6
GPP_WWAN_RXN0 41 GND6 GPIO_0 42 R11352 1 @ 2 0_0402_5% WWAN_RST# GND6 GND7
3 GPP_WWAN_RXN0 GPP_WWAN_RXP0 PERn0/SATA-B+ GPIO_1 UIM_CLK GND7
43 44 C3
3 GPP_WWAN_RXP0 PERp0/SATA-B- GPIO_2 WWAN_RST#_R UIM_RESET CLOCK
45 46 R11353 1 @ 2 0_0402_5% C2 DSW2
GPP_WWAN_TXN0 47 GND7 GPIO_3 48 UIM_PWR C1 RST GND8 DSW1
3 GPP_WWAN_TXN0 GPP_WWAN_TXP0 PETn0/SATA-A- GPIO_4 VCC GND9
49 50 PE_RESET# R11354 1 2 0_0402_5% SSD_RST#
2
3 GPP_WWAN_TXP0

1
2
3
5
51 PETp0/SATA-A+ PERST# 52 JAE_SF70S006VBAR2000
CLK_PCIE_WWAN# GND8 CLKREQ# WWAN_WAKE# WWAN_CLKREQ# 8
53 54 R42290 1 @ 2 0_0402_5% EMC@ C623 @
8 CLK_PCIE_WWAN# CLK_PCIE_WWAN REFCLKN PEWake# WWAN_WAKE# 8
55 56 D21 4.7U_0402_6.3V6-M
8 CLK_PCIE_WWAN REFCLKP NC1 1
57 58 @ FTZ6.8EGT148_SC-74A5

4
59 GND9 NC2 60 2 R41127 1 100K_0402_5%
61 ANTCTRL0 COEX3 62
63 ANTCTRL1 COEX2 64
65 ANTCTRL2 COEX1 66
R2563 1 @ 2 0_0402_5% BB_RESET_JCONN 67 ANTCTRL3 SIM_DETECT 68 WWAN_ANTENNA#_R R42288 1 2 0_0402_5%
8,9 BB_RESET WWAN_CFG1_SW RESET# SUSCLK
69 70

3
CONFIG_1 3.3VAUX3

6.8P_50V_C_NPO_0201

8.2P_50V_C_COG_0201
71 72 @ Q6455
73 GND10 3.3VAUX4 74 R42289
WWAN_CFG2_SW GND11 3.3VAUX5 WWAN_ANTENNA# 7
75 1 1 0_0402_5%
CONFIG_2

RF_NS@

C11251

RF_NS@
C11252
LSK3541G1ET2L_VMT3 1
76 77

2
PEG1 PEG2
2 2 @ @
ARGOS_NASB0-S6705-TSH4
@
B B
3

pls near pin 70 72 74 DYL@ 0828 Reserve L860


D52
EMC_NS@
RCLAMP0502BPTCT_SC75-3 DYL@ 0828 WWAN vendor require 0828
RF advice reserve
1

PLACE NEAR J22 TABLE: TABLE:


Module Configuration Decodes Module Configuration Decodes Module Type
and Port
CONFIG_0 CONFIG_3 CONFIG_2 CONFIG_1 State # CONFIG_0 CONFIG_3 CONFIG_2 CONFIG_1 Configuration
(Pin 21) (Pin 1) (Pin 75) (Pin 69) (Pin 21) (Pin 1) (Pin 75) (Pin 69)
Main Host Interface
Fibcom 0 GND GND GND GND SSD - SATA N/A
L830-EB GND NC GND GND
1 GND GND GND NC SSD - PCIe N/A
Sierra 2 GND GND NC GND WWAN - PCIe 0
EM7565 GND NC NC GND
+1.8VS 3 GND GND NC NC WWAN - PCIe 1
2242 PCIe Detect 4 GND NC GND GND WWAN - USB 3.0 0
SSD GND GND GND NC -WWAN_SSD_DTCT
2

+3VALW R41115
5 GND NC GND NC WWAN - USB 3.0 1
+3VS 10K_0402_5%
@
6 GND NC NC GND WWAN - USB 3.0 2
7 GND NC NC NC WWAN - USB 3.0 3
1
2
2

R41114 BB_RESET_JCONN
8 NC GND GND GND WWAN - SSIC 0
R41113 10K_0402_5%
10K_0402_5% 2
C216
9 NC GND GND NC WWAN - SSIC 1
1

Q10B 0.1U_0201_6.3V6-K +3VS


10 NC GND NC GND WWAN - SSIC 2
1

D2

@ 1
5
G2 @ 1
@
11 NC GND NC NC WWAN - SSIC 3
C8773 12 NC NC GND GND WWAN - PCIe 2
S2

0.1U_6.3V_K_X5R_0201
2
NTJD5121NT1G_SC88-6 13 NC NC GND NC WWAN - PCIe 3
4
6

A Q10A U58 A
BB_RESET 1 14 NC NC NC GND RFU N/A
D1

BB_RESET 2 B 4 BB_RESET_JCONN
G1 PE_RESET# 2 Y
A 15 NC NC NC NC No Module Present N/A
2

Grug：
change from SB000013A00 to SB00000YS00
S1

2
C217 R4109 MC74VHC1G09DFT2G_SC70-5
3

0.1U_0201_6.3V6-K 100K_0402_5% NTJD5121NT1G_SC88-6 @


1

1
@
1

R10765 1 @ 2 0_0402_5%
Security Classification LC Future Center Secret Data Title
Issued Date 2015/11/02 Deciphered Date 2015/8/10 M.2 SOCKET WWAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 36 of 67
5 4 3 2 1
5 4 3 2 1

+3VS

1 1
C134 C135
10U_6.3V_M_X5R_04020.1U_6.3V_K_X5R_0201
2 2 +3VS +3VS
D D

2
2
RC4080
R11263 10K_0402_5%
10K_0201_5%

1
U188 @

1
@
EMC_NS@
11 30 SD_MMC_CD R11235 1 2 SD_MMC_CD_CONN
3V3_IN SD_CD#
C136 1 2 1U_6.3V_K_X5R_0201 18 31 0_0402_5%
DV33_18 MS_INS#
DAV12 10 32 R1016 2 @ 1 0_0402_5% Mode Detect
AV12 WAKE# WLAN_WAKE# 35,44 Normal short
+CRD_POWER +3VS 14 Card Insert open
DV12S

15 SD_DATA1 R0614 1 @ 2 0_0402_5% SD_DATA1_R


2 2 SP1
@ C131 C132
12 16 SD_DATA0_MS_DATA1 1 2 0_0402_5% SD_DATA0_MS_DATA1_R
1 C0616 +CRD_POWER Card_3V3 SP2
R0615 @
4.7U_0402_6.3V6M 0.1U_0201_6.3V6K
1U_0402_6.3V6-K 1 1 17 SD_CLK_MS_DATA0 R610 1 @ 2 0_0402_5% SD_CLK_MS_DATA0_R
27 SP3
2 3V3aux 19 SD_CMD_MS_DATA2 R0611 1 @ 2 0_0402_5% SD_CMD_MS_DATA2_R
SP4
SD_MS_DATA3 SD_MS_DATA3_R 1
R113 1 21/20W_6.19K_1%_0201 9 20 R0612 1 @ 2 0_0402_5%
RREF SP5 C138
21 SD_DATA2_MS_CLK R0613 1 @ 2 0_0402_5% SD_DATA2_MS_CLK_R 6P_25V_D_NPO_0201
SP6 2
GPP_CR_TXP1 3 29 SD_MMC_WPI
C 3 GPP_CR_TXP1 HSIP SP7 C
GPP_CR_TXN1 4
3 GPP_CR_TXN1 HSIN
GPP_CR_RXP1 C11169 1 2 0.1U_0201_6.3V6K GPP_CR_RXP1_C 7 20160621
3 GPP_CR_RXP1 HSOP
GPP_CR_RXN1 GPP_CR_RXN1_C Change RW10,RW11,RW12,RW13,
C139 1 2 0.1U_0201_6.3V6K 8 13
3 GPP_CR_RXN1 HSON NC1 RW14,RW15 to short pad for EMI
22
NC2

2
@
CLK_PCIE_CR 5 23 R42286
8 CLK_PCIE_CR REFCLKP NC3
0_0402_5%
CLK_PCIE_CR# 6 24
8 CLK_PCIE_CR# REFCLKN NC4

1
25
NC5
PLT_RST# 1 26
7,19,29,31,32,35,36,51 PLT_RST# PERST# NC6 +CRD_POWER
CLKREQ_PCIE1_CR# 2
40 mils +CRD_POWER
8 CLKREQ_PCIE1_CR# CLK_REQ#

R11262 1 2 10K_0201_5% 28 33 1
+3VS GPIO GND
1
C11205
C7701 10U_6.3V_M_X5R_0402
C140 & C9511 Closed to pin14 C11170 Closed to pin10 RTS5232S-GR_QFN32_4X4 2
0.1U_6.3V_K_X5R_0201
DAV12 2
DYL@ 1017 JREAD1 follow T490 SIT SCH change
2 2 2
C140 C9511 C11170
@ JREAD1
4.7U_0402_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K Close to JREAD1
B 1 1 1 SD_DATA2_MS_CLK_R 1 GND1 B
Part Number Vendor SD_MS_DATA3_R
SD_CMD_MS_DATA2_R
2 DAT2
CD/DAT3
GND1
GND2
GND2
3 GND3
4 CMD GND3 GND4
SA000077K00 RTS5232S-GR REALTEK SD_CLK_MS_DATA0_R 5
6
VDD
CLK
GND4
GND5
GND5
GND6
SD_DATA0_MS_DATA1_R 7 VSS GND6 GND7
SA00009JG00 GL9750-OIYL3 GENESYS SD_DATA1_R 8 DAT0
DAT1
GND7
GND8
GND8
SD_MMC_CD_CONN 9
10 DSW2
DSW1

+3VS
2

R10312
100K_0201_5% SD_MMC_CD

JAE_ST11S008V4HR2000
1

D
SD_MMC_CD_CONN 2
A G Q265 A
L2N7002KWT1G_SOT323-3
S
3

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 MEDIA CARD CONTROLLER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 37 of 67
5 4 3 2 1
5 4 3 2 1

TABLE +3VS +1.8VALW +5VS Near Pin46 Near Pin41 @ +5VA_AUD @ +1.8VA_AUD
1 2 +3VS_AUDIO_R 1 2 +1.8VALW_AUDIO_R 1 2 +5VS_AUDIO_R +5VA_AUD_R 1 2 +1.8VA_AUD_R 1 2
Dock support R10410 @ 0_1%_0603_LE R11146 @ 0_1%_0603_LE R10416 @ 0_1%_0603_LE R10414 R10603 0_5%_0603
0.01_0603_LE_1%

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
SUPPORT NON-SUPPORT 1 1 1 1 1 1 1 1 1@ 1@ 1 1

C9667

C9668

C9669

C9670

C9671

C9672

C9673

C9674

C9675

C9676

C9677

C9678
2 2 2 2 2 2 2 2 2 2 2 2
R1235 NO ASM NO ASM

R1236 ASM NO ASM


AGND AGND

D R1237 ASM NO ASM D

R1238 ASM NO ASM

LOGIC

18

46

41

40

20
3
U206

PVDD2

PVDD1

AVDD1

CPVDD/AVDD2
DVDD-IO
DVDD
2 SPKR_MUTE#
PDB SPKR_MUTE# 44
14 HDA_BCLK_R R10461 1 @ 2 0_0201_5% HDA_BITCLK_AUDIO
HP_L_JACK HP_L_JACK_R BCLK HDA_BITCLK_AUDIO 7
R10600 1 2 47_0201_5% 27
40 HP_L_JACK HPOUT-L 15 HDA_SYNC_AUDIO
HP_R_JACK HP_R_JACK_R SYNC HDA_SYNC_AUDIO 7
R10601 1 2 47_0201_5% 26
40 HP_R_JACK HPOUT-R 47
MIC2_VREFOL 28 JD2
41 MIC2_VREFOL MIC2-VREFO-L HP_JD_SYS
48
MIC2_VREFOR 29 JD1 HP_JD_SYS 40
41 MIC2_VREFOR MIC2-VREFO-R
1
SPDIF-OUT/GPIO2/DMIC-DATA34/DMIC-CLK-IN
4 MIC_DATA
30 GPIO0/DMIC-DATA12 MIC_DATA 18
RING2
41 RING2 MIC2-L/RING2 5 MIC_CLK_R MIC_CLK
R10462 1 EMC@ 2 1/16W_43_5%_0402
GPIO1/DMIC-CLK MIC_CLK 18
SLEEVE 31
41 SLEEVE MIC2-R/SLEEVE

33P_25V_J_NPO_0201_MURATA
6
BEEP_MIX_ATT C2503 1 2 0.1U_0201_6.3V6-KBEEP_MIX_ATT_C 34 I2C-DATA
43 BEEP_MIX_ATT PCBEEP 7 DYL@ SVT 190307 C11257
I2C-CLK For EMC test issue --- Kevin.P&Andy.H,
Change to 68pF from 100pF
C +5VA_AUD 1 1 R10462 C
8 C11257 For EMC test issue --- Kevin.P&Andy.H,
R10468 1 2 10K_0201_5% 33 NC1 Change to 43Ω from 0Ω
5VSTB 9 68P_0201_25V8-J C11258
+5VALW 35 NC2 2 2
LINE2-R 10 @
R42488 1 @ 2 10K_0201_5% 36 NC3
LINE2-L 11
NC4
12
NC5

C9680 1 2 2.2U_0402_6.3V6-K 23 45 SP_OUTR+_AUDIO


CBP SPK-OUT-R+ SP_OUTR+_AUDIO 42
24 44 SP_OUTR-_AUDIO
CBN SPK-OUT-R- SP_OUTR-_AUDIO 42
43 SP_OUTL-_AUDIO
SPK-OUT-L- SP_OUTL-_AUDIO 42
42 SP_OUTL+_AUDIO
SPK-OUT-L+ SP_OUTL+_AUDIO 42
32
MIC2-CAP 13
38 DC DET/EAPD
VREF
19 16 HDA_SDIN0_R R10602 1 2 33_0201_5% HDA_SDIN0
LDO3-CAP SDATA-IN HDA_SDIN0 7
21 17 HDA_SDOUT_AUDIO
LDO2-CAP SDATA-OUT HDA_SDOUT_AUDIO 7
39
LDO1-CAP 25
TABLE MIC HW ENABLE/DISABLE CPVEE

Thermal Pad

1000P_0201_25V7-K

1000P_0201_25V7-K

1000P_0201_25V7-K

1000P_0201_25V7-K
47P_25V_J_NPO_0201

47P_25V_J_NPO_0201
AVSS1

AVSS2

10K_0201_5%
ENABLE DISABLE

1U_0402_6.3V6-K
2.2U_0402_10V6-K
33P_25V_J_NPO_0201_MURATA

33P_25V_J_NPO_0201_MURATA

33P_25V_J_NPO_0201_MURATA

33P_25V_J_NPO_0201_MURATA

ALC3287-CG_MQFN48_6X6

37

22

49
R961 ASM NO ASM
2.2U_0402_10V6-K

2.2U_0402_10V6-K

2.2U_0402_10V6-K

2.2U_0402_10V6-K

2.2U_0402_10V6-K

1
B B
1 1 1 1 1
1 1 1

2 2 2 2 2

2
2 2 2

C122

C127

C117

C243
C9682

C9681

C9683
1 1 1 1 1 1 1 1 1

C9857

R10460
LOGIC
@ @ @
2 2 2 2 2 2 2 2 2
C543

C544
C9686

C9687

C9685

C9684

C9856

C9855

C9490

@ @ @ @

AGND AGND
AGND AGND AGND
DYL@ 1017 C9856 C9855 C543 C544 C9490
follow T490 SIT SCH & X395 change to 2.2uF

+1.8VALW +1.8VA_AUD

+5VS +5VA_AUD +1.8VS R42490 1 @ 2 0_0603_5%


@
1 2 R10203 1 2 0_0603_5%

R10419
10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
0.1U_16V_K_X5R_0201

0.1U_16V_K_X5R_0201

4.7U_0402_6.3V6-M
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.01_0603_LE_1%
2 2 2 2 2 2 2 2
C333

C318

C9141

C2574

C2573

C2571
C30

C2572

@ @

1 1 1 1 1@ 1 1 1
@ @
C36 C2575
1 2 1 2

0.01U_0201_6.3V7-K 0.01U_0201_6.3V7-K
A A

AGND AGND

PLACE UNDER ALC3287

EMC_NS@
C143
1 2 R10082 1 @ 2 0_0402_5%
Security Classification LC Future Center Secret Data Title
0.01U_0201_6.3V7-K
Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO ALC3287-CG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
AGND AGND DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Thursday, March 07, 2019 Sheet 38 of 67
5 4 3 2 1
5 4 3 2 1

NEAR AUDIO CONN


EMC@
FL3
HP_L_JACK_L 1 2
40 HP_L_JACK_L
D MMZ1005Y152CT_2P D

EMC@
FL5
HP_R_JACK_L 1 2
40 HP_R_JACK_L
MMZ1005Y152CT_2P

2 EMC@ 2 EMC@

2
C13 C197
R742 R743 1000P_0201_25V7-K 1000P_0201_25V7-K
220_0201_5% 220_0201_5%
@ @ 1 1

1
AGND AGND

+3VS

WIDE AND SHORT PATTERN


1

@
R10463
10K_0201_5%
2

C C
+3VS_JACK
0.1U_0201_6.3V6-K

1
C9688

@
2

@ JHP1
WIDE PATTERN
3 MIC_RING2
G/M 1 MIC_SLEEVE MIC_RING2 41
L HP_L_JACK_CONN MIC_SLEEVE 41
5 HP_R_JACK_CONN
5 WIDE PATTERN
6 HP_JACK_IN
6 HP_JACK_IN 40,44
2
R
4
M/G
7
MS
2

EMC@

EMC@

EMC@

EMC@

EMC@
D26

D25

D24

D99

D94

ALLTO_C18207-10735-L R42457
0_0201_5%
2

AGND @ 2
1

R139
1

100K_0201_5% C11255
Pin 5 and 6 : Normal Open EMC_NS@
1 0.1U_25V_K_X5R_0201
1

B B
AGND
RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

C162 1 2 1U_6.3V_K_X5R_0201

EMC@

AGND

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 39 of 67
5 4 3 2 1
5 4 3 2 1

+3VS

2
R10465 1 @ 2 0_0201_5%
R10133
100K_0201_5%

1
AGND

R10132
D D
R42460 1 2 0_0201_5% 1 2
HP_JD_SYS 38
200K_0201_1%

R10464

3
HP_JACK_IN 1 2 Q50
39,44 HP_JACK_IN

22K_0201_5% 1 LSK3541G1ET2L_VMT3
@ 2

2
C9689
@
2.2U_0402_6.3V6-K
@
1

AGND AGND

Please place Bottom layer +3VALW


For Audio debug leakage issue +5VALW

C C

1/20W_10K_5%_0201

1/20W_10K_5%_0201
1

1
DBG@

DBG@
R42237

R42238
2

2
Need a GPIO from EC U8401 DBG@
9 1 R4102 1 @ 2 0_0402_5%
44 UART_EN VBUS D- EC_RX 35,44
DBG@ R42239 1 2 0_0201_5% HP_R_JACK_SW 7 10 R4103 1 @ 2 0_0402_5%
39 HP_R_JACK_L D+/R D+ EC_TX 35,44
DBG@ R42240 1 2 0_0201_5% HP_L_JACK_SW 6 5
39 HP_L_JACK_L 8 D-/L VAUDIO 2 HP_R_JACK
DBG@ R42245 1 2 0_0201_5%
HP_R_JACK 38
4 ASEL R 3 DBG@ R42246 1 2 0_0201_5% HP_L_JACK
GND L HP_L_JACK 38
TS5USBA224RSWR_UQFN10_1P8X1P4

HP_R_JACK_L R42241 1 @ 2 0_0201_5% HP_R_JACK_RR R42243 1 @ 2 0_0201_5% HP_R_JACK


HP_L_JACK_L R42242 1 @ 2 0_0201_5% HP_L_JACK_RR R42244 1 @ 2 0_0201_5% HP_L_JACK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO_JACK IN_DEBUG


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 40 of 67
5 4 3 2 1
5 4 3 2 1

MIC2_VREFOR
D D
38 MIC2_VREFOR

2
C1416
1U_6.3V_K_X5R_0201
1

2
R1219
2.2K_0402_5%
AGND

1
Follow A485 Diff from T490
R100961 @ 2 0_0201_5%
MIC2_VREFOL
38 MIC2_VREFOL

2
2
C73 R460
1U_6.3V_M_X5R_0201 2.2K_0402_5%
1

1
AGND
R100971 @ 2 0_0201_5%

C C

MIC_SLEEVE R125 1 @ 2 0_0402_5%


39 MIC_SLEEVE SLEEVE 38

2
2@
R142 C1417
0_0201_5% 1000P_0402_50V7-K
@
1
1

R6 1 @ 2 0_0201_5%

AGND AGND

AGND

R42482 1 @ 2 0_0201_5%
B MIC_RING2 R126 1 @ 2 0_0402_5% B
39 MIC_RING2 RING2 38
R42483 1 @ 2 0_0201_5% DYL@ 1212 for EMC ESD test fail
Remove C91
New add R42482 R42483 R42484 R42485
R42484 1 @ 2 0_0201_5%
2

2@ R42485 1 @ 2 0_0201_5%
R144 C142
0_0201_5% 1000P_0201_25V7-K
@
1 AGND
1

AGND AGND

NEAR EXT MIC CONN

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO EXT MIC I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 41 of 67
5 4 3 2 1
5 4 3 2 1

D D

JSPK1
EMC@ L11 1 2 BLM18PG330SN1D SP_OUTR+ 1
38 SP_OUTR+_AUDIO 1 2 SP_OUTR- 2 1
EMC@ L12 BLM18PG330SN1D
38 SP_OUTR-_AUDIO 1 2 SP_OUTL+ 3 2
EMC@ L13 BLM18PG330SN1D
38 SP_OUTL+_AUDIO 1 2 SP_OUTL- 4 3
EMC@ L14 BLM18PG330SN1D
38 SP_OUTL-_AUDIO 4
5
Follow T490 Diff from A485 6 GND1
@ @ @ @ GND2
C187 C188 C189 C190

220P_50V_K_X7R_0402

220P_50V_K_X7R_0402

220P_50V_K_X7R_0402

220P_50V_K_X7R_0402
HIGHS_WS33040-S0351-HF
@
C166 C168 C169 C175

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K
C C
2 2 2 2 1 1 1 1

1 1 1 1 2 2 2 2

PLACE, NEAR SPEAKER CONNECTOR

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO SPEAKER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 42 of 67
5 4 3 2 1
5 4 3 2 1

D D

PCH_BEEP R11188 1 2 4.7K_0402_5% C9568 1 2 0.1U_16V_K_X5R_0201

BEEP# R11189 1 2 4.7K_0402_5% C9569 1 2 0.1U_16V_K_X5R_0201 BEEP_MIX_ATT_R

R10303 1 2 @ 0_0402_5%
C C

PCH_BEEP D739 @ 2 1 RB521CM-30T2R_VMN2M-2


7 PCH_BEEP
BEEP# D740 @ 2 1 RB521CM-30T2R_VMN2M-2
44 BEEP#

2
@
R220
R10304 1 2 @ 0_0402_5% 0_0201_5%
DYL@ 0918

1
SCS00007L00 to SCS00006V00
For sort out material
BEEP_MIX_ATT
BEEP_MIX_ATT 38

1
+3VALW R10467
@
10K_0201_1%

2
R11190

100K_0402_5%

3
Q38

2
1 LSK3541G1ET2L_VMT3
A. Vth = 1.5V (MAX)

2
3
Q640 B. Id = ? mA (MAX)
EC_MUTE# C. RDSon = 13 ohm(MAX)
44 EC_MUTE# D. Vth in schematic = 3.3V
1 LSK3541G1ET2L_VMT3
A. Vth = 1.5V (MAX)

2
B. Id = ? mA (MAX)
C. RDSon = 13 ohm(MAX)
D. Vth in schematic = 3.3V

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO BEEP


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 43 of 67
5 4 3 2 1
5 4 3 2 1

+3VS
+3VL

Close to EC +3VL Vcc 3.3V +/- 5%


All capacitors close to EC

1
@ 2 1 +VCOREVCC2 RE300
RE300 100K +/- 1%
RE496 APU_THERMTRIP#_R RE328 1 @ 2 0_0402_5% +3VL 1/20W_100K_5%_0201
APU_THERMTRIP# 6 Board ID RE315 V AD_BID typ Phase
100K_0402_5% CE41 0.1U_16V_K_X5R_0201 CE33 CE28 CE35 CE39 CE38 CE42

0.1U_16V_K_X5R_0201

0.1U_16V_K_X5R_0201

0.1U_16V_K_X5R_0201

0.1U_16V_K_X5R_0201

0.1U_16V_K_X5R_0201
2 2 2 2 2 2 0 0K +/- 5% 0 V EVT

2
HDMI_DET_EC Board_ID

0.1U_16V_K_X5R_0201
+3VS @ @
2 1 +VCOREVCC1 +1.8VALW 18K +/- 5%
1 0.503 V FVT

2
DCOVER_SW RE84 1 @ 2 0_0402_5% DCOVER_SW_R CE25 0.1U_16V_K_X5R_0201 1 1 1 1 1 1 RE315
2 47K +/- 5% 1.055V SIT

1
D +3VL_AVCC 1/20W_91K_1%_0201
2 @ RE83 1 @ 2 0_0402_5% 91K +/- 1%
20,21 HDMI_DET
G Q6445
+RTC_33
RE81 1 @ 2 0_0402_5% EC_DCOVER_SW
3 1.577V SVT
7,14 DCOVER_SW

1
L2N7002KWT1G_SOT323-3 RE82 2 @ 1 0_0402_5% 150K +/- 5%
D 3
S
4 1.98V D

E11

F10
L11
H2
K5

K6

B2
E5

E6
87K_R Material Shortage.SVT phase changed.

F5
300K +/- 5%

L6

L5
UE2 minimum trace width 12 mil Need change RE300 and RE315 5 2.475V

VCORE1
VCORE2

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VCC

AVCC
VBAT

VFSPI
P1 R15 EC_WAKE#
24,26 USBC_USB2_BUS_EN# WUI8/GPK0 WUI12/GPK4 AOU_EN EC_WAKE# 7,31,32 +5VS
HOTKEY# R1 R14
47 HOTKEY# APU_THERMTRIP#_R WUI9/GPK1 WUI13/GPK5 PWR_STATUS_LED# AOU_EN 30
R2 GPIO N15
DCOVER_SW_R WUI10/GPK2 WUI14/GPK6 KBD_BL_DTCT# PWR_STATUS_LED# 46 CP_CLK
R3 P15 KBD_BL_DTCT# 47 RE307 1 @ 2 4.7K_0402_5%
WUI11/GPK3 WUI15/GPK7 CP_DATA RE309 1 @ 2 4.7K_0402_5%
KBRST# J5 R6 LOGO_LED#
8 KBRST# KBRST#/GPB6 PWM0/GPA0 AOU_DET# LOGO_LED# 18
SERIRQ H1 P6
8,12 SERIRQ LPC_FRAME# ALERT#/SERIRQ/GPM6 PWM1/GPA1 EC_FAN_PWM AOU_DET# 30
J2 R7 +3VS
8,12 LPC_FRAME# EC_LPC_AD0 ECS#/LFRAME#/GPM5 PWM2/GPA2 KBD_BL_PWM EC_FAN_PWM 49
8,12 LPC_AD0 RE1000 1 @ 2 0_0201_5% L2 P7
KBD_BL_PWM 47
RE1001 1 @ 2 0_0201_5% EC_LPC_AD1 K1 EIO0/LAD0/GPM0 PWM3/GPA3 L7 I2C_CLK_BT0 EC_FAN_PWM RE321 1 @ 2 10K_0402_5%
8,12 LPC_AD1 EC_LPC_AD2 EIO1/LAD1/GPM1 PW M PWM4/SMCK5/GPA4 I2C_DATA_BT0 I2C_CLK_BT0 56 EC_FAN_SPEED
8,12 LPC_AD2 RE1002 1 @ 2 0_0201_5% K2 K7
I2C_DATA_BT0 56 RE318 1 2 10K_0402_5%
RE1003 1 @ 2 0_0201_5% EC_LPC_AD3 J1 EIO2/LAD2/GPM2 PWM5/SMDAT5/GPA5 R8 BEEP#
8,12 LPC_AD3 CLK_PCI_EC EIO3/LAD3/GPM3 PWM6/SSCK/GPA6 BEEP# 43
L1 LPC L8 LEDPWR#
8,12
CLK_PCI_EC ESCK/LPCCLK/GPM4 PWM7/RIG1#/GPA7 OTP_RESET LEDPWR# 18 +3VL
14 WRST# WRST# M2 D1 OTP_RESET 54
EC_SMI# M1 WRST# GPC4 F2 SUSP#
+3VL +3VL_AVCC 7 EC_SMI# EC_RX ECSMI#/GPD4 GPC6 SUSP# 52,64
N1
35,40 EC_RX EC_TX SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7 EC_ON2
LE3 N2 H11 RE303 1 @ 2 47K_0201_5%
+3VL_AVCC 35,40 EC_TX APU_LPC_RST# SOUT0/LPCPD#/GPE6 ADC0/GPI0 M_TEMP DOCK_USB2_BUS_EN# 24,25
1 2 R5 H14
8,12 APU_LPC_RST# EC_SCI# ERST#/LPCRST#/GPD2 ADC1/SMINT0/GPI1 M_TEMP 56 AOU_DET#
8 EC_SCI#
P5 H15 Dock_LAN_WAKE# 32 RE348 1 2 10K_0402_5%
BLM18PG121SN1D_2P G2 ECSCI#/GPD3 ADC2/SMINT1/GPI2 G10 Board_ID
7 BEEP_RESERVED GA20/GPB5 ADC ADC3/SMINT2/GPI3 FAN_ID
1 1 G14

CE32 CE36
IT8186VG-192/BX ADC4/SMINT3/GPI4
ADC5/DCD1#/GPI5
G11
G15
ADP_I
DEVICE_DETECT1#
FAN_ID 49
ADP_I 57
+3VALW
ADC6/DSR1#/GPI6 DEVICE_DETECT1# 36
2
0.1U_16V_K_X5R_02011000P_50V_K_X7R_0201
2 LE4
47 KSI[0..7]
KSI[0..7]
KSI0 K15
VFBGA-144 ADC7/CTS1#/GPI7
F14 PSYS PSYS 57
UART_EN
AOU_DET#
RE4300
RE322
1
1
@
@
2
2
10K_0402_5%
10K_0402_5%
EC_AGND 1 2 KSI1 K14 KSI0/STB# E15 IMVPPOK KBD_BL_DTCT# RE293 1 2 100K_0402_5%
KSI1/AFD# DAC2/TACH0B/SMINT6/GPJ2 IMVPPOK 61 EC_WAKE#
KSI2 K10 D14 MAINPWON MAINPWON 54,58 RE331 1 @ 2 10K_0402_5%
BLM18PG121SN1D_2P KSI3 J15 KSI2/INIT# DAC3/TACH1B/SMINT7/GPJ3 C14 H_PROCHOT#_EC
KSI3/SLIN# DAC DAC4/DCD0#/GPJ4 +3VL
KSI4 J10 D15 ENBKL
+3VL KSI4 DAC5/RIG0#/GPJ5 ENBKL 6
KSI5 J11
KSI6 J14 KSI5 B12 USB_ON1 I2C_CLK_BT0 RP122 1 4 1/16W_10K_5%_4P2R_0404
KSI6 PS2CLK0/TMB0/CEC/GPF0 PBTN_OUT# USB_ON1 30 I2C_DATA_BT0
KSO[0..15] KSI7 H10 A12 2 3
47 KSO[0..15] KSI7 PS2DAT0/TMB1/GPF1 PBTN_OUT# 7,29
1

KSO0 R9 B11 APU_SMB_CK1 DYL@ 0918


KSO0/PD0 SMCLK0/SMINT8/GPF2 APU_SMB_DA1 APU_SMB_CK1 7,32,48 RP122 for FVT costdown
RE296 KSO1 K8 Int. K/B PS2 A11 APU_SMB_DA1 7,32,48
C KSO2 P10 KSO1/PD1 SMDAT0/SMINT9/GPF3 E10 CP_CLK C
R10 KSO2/PD2 Matrix PS2CLK2/SMINT10/PD1CC1/GPF4 A10 CP_DATA CP_CLK 48 LID_SW# 1 2 0.1U_16V_K_X5R_0201
100K_0402_5% KSO3 EMC@
KSO3/PD3 PS2DAT2/SMINT11/PD1CC2/GPF5 CP_DATA 48
KSO4 L9
2

KSO5 K9 KSO4/PD4 B10 PWR_GOOD CE34


KSO5/PD5 GPH3/ID3/YM BATT_CHG_LED# PWR_GOOD 7
WRST# KSO6 P11 A9 BATT_CHG_LED# 46
KSO7 R11 KSO6/PD6 GPH4/ID4/YP B9 BKOFF#
KSO7/PD7 USB Interface GPH5/ID5/DM BKOFF# 18
1 Grug:EC reset connect to a button KSO8 P12 A8 2 1 LCD_SELF_TEST_ON
KSO8/ACK# GPH6/ID6/DP LCD_SELF_TEST_ON 18
KSO9 L10 RE4305 @ 0_0402_5%
CE30 KSO10 P13 KSO9/BUSY B8 EC_SPI_CS1# +3VALW
KSO10/PE FSCE#/GPG3 EC_SPI_SI EC_SPI_CS1# 8
1U_6.3V_M_X5R_0201 KSO11 P14 A7
2 KSO11/ERR# FMOSI/GPG4 EC_SPI_SO EC_SPI_SI 8 APU_SMB_CK1
0_0402_5% KSO12 N14 SPI Flash ROM B7 RE310 2 @ 1 10K_0402_5%
KSO12/SLCT FMISO/GPG5 EC_SPI_CLK EC_SPI_SO 8 APU_SMB_DA1
RE339 2 @ 1 KSO13 M15 A6 RE314 2 @ 1 10K_0402_5%
31 EC_SYSLAN_NET_DET# KSO13 FSCK/GPG7 EC_SPI_CLK 8
KSO14 M14
+3VALW KSO15 L15 KSO14 LCD_SELF_TEST_ON RE4304 1 2 100K_0402_5%
RE338 2 @ 1 0_0402_5% L14 KSO15 B5 ACPRN USBA_RE_EN RE4294 1 @ 2 100K_0402_5%
27 USBA_RE_EN M2_DRV# KSO16/SMOSI/GPC3 GPB0 LID_SW#
RE313 1 2 10K_0402_5% HOTKEY#
56 M2_DRV#
K11 UART B4
LID_SW# 18
KSO17/SMISO/GPC5 GPB1 EC_ON2 RE335 2 @ 1 10K_0402_5%
2 UART_EN
@ RE4301 2 @ 1 10K_0402_5%
CE48 RE326 2 @ 1 0_0402_5% PWRSWITCH#_R A5 B14 +0.9VALW_PWRGD APUPWR_EN RE347 1 @ 2 100K_0402_5%
18,25 PWRSWITCH# PWRSW/GPB3 EGAD/GPE1 EC_ON +0.9VALW_PWRGD 63 IR_FW_FLASH_EN
0.1U_16V_K_X5R_0201 B13 RE4292 2CAM_FW@1 100K_0402_5%
1 EC_SMB_CK1 EGCS#/GPE2 AOU_CTL1 EC_ON 58,63,64,65 KBD_BL_PWM
A4 C15 RE4312 2 @ 1 100K_0402_5%
57 EC_SMB_CK1 EC_SMB_DA1 SMCLK1/GPC1 EGCLK/GPE3 AOU_CTL1 30 +3VL
A3 D4034
57 EC_SMB_DA1 SMDAT1/GPC2 PM_SLP_S5#
24,27 EC_I2C2_SCL
C2 SM Bus E14 7,12 RB751VM-40TE-17_UMD2M2 PM_SLP_S5#
+3VL D2 SMCLK2/PECI/GPF6 SMINT5/GPJ1 F8 EC_MUTE# 1 2
For internal battery. 24,27 EC_I2C2_SDA EC_SMB_CK3 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 PAD_DISABLE 1 2 SPKR_MUTE# 38
6 EC_SMB_CK3
F9 F7 PAD_DISABLE 48
RE294 1 2 10K_0402_5% PWRSWITCH#_R EC_SMB_DA3 E8 CRX1/SIN1/SMCLK3/PD2CC1/GPH1/ID1 SSCE1#/GPG0 E7 APUPWR_EN Grug: APU POWER EN DC
For APU 6 EC_SMB_DA3 CTX1/SOUT1/SMDAT3/PD2CC2/GPH2/ID2 DSR0#/GPG6 APUPWR_EN 61

1
B6 SYSON Grug: DDR POWER EN DC 1.2V 2.5V IMVPPOK CE46 1 2 4700P_25V_K_X7R_0201
GPG1 3V_LAN_EN# SYSON 27,64
E2

100K_0201_5%
Grug: DC control AC and DC
EC_RSMRST# CRX0/GPC0 GSENSE_INT 3V_LAN_EN# 53
E1

RE4296
CTX0/TMA0/GPB2 PM_SLP_S3# GSENSE_INT 50
P2
RI1#/GPD0 SYS_LAN_WAKE# PM_SLP_S3# 7
RE343 2 @ F1
1 0_0402_5% GPIO P4 Please don't place any PU Resistor on GPG[0, 3~7]
SYS_LAN_WAKE# 31

2
60 EC_ON_5V GPE4 RI2#/GPD1
1

F15 INT#_TYPEC LCD_SELF_TEST_ON 1 2 CE47 100P_50V_K_X7R_0201


TACH2/SMINT4/GPJ0 AOU_CTL3 INT#_TYPEC 24 (Reserve hardware strapping)
RE292 13 EC_RTCRST#_ON RE342 2 @ 1 0_0402_5% R13 @ +3VALW
TACH1A/TMA1/GPD7 EC_FAN_SPEED AOU_CTL3 30 EC_ON_5V_PD_R
@ R12
TACH0A/GPD6 EC_SMB_CK4 EC_FAN_SPEED 49
100K_0402_5% P8 P3 EC_SMB_CK4 20,45,50
HDMI_DET_EC RE497 2 1 0_0402_5% P9 GINT/CTS0#/GPD5 L80HLAT/BAO/SMCLK4/GPE0 R4 EC_SMB_DA4
@ 48 LID_CLOSE_EC# GPIO EC_SMB_DA4 20,45,50 For GS, Thermal Sensor @
2

RTS1#/GPE5 L80LLAT/SMDAT4/GPE7

2
EC_RSMRST# E9 RE341 2 @ 1 0_0402_5% 3V_WLAN_EN# RE333 2 1 10K_0402_5%
7 EC_RSMRST# CLKRUN#/GPH0/ID0 WLAN_WAKE# 35,37
RE4295
EC_DASHLAN_NET_DET# 2 @ 1 0_0402_5% A13 @2 RE340 1 0_0402_5% 3V_LAN_EN# RE332 2 1 10K_0402_5% @
B 32 EC_DASHLAN_NET_DET# ADC13/GPL0 EC_ON2 63,65 B
A14 HP_JACK_IN 39,40 10K_0402_5%
RE4311 AC_PRESENT G1 ADC14/GPL1 A15 EC_ON_5V_PD_R RE4297 2 @ 1 0_0402_5% SYS_LAN_WAKE# RE346 2 @ 1 10K_0402_5%
7 AC_PRESENT CLOCK EC_ON_5V_PD 59

1
CK32K/GPJ6 ADC15/GPL2 B15 UART_EN
ADC16/GPL3 UART_EN 40 DOCK_RJ45_DET#_EC
B3 A2 DOCKLAN_ON 32 @ RE4307 2 @ 1 10K_0402_5%
NC GPL4 A1 @ 2 RE4299 10_0402_5% RE4298
GPL5 TP4_RESET EC_PD_RST 24 EC_ON
B1 2 0_0402_5%1
GPL6 TP4_RESET 47,48
C1 2 1 3V_WLAN_EN#
GPL7 3V_WLAN_EN# 53

AVSS
@ RE4308 0_0402_5%
VSS1

G6 VSS2
J6 VSS3
H5 VSS4
H6 VSS5
+3VALW VSS6 @ +3VL +3VL +3VL
DOCK_RJ45_DET#_EC 2 RE4306 1
DOCK_RJ45_DET# 7,25
RP7 IT8186VG-192-BX_VFBGA144 0_0402_5%
F6

G5

F11

1
1 8 KSO1
*

1
2 7 KSO2 RE304 RE311
3 6 FAN_ID For Mirror Code

100K_0201_5%
1/20W_22K_5%_0201
EC_AGND IR_FW_FLASH_EN
"H" --> Enable

RE345
4 5 RE4310 2 @ 1 100K_0402_5%
IR_FW_FLASH_EN 18
+5VALW
"L" --> Disable (Default)

2
10K_0804_8P4R_5% 0_0402_5%

2
EC_MUTE# EC_ON EC_ON_5V
USB_ON1 43 EC_MUTE#
RE337 1 2 10K_0402_5%
AC IN

1
+3VL

2
RE317
+3VS ACPRN RE25 1 2 100K_0402_5% @ RE291 RE344
RE26 1 @ 2 0_0402_5% 100K_0402_5% @ @
ACIN 57
2.2K_0404_4P2R_5% 10K_0402_5% 10K_0402_5%

2
1 4 EC_SMB_CK4 DE1 22 11 @ RB751VM-40TE-17_UMD2M2

1
+3VALW 2 3 EC_SMB_DA4

RPC57
EC_I2C2_SCL
1 2 CE14 100P_50V_K_X7R_0201 SYSON, SUSP#
+3VL RE290 1 @ 2 2.2K_0201_5% RE324 1 @ 2 0_0402_5%
EC_I2C2_SDA 57,61 VR_HOT# APU_PROCHOT# 6
RE299 1 @ 2 2.2K_0201_5%

2
RP117 1 4 1/16W_10K_5%_4P2R_0404 EC_SMB_CK1 H_PROCHOT#_EC RE325 1 @ 2 0_0402_5% 1 SUSP# RE306 1 2 1K_0402_5%
2 3 EC_SMB_DA1
DYL@ 0918 RE323 CE43
RP117 for FVT costdown 100_0402_5% 47P_0201_25V8-J
@ 2 EMC_NS@ SYSON RE302 1 2 100K_0402_5%

1 1
+3VALW @
@ For ESD D CE29 2 10.1U_16V_K_X5R_0201
CE27 1 2 220P_50V_K_X7R_0402 APU_LPC_RST# H_PROCHOT#_EC 2 @
A A
1

@
EC_RSMRST#
G QE3 For EMC
RE336 L2N7002KWT1G_SOT323-3
@ For 10P_0402_50V8-J
EMI RE305 1/20W_10K_5%_0201 S

3
CE26 1 2 1 @ 2 CLK_PCI_EC
1

D
2

10_0402_5% 2 @
@ G QE5
CE31 2 1 100P_50V_J_NPO_0201 M_TEMP L2N7002KWT1G_SOT323-3
2
1

D S A. Vth = 1.5V (MAX)


3

5M_3M_PWRG 2 CE45 B. Id = ? mA (MAX)


58,59,60 5M_3M_PWRG C. RDSon = 13 ohm(MAX)
@ G 0.1U_0201_16V6-K Title
CE44 2 1 100P_50V_J_NPO_0201 APU_THERMTRIP# @ QE4 1 D. Vth in schematic = 3.3V Security Classification LC Future Center Secret Data
@
L2N7002KWT1G_SOT323-3 S
EC_IT8186E/FX
Issued Date 2015/11/02 Deciphered Date 2015/8/10
3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Thursday, March 07, 2019 Sheet 44 of 67
5 4 3 2 1
5 4 3 2 1

Thermal Sensor
placed nearby SO-DIMM
THU1
+3VS R11005
0_0402_5%
1 @ 2 +3VS_THM1 10 R11016 1 @ 2 0_0402_5%
VCC SCL EC_SMB_CK4 20,44,50
D REMOTE1+ 2 9 R11015 1 @ 2 0_0402_5% D
DP1 SDA EC_SMB_DA4 20,44,50
1
REMOTE1- 3 8
C126 DN1 ALERT#
REMOTE2+ 4 7 F75303M_THERM# R202 1 @ 2 10K_0402_5%
2 0.1U_6.3V_K_X7R_0402 DP2 THERM# +3VS
REMOTE2- 5 6
DN2 GND

F75303M_MSOP10

Address 1001_101xb
Internal pull up 1.2K to 1.5V
R for init i al t her mal s hut do wn t e mp

C C

Close to THU1
REMOTE1+ REMOTE2+

1 1
C10057 C128
2200P_25V_K_X7R_0201 2200P_25V_K_X7R_0201
2 2

REMOTE1- REMOTE2-

B B

KevinH: Manaul update PN to MMBT3904TT1G


REMOTE2+/-:
Close CHARGER Trace width/space:10/10 mil
Close to FIN Trace length:<8"
REMOTE2+ REMOTE1+

1
1

1
@ C C
1
C130 2 Q14 @ 2 Q13
B
100P_50V_J_NPO_0201 S TR TTC4116FU NPN SC-70-3 C129 B S TR TTC4116FU NPN SC-70-3
2 E SB00001LC00 E SB00001LC00
100P_50V_J_NPO_0201
3

2
REMOTE2- REMOTE1-

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date THERMAL SENSOR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 45 of 67
5 4 3 2 1
5 4 3 2 1

D D

DYL@ SVT 190307 LED1


For the brightness test issue --- Kevin.P
Drop main source SC50000GS00,
2nd source SC50000H800 change to main source.
Only change PN and value, CIS Library has problem.

A1 Pin : ORANGE
A2 Pin : WHITE

C C
LED1
+3VALW +5VALW BATT_CHG_LED# R11086 1 2 1/16W_39.2_1%_0402BATT_CHG_LED#_R 1 + - 4
44 BATT_CHG_LED# ORG

R11088 1 @ 2 0_0402_5% R11087 1 2 1/16W_68_5%_0402 PWR_STATUS_LED#_R 2 + - 3 PWR_STATUS_LED#_M


WHI
LTW-C195DSKF-LC 1.6X1.5 ORANGE/WHI
R11089 1 @ 2 0_0402_5%
2 2
C10126 C10127
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K
@ @
1 1

1
Q6245 D
PWR_STATUS_LED# 2
44 PWR_STATUS_LED# G

S L2N7002KWT1G_SOT323-3

3
2
B B
R41134
100K_0402_5%

1
A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date CHARGE LED

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Thursday, March 07, 2019 Sheet 46 of 67
5 4 3 2 1
5 4 3 2 1

KB_LED_CAPSLOCK# HOTKEY#
KB_LED_FNLOCK# KB_LED_MUTE# KB_LED_MICMUTE#

2 2
+3VALW +3VS +3VALW 2 2 2 0.1U_6.3V_K_X5R_0201_MURATA 0.1U_6.3V_K_X5R_0201_MURATA
0.1U_6.3V_K_X5R_0201_MURATA 0.1U_6.3V_K_X5R_0201_MURATA 0.1U_6.3V_K_X5R_0201_MURATA C10124 C10125
C568 C10122 C10123 EMC@ EMC@
EMC@ EMC@ EMC@ 1 1
1 1 1

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

2
@ F25
F7504 0.5A_32V_ERBRD0R50X
D 0.5A_32V_ERBRD0R50X 1026@ DYL follow T490 EMC@ change to EMC_CD@ D
1212@ DYL follow EMC test result
EMC_CD@ change to EMC@

1
2

2
1
C2582

1
0.1U_0201_6.3V6-K
+3VS_TP +3VS_TP +5VS +3VS +5VS
2

R8985

R8986

R8987

R8988

R8989

R8990

R8991

R8992
40 42
@ @ @ @ @ @ @ @ 39 40 GND2 41
38 39 GND1
37 38
36 37
TP4MIDDLE 35 36
TP4RIGHT 34 35
R2450 TP4LEFT 33 34 @
1/20W_100_5%_0201 32 33 R324 @ C9145 C296
32

2
KB_LED_CAPSLOCK# 1 2 KB_LED_CAPSLOCK#_R 31 RP112 F42 F13 F23
31 2 2

4
3

2
30
30

1/16W_4.7K_5%_4P2R_0404
HOTKEY# 29
44 HOTKEY# KB_LED_MICMUTE# 2 1/20W_100_5%_0201 KB_LED_MICMUTE#_R 29
R8810 1 28

1A_32V_ERBRD1R00X

1A_32V_ERBRD1R00X

1A_32V_ERBRD1R00X
DYL@ 0918

0.01U_0201_6.3V7-K

0.01U_0201_6.3V7-K
KB_LED_MUTE# R8811 1 2 1/20W_100_5%_0201 KB_LED_MUTE#_R 27 28 RP112 for FVT costdown 1 1

10K_0201_5%
KB_LED_FNLOCK# R8812 1 2 1/20W_100_5%_0201 KB_LED_FNLOCK#_R 26 27

1
2

1
+3VALW_KBD 25 26
KSO11 24 25
44 KSO[15:0] 23 24
KSO8
KSO10 22 23
C KSO12 21 22 C
DYL@ 1017 R8810 R8811 follow T490 SIT SCH KSO9 20 21
from 560 to 100 KSO13 19 20 +3VS_TP JTP2
Follow E-series KB back light series resistor
KSO15 18 19 12 14
KSO5 17 18 KBD_BL_DTCT# 11 12 GND2 13
KSO7 16 17 44 KBD_BL_DTCT# KBD_BL_PWM 10 11 GND1
15 16 44 KBD_BL_PWM +5VS_TP 9 10
KSO6
KSO3 14 15 TP4CLK R510 2 @ 1 0_0201_5% 8 9
44 KSI[7:0] 13 14 48 TP4CLK 7 8
KSO1
KSI5 12 13 TP4LEFT 6 7
KSO2 11 12 TP4RIGHT 5 6
KSO4 10 11 TP4MIDDLE 4 5
KSI0 9 10 TP4_RESET 3 4
8 9 44,48 TP4_RESET 3
KSI2 TP4DATA R511 2 @ 1 0_0201_5% 2
7 8 48 TP4DATA +3VS_TP 1 2
KSO0
KSI1 6 7 1
KSI4 5 6 HIGHS_FC1AF121-1151H
KSO14 4 5 @
KSI6 3 4
KSI7 2 3
KSI3 1 2
1 KBD_BL_DTCT# 1 2 2
TP4CLK TP4DATA C8308 C8285 C8286
JKBL2 220P_0201_25V7-K 22U_0603_6.3V6-M 22U_0603_6.3V6-M
HIGHS_FC5AF401-3181H 2 1 1
+3VALW_KBD
@ 2 2 2
+3VALW_KBD C565 C566 C567
220P_0201_25V7-K 10P_0201_25V8-J 10P_0201_25V8-J
1

EMC_CD@ EMC_CD@ EMC_CD@

1
R11203 1 1 1
R11205
@ 10K_0201_5% @
R11221 R11223 10K_0201_5%
2

B 0_0402_5% 0_0402_5% B
2

1 2 KB_LED_CAPSLOCK# 1 2 KB_LED_MICMUTE#
1026@ DYL follow T490 EMC@ change to EMC_CD@
3

LED_CAPSLOCK#
7 LED_CAPSLOCK#
6

D2
1

R11202 1 5
D1

7 LED_MICMUTE# G2
@ 2 Q641B
G1
1

100K_0402_5% C116 NTJD5121NT1G_SC88-6


S2

1
100P_50V_J_NPO_0201 Q641A R11204 @
S1

2 NTJD5121NT1G_SC88-6 100K_0402_5% C11154


2

100P_50V_J_NPO_0201
1

2
2

+3VALW_KBD +3VALW_KBD
1

R11226 R11233
@ @ 10K_0201_5%
R11225 10K_0201_5% R11232
0_0402_5% 0_0402_5%
2

1 2 KB_LED_MUTE# 1 2 KB_LED_FNLOCK#
6

A A
D1

D2

7 LED_MUTE#
2 5
G1 7 LED_FNLOCK# G2
1

R11224 1
1

@ Q642B
S1

S2

1
100K_0402_5% C11155 Q642A R11231 @ NTJD5121NT1G_SC88-6
100P_50V_J_NPO_0201 NTJD5121NT1G_SC88-6 100K_0402_5% C11160
1

2
100P_50V_J_NPO_0201
2

2
Security Classification LC Future Center Secret Data Title
2

Issued Date 2015/11/02 Deciphered Date 2015/8/10 KEYBOARD/TRACK POINT


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 47 of 67
5 4 3 2 1

C
5 4 3 2 1

+3VS +3VS

+3VS

2
R11209 R11330 +3VS APU_SCL1_TP APU_SDA1_TP
100K_0402_5% 100K_0402_5%

1
F15

1
D82 D81

1
@

0.5A_32V_ERBRD0R50X
EMC@ EMC@
LID_CLOSE_EC# TP4_RESET_CP
RP110

4
3

1
2

1/16W_4.7K_5%_4P2R_0404

2
D R11210 R11331 DYL@ 0918 D
RP110 for FVT costdown UCLAMP3301H.TCT_SOD523-2 UCLAMP3301H.TCT_SOD523-2
100K_0402_5% 100K_0402_5%

2
1
2
1

1
@ @

CP_CLK CP_DATA TP4CLK TP4DATA

D83

1
D84 D85 D86

PESD5V0H1BSF_SOD962-2

1
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
1

1
T490 LID_CLOSE_EC# net has a diode. D8909 JCP1@
T490 JCP1 CONN pin2 net ： NFC_ACTIVE 12 14
APU_SCL1 APU_SCL1_TP 12 GND2

2
R11198 1 @ 2 0_0201_5% 11 13
11 GND1

2
10

2
TP4DATA 9 10

2
47 TP4DATA 8 9
TP4CLK
47 TP4CLK APU_SDA1 APU_SDA1_TP 8
R11197 1 @ 2 0_0201_5% 7
+3VS_PAD 7

EMC@
6
LID_CLOSE_EC# R42473 1 6

EMC@

EMC@

EMC@
@ 2 0_0201_5% 5
44 LID_CLOSE_EC# CP_CLK 4 5
44 CP_CLK CP_DATA 3 4
44 CP_DATA TP4_RESET TP4_RESET_CP 3
R11211 1 @ 2 0_0402_5% 2
44,47 TP4_RESET PAD_DISABLE 1 2
44 PAD_DISABLE 1
HIGHS_FC5AF121-2131H
1
EMC_NS@
1 2 C11259
D8907 RB521CM-30T2R_VMN2M 1U_6.3V_M_X5R_0201 +5VS
2
@
1217@ DYL
C11259 follow T490,only reserve
C C

2
F43
1A_32V_ERBRD1R00X
+3VS R41136 1 @ 2 0_0402_5%

1
JSC1
FL8902 +5VS_SC 1
USBP2+_CONN 4 3 USBP2+ USBP2-_CONN 2 1
1/20W_200K_5%_0201

4 3 USBP2+ 19 USBP2+_CONN 3 2
3
1

4
3

SC_DTCT# 4
USBP2-_CONN 1 2 7 SC_DTCT# 5 4
R41223

RP111 USBP2-
+3VALW_APU 1 2 USBP2- 19 6 5
1/16W_2.2K_5%_4P2R_0404 6

0.1U_6.3V_K_X5R_0201_MURATA
EXC24CH900U_4P
DYL@ 0918
EMC_NS@ 7
2

1
2

RP111 for FVT costdown R41137 1 @ 2 0_0402_5% 8 GND1


U4103 C569 GND2
2 2
1 8 EMC@ C2542 HIGHS_FC5AF061-2131H
2 GND EN 7 N4108 0.1U_0201_6.3V6-K
APU_SMB_CK1 3 VREF1 VREF2 6 APU_SCL1 PLACE NEAR JSC1 @
7,32,44 APU_SMB_CK1 APU_SMB_DA1 4 SCL1 SCL2 5 APU_SDA1 1 1
7,32,44 APU_SMB_DA1 SDA1 SDA2
PCA9306DQER_X2SON8P_1P4x1

1
C4101
100P_50V_K_X7R_0201
2

Follow T490 I2C bus switch IC


+3VS
B B

2
F8

0.5A_32V_ERBRD0R50X
1
JFPR1
1
2 1
3 2
4 3
5 4
USBP8+_CONN 6 5
USBP8-_CONN 7 6
+3VS_FPR 8 7
8

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
9
10 GND1
GND2

1
HIGHS_FC5AF081-2121H

1
@

2
C208 R800 1 @ 2 0_0402_5%

EMC@

EMC@
D291

D292
2.2U_0402_6.3V6-K
1

2
FL8901 EMC_NS@
USBP8+ 4 3 USBP8+_CONN

2
19 USBP8+ 4 3

USBP8- 1 2 USBP8-_CONN
19 USBP8- 1 2
A PLACE NEAR JFPR1 EXC24CH900U_4P
A

R799 1 @ 2 0_0402_5%
TABLE of U183/U184
Vendor P/N LCFC P/N
PLACE NEAR JFPR1
TI SN74LVC1G66DCK SA00005BE0J
NXP 74LVC1G66GW SA00007KS00
ONSemi MC74VHC1G66DFT2G SA00008JQ00 Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 TOUCH PAD/FPR/SCR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 48 of 67
5 4 3 2 1
5 4 3 2 1

D D

+5VS

FAN CURRENT
IS 0.5A MAX

FUSE 2.0A

2
F4
2A_32V_ERBRD2R00X

1
JFAN1
+5VS_FAN 1
EC_FAN_PWM 2 1
44 EC_FAN_PWM 3 2
4 3
5 4
5
C 6 C
7 GND1
GND2
HIGHS_WS33050-S0351-HF
@

FAN_ID
FAN_ID 44

EC_FAN_SPEED
EC_FAN_SPEED 44

FAN_ID

2
0.1U_6.3V_K_X5R_0201_MURATA
C570
EMC@
1

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 FAN CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 49 of 67
5 4 3 2 1
5 4 3 2 1

D D

+3V_Gsenor
+3VS

4.7K_0402_5%

4.7K_0402_5%
1

1
RG1

RG2
@ @

2
G1

2
+3VS +3VALW +3V_Gsenor 1 6 EC_SMB_CK4_Gsensor
20,44,45 EC_SMB_CK4 S1 D1

NTJD5121NT1G_SC88-6
@ @ Q6451A
R42256 1 2 0_0402_5%

R11218 1 @ 2 0_0402_5%

5
R42257 1 @ 2 0_0402_5%

G2
4 3 EC_SMB_DA4_Gsensor
20,44,45 EC_SMB_DA4 S2 D2

NTJD5121NT1G_SC88-6
@ Q6451B
+3V_Gsenor
@
C R2421 1 2 0_0201_5% ADDR_SEL R2420 1 2 0_0201_5% R11217 1 @ 2 0_0402_5% C

+3V_Gsenor

ST suggest

10U_0402_6.3V6-M
@

0.1U_6.3V_K_X5R_0201

0.1U_6.3V_K_X5R_0201
+3V_Gsenor 2 1 1

C2551
@

C2550

C11209
R42255
0_0402_5% 1 2 2

2
Follow T490
R11208

1
10K_0201_5%

1
@

TABLE U148
ADDR_SEL 1 12 EC_SMB_CK4_Gsensor
EC_SMB_DA4_Gsensor 2 SDO/SA0 SCL/SPC 11
P/N ADDR_SEL Address 3 SDA/SDI/SDO NC 10 GSENSE_CS
4 VDD_IO CS 9
GSENSE_INT 5 RES GND_2 8
44 GSENSE_INT 1 Test_Point_40MIL 6 INT1 GND_1 7
H 32h (W) & 33h (R) TP151
@ INT2 VDD
LIS2DWLTR
L 30h (W) & 31h (R) LIS2DW LTR_LGA12_2X2
@

H 3Eh (W) & 3Fh (R)


KX022-1020
B L 3Ch (W) & 3Dh (R) B

TABLE of G-Sensor (U148)


Vendor P/N LCFC P/N
ST LIS2DWLTR SA00009AQ00
Kionix KX022-1020 SA000081E00

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 APS G-SENSOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 50 of 67
5 4 3 2 1
5 4 3 2 1

+1.8VALW +1.8VS +1.8V_TPM

R11156 1 @ 2 0_0402_5%

R11155 1 @ 2 0_0402_5%
+1.8VS +1.8V_TPM

1
R42285 R42284
TPM@ TPM@
10K_0402_5% 10K_0402_5%
D
NOTE: D

2
D6042
TPM_SPI_PIRQ#
8 PCH_SPI_PIRQ#
2 1 Check timing sequence in SDV phase.
TPM@ +3VALW
RB751VM-40TE-17_UMD2M2
SCS00008K00 5 ms < t

1
@ NOTE:
R810 1) It is recommended to connect the TPM to the system's
1 2 SPI_CS_R# standby voltage to improve performance.
8 SPI_CS#_TPM 0_5%_0603 2) SPI_RST# must be asserted for at least 5 msec after
+1.8V_TPM 0 < t VSB power-up.
D750 VSB 3) VSB may come up anytime before VDD power-up,

2
@ +3VALW_TPM but not after VDD power-up.
CUS357 4) SPI_RST# may be asserted together with VDD power
1 negation, but should not at any point exceed 0.5V
1 1 1 1 TPM@ VDD above the VDD power level.
R10317 1 @ 2 0_0201_5% TPM@ @ TPM@ TPM@ C811 1 ms < t
C10052 C808 C809 C810 10U_6.3V_M_X5R_0402
10U_6.3V_M_X5R_0402 0.1U_6.3V_K_X5R_0201 0.1U_6.3V_K_X5R_0201 0.1U_6.3V_K_X5R_0201 2
2 2 2 2
SPI_RST#

22

1
UTPM1 @

VSB
VHIO2

VHIO1
TPM_SPI_PIRQ# 18 2
PIRQ#/GPIO2 NC1 3
NC2 4
PCH_SPI_D0 R10318 1 @ 2 0_0201_5% SPI_SI_R 21 PP/GPIO6 5
8 PCH_SPI_D0 PCH_SPI_D1 SPI_SO_R MOSI/GPIO7 NC3
R292 1 @ 2 0_0201_5% 24 9
8 PCH_SPI_D1 MISO NC5 10
NC6 11
TABLE
NC7 12
SPI_CS_R# 20 NC8 13
SCS#/GPIO5 GPIO4 14
Pin TCG Nuvoton ST Micro
PCH_SPI_CLK R10139 1 @ 2 0_0402_5% SPI_CLK_R 19 NC9 15 No
8 PCH_SPI_CLK SCLK NC10 16
PTP Spec (v38) NPCT750LABYX ST33HTPH2E32AHC0
NPCT750LABYX_QFN32_5X5
TPM_PLT_RST# 17 GND1 25
+1.8V_TPM PLTRST# NC11 26
6 NC12 27
1 VDD VSB NC
C GPIO3 NC13 28 2 GND NC GND C
NC14
1

7 31 3 NC NC NC
NC4 NC15
R295
NC16
32 4 GPIO GPIO/PP PP
TPM@ 5
10K_0402_5% 29 NC NC NC
SDA/GPIo0 30 6 GPIO GPIO3 NC
2

D264 SCL/GPIO1 7 NC

GND2

GND3
TPM_PLT_RST#
GPIO GPIO
1 2 8 VHIO
7,19,29,31,32,35,36,37 PLT_RST# VDD NC
TPM@

23

33
RB751VM-40TE-17_UMD2M2
SCS00008K00
9 NC NC NC
10 NC NC NC
11 NC NC NC
12 NC NC NC
13 GPIO GPIO4 NC
14 NC NC NC
15 NC NC NC
16 GND GND NC
TABLE of TPM (U9801)
Vendor P/N LCFC P/N
17 SPI_RST# RST# SPI_RST#
Nuvoton NPCT750LABYX SA00008KS10 Import Nuvoton on EVT 18 SPI_PIRQ# PIRQ#/GPIO2 SPI_PIRQ#
19 SPI_CLK SCLK SPI_CLK
ST Micro ST33HTPH2E32AHC0 SA000089E20 20 SPI_CS# SCS#/GPIO5 SPI_CS#
21 MOSI MOSI/GPIO7 MOSI
22 VDD VHIO VPS
23 GND GND NC
24 MISO MISO MISO

B B

25 NC NC NC
26 NC NC NC
27 NC NC NC
28 NC NC NC
29 SDA/GPIO1 SDA/GPIO1 NC
30 SDA/GPIO0 SDA/GPIO0 NC
31 NC NC NC
32 NC NC NC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 DISCRETE TPM 2.0


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 51 of 67
5 4 3 2 1
5 4 3 2 1

+5VALW +5VS

+3VALW +3VS

+5VALW +5VALW +5VALW

1 1 1
@ @ @
C11163 C11164 C11165
0.047U_10V_K_X5R_0201 0.047U_10V_K_X5R_0201 0.047U_10V_K_X5R_0201
Q281 2 2 2
D Q280 FDMA8878_MICROFET-2X2-6-8 D
FDMA8878_MICROFET-2X2-6-8

4
B+ +5VALW

4
Check

1
2 R955 @
0.1U_25V_K_X5R_0402 300K_0402_1% R208
C361 1K_0402_5% +3VALW +5VALW

2
@

2
1 C11161
SUSP 9V-->5.1V
20 SUSP
1 2

1
2 13V-->7.4V

3
0.1U_25V_K_X5R_0402 R11008

3
C37 402K_0402_1% 0.1U_0201_6.3V6-K
@ @

2
@ 1
2

2
2
@ 0.1U_25V_K_X5R_0402 R42252 +5VALW
2
0.1U_25V_K_X5R_0402 R42251 C11222 0_0402_5%
C11221 C11162
0_0402_5% @

1
@ 1 Q16 D 1 2

1
1 2
44,64 SUSP#

1
G
0.1U_0201_6.3V6-K
B+ S L2N7002KWT1G_SOT323-3 @ DYL@ 0918 for FVT costdown
B+

3
150K_0402_5% R11122 2 @ 1 150K_0402_5% 5VS_ON
2 R42247 1 3VS_ON

1
Q633 D @
1

D SUSP 2 R42249 1
SUSP 2 R42248 1 G 1M_0402_5% @
G 1/16W_2M_5%_0402 C38
C39 @ S 0.01U_0201_25V6-K

2
Q6449 S 0.022U_25V_K_X7R_0402 L2N7002KWT1G_SOT323-3 2
3

L2N7002KWT1G_SOT323-3 2
C DYL@ 0918 for FVT costdown C

DYL@ 1017 R42248 change from 1M to 2M


Follow X395
3VS_ON R42250 1 @ 2 0_0402_5% 5VS_ON

SB000013Q00，
SB00001B300 AON7400 +1.8VS +1.8VALW to +1.8VS 2A request
+0.9VALW_VDDP to +VDDP 10A request

1
@
R42293
B+ 9V--13.6V +0.9VS
0_1%_0603_LE Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V
Rds(on) >= 7.5mohm
+1.8VALW
+/- 1.5%

2
Q28
Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V AON6414AL_DFN8-5
Rds(on) >= 7.5mohm
+0.9VALW 1 1 1
Q25
+/- 1.5% AON6324_DFN8-5
1
@ 5
2
3 C314 C10063
C10061 10U_6.3V_M_X5R_0402 1U_6.3V_K_X5R_0201
1 10U_6.3V_M_X5R_0402 2 2
2 1 1
1 2 1 C10062

4
@ 5 3 1 @ C312 @
C305 C10060 0.1U_0201_6.3V6-K 0.01U_0201_25V6-K
10U_6.3V_M_X5R_0402 C222 2 2
1U_6.3V_K_X5R_0201
2 1
1 10U_6.3V_M_X5R_0402 2 B+
4

@ C306 C10058 2 R320


0.1U_0201_6.3V6-K @ +3VS +5VS 1/16W_510K_5%_0402
2 0.01U_0201_25V6-K 1.8VS_GATE_RR318 1 @ 2 0_0402_5% 1.8VS_GATE 1 2
B 2 1.8VS_GATE B

1
DYL@ 0829 Q25 change from SB00000Q40J to SB00001H100 D
TOSHIBA ECSL change to C2 1
R312 C316 R322 2 SUSP
DYL@ 0905 Q25 SB00001H100 Vgs can't meet spec, 0.9VS_GATE_R 1 @ 2 0_0402_5% 1M_0402_5% G
can't use. change to SB00000Q40J
1

1
DYL@ 1221 Vgs divider resistance has been changed 0.01U_0201_25V6-K
change to SB00001H100 R41123 R41135 2 S
1

3
1 1/10W_470_5%_0603 1/10W_470_5%_0603 Q29
R314
C10059 L2N7002KWT1G_SOT323-3
820K_0402_5%
2

0.01U_0201_25V6-K 2
2
2

@
1

Q6244 D Q6248 D
SUSP 2 SUSP 2
G G

S L2N7002KWT1G_SOT323-3 S L2N7002KWT1G_SOT323-3
3

DYL@ 0904
Q28 Q291 Q293 Q632 Part number&Part description change
Follow 0904 mail requirement
SB00000ZS00 to SB00001NY00
DYL@ 0710 change
+1.8VS

+0.9VS

+0.6VS
For DisCharge
1

R954
1

1/10W_470_5%_0603
R209 R953
1/10W_470_5%_0603 1/10W_470_5%_0603
2

A A
2

D
@ @ SUSP 2
@
1

Q166 D G Q637
@ SUSP 2 L2N7002KWT1G_SOT323-3
1

D Q17 G S
3

2 SUSP
G S L2N7002KWT1G_SOT323-3
3

L2N7002KWT1G_SOT323-3 S
3

Security Classification LC Future Center Secret Data Title

Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SWITCH1


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 52 of 67
5 4 3 2 1
5 4 3 2 1

R11020
3V_WLAN_EN# 1 20_0402_5% 3V_WLAN_EN_R#
44 3V_WLAN_EN#
@ 1
@
C10073
0.1U_16V_K_X5R_0201
2

3V_LAN_EN# R11021 1 @ 2 0_0402_5% 3V_LAN_EN_R#


D D
44 3V_LAN_EN#
1
@
C10070
0.1U_16V_K_X5R_0201
2

+3VS_WLAN +3VALW1_LAN

1
R41231 R41232
1/10W_470_5%_0603 1/10W_470_5%_0603

2
@

1
D D
3V_WLAN_EN_R# 2 3V_LAN_EN_R# 2
G @ G
Q6447
+3VS to +3VS_WLAN S L2N7002KWT1G_SOT323-3 Q6448 S +3VALW1_LAN

3
L2N7002KWT1G_SOT323-3

J602 need to be mounted

1
@

C
B+ 9V--13.6V R42296
C
0_1%_0603_LE
EVT mounte PJ8053
DYL@ 0726 change

2
+3VALW
+3VS +3VS_WLAN
@ R12098 1 @ 2 0_0603_5%
J602 1 2 JUMP_43X39 Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V
1 2
Rds(on) >= 7.5mohm
+3VALW
1 1 +/- 1.5% Q293
@ C10094 C10087 AON6414AL_DFN8-5
J603 1 2 JUMP_43X39 10U_6.3V_M_X5R_0402
1 2 2 2 1U_6.3V_K_X5R_0201 1
Q291 1 1
+/- 1.5% AON6414AL_DFN8-5
1
@ 5
2
3 C10095 C10091
C10093 10U_6.3V_M_X5R_0402 1U_6.3V_K_X5R_0201
1 10U_6.3V_M_X5R_0402 2 2
2 1 1
1 2 Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V C10088

4
@ 5 3 Rds(on) >= 7.5mohm @ C10090 @
C10092 0.1U_0201_6.3V6-K 0.01U_0201_25V6-K
10U_6.3V_M_X5R_0402 2 2
2 1
1
B+
4

@ C10084 C10085 R11058


@
0.1U_0201_6.3V6-K @ 1/16W_510K_5%_0402
2 0.01U_0201_25V6-K R11057 1 @ 2 0_0402_5% 1 2
2

1
D
B+ C10089
1
R11059 2 3V_LAN_EN_R#
1/16W_2M_5%_0402 G
0.01U_0201_25V6-K
R11060 1 2 0_0402_5% 150K_0402_5% 1 @ 2 R11061 2 S Q292

3
L2N7002KWT1G_SOT323-3
@
1

1 D
C10096 R11062 2 3V_WLAN_EN_R#
1M_0402_5% G
0.01U_0201_25V6-K
2 S
2

B @ B
@
@
Q294
L2N7002KWT1G_SOT323-3

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SWITCH2


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 53 of 67
5 4 3 2 1
5 4 3 2 1

540_0402NEW_30%_PRF15BB541NB6RC
25~100Degree
0.54@25 Degree
1.2*0.54*k@85Degree
2*0.54 k@100 Degree
20*0.54 k@120Degree
100*0.54 k@130Degree
350*0.54 k@140Degree
Vbattrey min =9V,Vbattery max =12.6V
Vthreshold min=0.65V,Vthreshold min=0.85V,
D
TotalR ( PTC)*(VBatt-1.25)/(TotalR ( PTC)+750)=0.65V D

TotalR ( PTC)max=59.8K~==110 times 0.54 k


TotalR ( PTC)min=43.72K~==80times 0.54 k PD1
PF5
Normal run 3Dmark 1 2 1 2
M-BAT-PWR
the max T maybe 85 Degree 1SS355VMTE-17
0.5A_32V_ERBRD0R50X

the total R PTC= 1.2*0.54*10=12*0.54 k


PD3
if only one PTC over 130 degree, 1 2 1
PF10
2
VINT20_IN
the total PTC is 100*0.54K+11*0.54k,>80*0.54K MAINPWON is open Drain output , 0.5A_32V_ERBRD0R50X
1SS355VMTE-17
and over the min Vthreshold,and active the OTP So need pull high voltage level
remove the Pull high signal to 3/5V page
PD4
if only one PTC over 140 degree, PR789
0_0201_5%
1SS355VMTE-17 PR793
100K_0201_1%
PR788
10K_0201_1%
PD5
PF11
2 1 2 1 2 1 1 2 1 2 1 2
the total PTC is 350*0.54K>>80*0.54K 44,58 MAINPW ON B+
0.5A_32V_ERBRD0R50X
,can over the min Vthreshold @
1SS355VMTE-17

1
and active the OTP

3
E
PQ616 PR790
so,the OTP function is ok 56 FET_OFF#
2B 750K_0201_5%
PMBT3906

2
C
DCIN 1 DCIN2

1
OTP_RESET# 14 PQ1 FET PQ5 FET M-Battery IN Charger VDDC-VDD
PQ17 FET PQ101 FET PQ630 FET

1
C PRT406 PRT2 PRT3 PRT410 PRT413
PQ617 2 2 1 2 1 2 1 2 1 2 1
PMBT3904 B

1U_0402_25V6-K
E 2 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC

1
PC1179
D
2 OTP_RESET 44
G
1
S L2N7002KWT1G_SOT323-3
PRT6 PRT7 PRT409 PRT411

3
C C
PQ615 2 1 2 1 2 1 2 1

540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC

VDDCR-SOC VDDC-VDD charger Battery Discharge


PQ631 PQ632 PQ102FET PQ103 FET

PC1179 change to 0402 follow Layout

PRT7 under CPU botten side :


CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

B +3VL B

1
PC1178 PR792
0.1U_25V_K_X5R_0201 1/20W_14K_1%_0201
1

2
PU704
1 8 NTC_V_1
VCC TMSNS1
2 7 OTP_N_002 1 2
MAINPWON is open Drain output , GND RHYST1
So need pull high voltage level MAINPW ON 1 2 OTP_N_003 3 6 PR787
OT1 TMSNS2 20K_0201_1%
PR791 4 5
OT2 RHYST2

1
0_0402_5%
@ G718TM1U_SOT23-8 PRT1
100K_0402_1%_NCP15W F104F03RC

2
A A

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date OTP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 54 of 67
5 4 3 2 1
5 4 3 2 1

PD803 PR18
1SS400CMT2R_VMN2M2 0_0402_5%
TBT_VBUS20_F 2 1 1 2 PQ43
PMBT3906_SOT23-3
@ 3 1

C
E
PC65 2
0.1U_25V_K_X5R_0201

3.92K_0603_1%
2
1

1
PD802

PR22
1SS400CMT2R_VMN2M2 PR21 PR23 PR24
USBC_VBUS20_F 2 1 1 2K_0402_1% 3.92K_0603_1% 100K_0201_1%

2
1
PC68 VCC3_LDO_DOCK

1
0.01U_25V_K_X7R_0201
PR19 PR20 2

1
30.1K_0201_1% 324K_0201_1%
PC68 change to 0201 7.11 PR25 PD10 PD805 PR896 @0925
10K_0603_1% 1SS400CMT2R_VMN2M2 1SS400CMT2R_VMN2M2 100K_0201_1%

10K_0603_1%
add VCC3_LDO_DOCK to pull

1
D high the -TH_SHUTDOWN D

PR57
2

2
PU3
TL331IDBVR_SOT23-5 PD806 PR922
1 5 1SS400CMT2R_VMN2M2 0_0201_5%

2
IN- VCC 1 2 2 1 TH_SHUTDOWN#
2 PD804
GND 1SS400CMT2R_VMN2M2 @
3 4 2 1
IN+ OUT

3
PRF15BB541NB6RC_0402
PQ44 @1009

330P_50V_K_X7R_0201
PR886

90.9K_0201_1%
add PR922

1
274K_0201_1%

PRT412
1
1 2 1

PC66
LSK3541G1ET2L_VMT3

PR887
Add comment
PRT1 near PQ101

2
2

1
PD6 PC67
UDZVTE-175.1B_UMD2-2 2.2U_0402_25V6-K

2
2
PC66 change to 0201 7.11

DOCK_VBUS20 TBT_VBUS20_F PQ2


PQ1
SI7153DNT1GE_POWERPAK1212-8-5 SI7153DNT1GE_POWERPAK1212-8-5
PF1 1 1 PL1
5A_32V_0438005.WR 2 2 FBMJ2125HM210NT_0805
1 2 5 3 3 5 1 2
VINT20_IN
EMC@

10U_0603_25V6-M

10U_0603_25V6-M
4

4
1

1
PC14

PC15
2
PC13 PC16
1U_0402_25V6-K 2 1 0.01U_25V_K_X7R_0201

2
1

1
@ 2

1
1 PC50 PR1 PR2 PC1 PR3 EMC@
0.1U_25V_K_X5R_0201 100_0201_5% 100K_0201_1% 0.047U_25V_K_X7R_0402_MURATA 100_0201_5% PC51
1 2 1000P_0201_25V7-K

2
C @ C

2
EMC@
PC16 change to 0201 7.11

1
PR7
10K_0201_1%

2
3
PQ3
PR67
0_0201_5%
TBT_HV_GATE 2 1 1 LSK3541G1ET2L_VMT3
24 TBT_HV_GATE

2
@
1

2
PR15
100K_0201_5% PC52
0.1U_25V_K_X5R_0201
1
2

3
PQ4

TH_SHUTDOWN# 1 LSK3541G1ET2L_VMT3

2
20170912@Change
Follow T480

USBC_VBUS20 USBC_VBUS20_F
B B
PQ5 PQ6
SI7153DNT1GE_POWERPAK1212-8-5 SI7153DNT1GE_POWERPAK1212-8-5
PF2 1 1 PL2
5A_32V_0438005.WR 2 2 FBMJ2125HM210NT_0805
1 2 5 3 3 5 1 2

EMC@
1
4

1
PC2 PC4 PC5 @
1U_25V_K_X5R_0402 10U_0603_25V6-M 10U_0603_25V6-M PC6
2 0.01U_25V_K_X7R_0201
2

2
1

2
1
1

PC53 PR12 PR13 PR8 EMC@


0.1U_25V_K_X5R_0201 100_0201_5% 100K_0201_1% PC3 100_0201_5% PC54 PC6 change to 0201 7.11
1 0.047U_25V_K_X7R_0402_MURATA 1000P_0201_25V7-K
2

@ 2
2

EMC@

@2017 1129
PR1,PR12,PC3,PC1,PC51,PC54 follow T480
1

PR14
10K_0201_1%
32

PQ7
PR68
0_0201_5%
USBC_HV_GATE 2 1 1 LSK3541G1ET2L_VMT3
24 USBC_HV_GATE
2

@
2
1

PR16 PC55
100K_0201_5% 0.1U_25V_K_X5R_0201
1
@
2

PQ8
A A

TH_SHUTDOWN# 1 LSK3541G1ET2L_VMT3
2

20170912@Change
Follow T480

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date DC-IN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 55 of 67
5 4 3 2 1
5 4 3 2 1

+3VL 20170920 BAT-PWR


change pull high voltage and R
M-BAT-PWR

2
MAIN BAT CONN PR26
1M_0201_5%
PQ18
JDC1 PF3 SI7153DNT1GE_POWERPAK1212-8-5

1
D 8 10A_24V_TR-3216FF10-R 1 D
9 8 7 M_BAT_IN WIDE PATTERN 1 2 2
PTH1 7 6 I2C_CLK_BATT PR27 3 5
10 6 5 I2C_DATA_BATT 100_0201_5% EMC@
PTH2 5 4 1 2 I2C_CLK_BT0
4 I2C_CLK_BT0 44

2
11 3 PR28

4
PTH3 3 2 100_0201_5% PR56
12 2 1 1 2 I2C_DATA_BT0 510K_0201_5%
PTH4 1 I2C_DATA_BT0 44

2
HIGHS_WS33081-S0201-HF

1
@ 1 2 M_TEMP 44 PR61
100_0201_5%
PR58 @

2
2200P_0201_25V7K

2200P_0201_25V7K
390P_0201_25V7-K

390P_0201_25V7-K
10K_0201_1%

1
M_TEMP_P PR60
2 2 2 2 M_TEMP_P 57
510K_0201_5%

PC18

PC19

PC20

PC21

1
1 1 1 1

2
PQ25
PR1133
RF_NS@ EMC@ RF_NS@ EMC@ 150K_0402_5%
1 LSK3541G1ET2L_VMT3

1
C C
2018.7.5 delete the PQ17 follw the fin and only battery ,costdown @

PR83

3
PQ26
2 1

1 LSK3541G1ET2L_VMT3
44 M2_DRV# 510K_0201_5%

2
@
@

3
PQ36

2
PR63
510K_0201_5% FET_OFF# 1 LSK3541G1ET2L_VMT3
54 FET_OFF#

2
1
@

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BATTERY INPUT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 56 of 67
5 4 3 2 1
5 4 3 2 1

1,snnuber PC142PR153,PC143,PR156 delete EMC@


2,PC136,PC146 delete EMC@
3,PC129.PC140 delete EMC@

D D

Table PL101

TOKO : FDSD0630-H-2R2M
Cyntec : CMLE063T-2R2MS
20171009@VBUS add a 0805R to 1
and change PC102 to 0.47U
MLCCs must be placed Follow TI MLCCs must be placed
PC129， ，PC182,PC18 3 chang e t o 020 1 7.11
PC136,PC146,PC180 20170918@Snuber Cap Change 20170918@Snuber Cap Change
VINT20_IN symmetrically on Top and Bottom. symmetrically on Top and Bottom.
PR158 PQ101 Follow TI PL101 Follow TI PQ102 AONH36334 Add poscap for E-noise

0.1U_25V_K_X5R_0201
0.01_1206_LE_1% RF_NS@ RF_NS@ EMC@ EMC@ BSC0923NDI_PG-TISON-8-7 2.2UH_CMLE063T-2R2MS_10A_20% RF_NS@ RF_NS@ Dave RF@ RF@

100P_50V_K_X7R_0201

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M
47P_50V_J_NPO_0201
1 2 1 2
B+

9
100P_50V_K_X7R_0201

22U_B2_25VM_R100M

22U_B2_25VM_R100M

22U_B2_25VM_R100M

2200P_0201_25V7K
0.01U_25V_K_X7R_0201
2 2 PC162 2 2 1 1

1
PC132

PC150

PC160

PC156

PC161

PC135
47P_50V_J_NPO_0201
PC147 1 1 1 2 2
10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

PC182

PC183

PC140
PR196 PR197 5 PC142 0.047U_0402_25V7K 0.047U_0402_25V7K PC143 7 10

PC1215

PC1216

PC1217

PC129
0_0201_5% 0_0201_5%
1 1 1 2 4 330P_50V_K_X7R_0201 6
330P_50V_K_X7R_0201 4 + + +

2
1

1
1 1 1 1 2 2
PC138

PC149

PC151

PC163

PC180

PC181

PC136
3 5 3

1
PC146 EMC_NS@ EMC_NS@ 2 1 1

1 2
1000P_0201_25V7-K PR149 PU101 PR137 PR156 2 2 2
2

2
@ @ 2 2 2 PR153 @ 0_0402_5% BQ25700ARSNR_QFN32_4X4 0_0402_5% 56_0603_5%

1
PR138 56_0603_5% @ EMC_NS@
30 25 PQ103

BAT-PWR
PR133 4.99_0201_1% EMC_NS@

1
4.99_0201_1% BTST1 BTST2 SI7153DNT1GE_POWERPAK1212-8-5 @ @ @

2
LX1_CHG 32 23 LX2_CHG 1 PR151

2
PR893 SW1 SW2 2 0.01_1206_LE_1%
C C
2

PC145 1_0805_5% DL1_CHG 29 26 DL2_CHG 3 5 1 2


0.01U_25V_K_X7R_0201 LODRV1 LODRV2
DH2_CHG PC141

1U_25V_K_X5R_0402
1 2 PR160 1 @ 2 0_0402_5% 31 24 PR161 1 @ 20_0402_5% 1

1
HIDRV1 HIDRV2 1 2
1 1

4
PC158

PC134
@ 1 22 PC1210 @ 1
1 2 VBUS VSYS 0.01U_25V_K_X5R_0201 PC154 0.1U_25V_K_X5R_0201 PC153
CH_AGND 2
2 21 BATDRV# PR170 1 @ 20_0402_5% 0.1U_25V_K_X5R_0201 0.1U_25V_K_X5R_0201
ACN BATDRV# 2 2
Should be placed 0.033U_0402_25V7-K 3 20 2
ACP SRP
1

near ACP, ACN


1U_0402_25V6-K

1
PC144

PC164 7 19
0.033U_0402_25V7-K VDDA SRN PR139 10_0201_5% 1 2
VDDA REGN
2

PR136
@ 2 10_0603_5% 6 28 1 2 PR155 10_0201_5% 2 1
1 2 40.2K_0201_1% ILIM_HIZ REGN PC155 2.2U_0402_10V6-K
Keep these two signals CH_AGND CH_AGND
1
PC148 1 2 PR134 1 2 PR144 680P_0201_25V7-K PC154 change to 0201 7.11
as pair routing REGN PC102 16 17 1 2 PC157 1 2
CH_AGND COMP1 COMP2 CH_AGND

10U_0603_25V6-M

10U_0603_25V6-M
0.47U_25V_K_X5R_0402 1800P_0201_25V7-K PC133 1 2 10K_0201_1%
2 33P_25V_J_NPO_0201_MURATA 1 2
1

1
PC167

PC168
PC165 PR142 1 2 75_0201_5% 11 18 PC137 15P_0201_25V8-J
44,61 VR_HOT# PROCHOT# CELL_BATPRES
1U_0402_25V6-K
PR146 1 @ 2 0_0402_5% 13
VDDA

2
2 44 EC_SMB_CK1 SCL 8 PR157 1 @ 20_0201_5%
IADPT ADP_I 44
PR148 1 2 12
44 EC_SMB_DA1 @ 0_0402_5% SDA 9 PR141 1 @ 20_0201_5%
IBAT
2

CH_AGND 4 PR921 @
PR147 @ PR168 CHRG_OK 10 1 2
PSYS PSYS 44
174K_0201_1% 1 2 5 0_0402_5%
VDDA ENZ_OTG 27
PGND

2
100P_0201_50V7-K

100P_0201_50V7-K

100P_0201_50V7-K
10K_0201_5% 15
VDDA
1

CMPOUT

2
33 PR101
PAD

2
14 PR150 137K_0201_1%
CMPIN

PC152

PC131

PC139
20K_0201_1%
1

1
+3VALW

1
1

2
B PQ626 D PR135 PR123 B

1
1
PSYS 1 2 ACOFF 2 100K_0201_1% 1 PR140 82K_0201_1%
G PC1319 10K_0201_5% PR190

1
PR927 1U_25V_K_X5R_0402 10K_0201_1% CH_AGND CH_AGND CH_AGND CH_AGND
2

2
S L2N7002KWT1G_SOT323-3 PR919
3

1
1

0_0402_5% 2 300K_0201_1%

2
@ @
PR923
10K_0201_1% CH_AGND

2
PR920 @
CH_AGND CH_AGND CH_AGND
2

1 2
44 ACIN

1
PR162
PD102

1
1 @ 2 PQ104 D PR130
0_0201_5% 1 2 2 100K_0201_1%
@ 0_0201_5% 56 M_TEMP_P G

2
1
1SS355VMTE-17 S L2N7002KWT1G_SOT323-3

3
@ PR132
CH_AGND 1M_0201_5%
@

2
@
20170918@ follow T475
1,add ADP_I CH_AGND
2,change the charger OK to ACIN
3,change the Call_pres to T475
20171204@ follow T475
add PQ626PR924,,PR925
# of CELL VCELL_PRES PR154

1-CELL 1.5V 301K


IDPM V(ILIM) PR147
A 2-CELL 2.5V 140K A

500mA 1.2V 402K 3-CELL 3.5V 71.5K


1.0A 1.4V 332K
4-CELL 4.5V 33.2K
1.5A 1.6V 280K
Title
2.0A 1.8V 237K Security Classification LC Future Center Secret Data
Issued Date Deciphered Date BATTERY CHARGER(BQ25700A)
3.0A 2.2V 174K LOGIC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
3.25A 2.3V 162K AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Drift AMD 0.1

Date: Friday, March 01, 2019 Sheet 57 of 67


5 4 3 2 1
5 4 3 2 1

B+ +3VALW
TDC
=

1
PJ201 7.5A

1
JUMP_43X79

2
@
D
+3VALW D

2
RF_NS@ RF_NS@

22U_25V_M_X5R_0805_H1.25
EMC@ EMC@

22U_25V_M_X5R_0805_H1.25
2200P_0201_25V7K

47P_25V_J_NPO_0201
100P_25V_J_NPO_0201
2 2 2 2 2 2 2
PC201

PC205

PC206
Table PL0501

1
0.1U_25V_K_X5R_0201 PC1333

PC202

PC203

PC204

1
0.1U_25V_K_X5R_0201 PJ211

1
1 1 1 1 1 1 1 JUMP_43X79 PJ212
EMC@ CYNTEC : CMLE053T-1R5MS

1
JUMP_43X79

2
@

2
PU201 PC209 @

2
TPS51393PRJER_VQFN20_3X3 PR208 0.22U_25V_K_X5R_0402

2
+3VALW_VIN 2 1+3VALW_BST2 1 1 2
3 VIN1 BST
4 VIN2 0_0402_5%
5 VIN3 PL201 EMC@ EMC@
VIN4 1.5UH_CMLE053T-1R5MS_8.2A_20%
+3VALW_EN 12 6 +3VALW_SW 1 2 RF_NS@ RF_NS@
EN SW1 19
+3VALW_VCC 17 SW2 20
VCC SW3

0.1U_25V_K_X5R_0201
（ 9.0~ 13.2V ） 11

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

100P_25V_J_NPO_0201
ENLDO
B+ +3VL

2200P_0201_25V7K

47P_25V_J_NPO_0201
C C
15 14 2
LDO VOUT PR209 PC210 2 2 2 2 2 2 2 2 2

THERMAL PAD
1/20W_240K_1%_0201 470P_25V_K_X7R_0201

PC211

PC212

PC213

PC214

PC215

PC216

PC217

PC218

PC219

PC220
PR239 13 +3VALW_FB 1 2 1 2
10 FB 1
0_0603_5%

1U_10V_K_X6S_0402
NC1 1 1 1 1 1 1 1 1 1

PGOOD
@

PGND3
PGND2
PGND1
1
16 +3VALW

200K_0201_1%

2
NC2

2
PC207
2 1

PR240
@ @
2 +3VALW_LDO

21
18
8
7

9
2 PR238
100K_0201_1%

1
PC208
PR202

+3VALW_SW
4.7U_0402_6.3V6-M 5M_3M_PWRG 44,59,60
20K_0402_1% 1
EC_ON 1 2
44,63,64,65 EC_ON Ven 2.2V ~3.2V
fiollw TI sugget ,add pull high R

61.9K_0201_1%
2
1 2
0.1U_25V_K_X5R_0201

PR241
@ PR203 0_0201_5%
2
+3VL

1
PC221
PC222

1
6

B PQ201A 1000P_0201_25V7-K B

2
2

1
D1
2

PR205 2 @ PR206 add 3VL EN ,PR0503,PR1135.the leakeage current is 0.01mA. dave EMC_NS@
PR204 100K_0201_1% G1 100K_0201_1%
100K_0201_1%
EMC_NS@
S1

1
1

PR210
NTJD5121NT1G_SC88-6 @
1

5V EN2 Gate 1/4W_2.2_5%_0603

2
3

PQ201B @9.25 follow A475


2
D2

44,54 MAINPWON 5 @ PR207 add MAINPWON on to control 3/5V power


G2 change PR901 to 100K from 1M @
47K_0201_5%
EN input current=1UA,Nosuggest above 200K R for it
S2

@2018.1.31 add EC_ON2 control


1

NTJD5121NT1G_SC88-6
4

5V EN2 Gate 60

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 58 of 67
5 4 3 2 1
5 4 3 2 1

B+

1
PJ213

1
JUMP_43X79

2
@
+5VALW_PD

2
EMC@ EMC@
TDC
=
2 2 2 2 2 2
D
PC224 7.2A D
PC223 2200P_0201_25V7K PC225 PC226 PC227 PC280
0.1U_25V_K_X5R_0201 10U_25V_K_X5R_0805_H1.25 10U_25V_K_X5R_0805_H1.25 10U_25V_K_X5R_0805_H1.25 10U_25V_K_X5R_0805_H1.25
1 1 1 1 1 1
+5VALW_PD

2018.7.5 add one off page

1
for EC_ON_5V_R PJ225 PJ226

1
10 +5VALW_PD_BST
PR216 JUMP_43X79 JUMP_43X79
1/20W_91K_1%_0201 PR217

2
1 2 1 2 @ @
2.2_0402_5%

2
2
PC230

11
0.22U_25V_K_X5R_0402
1 PL202
EMC@

BST
CLM
1.5UH_CMLE053T-1R5MS_8.2A_20% EMC@
+5VALW_PD_VIN 1 9 +5VALW_PD_SW 1 2
VIN SW
PR214
20K_0402_1%

2200P_25V_K_X7R_0201
EC_ON_5V_PD1 2 +5VALW_PD_EN 15 PU202

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603
44 EC_ON_5V_PD

0.1U_25V_K_X5R_0201
EN
13 +5VALW_PD_FB 2 2
FB

PC232

PC233
2 2 2 2 2 2

PC234

PC235

PC236

PC237

PC238

PC239
NB693GQ-Z_QFN16_3X3 PR320 PC231
2

12 1/20W_274K_1%_0201 220P_0201_25V7-K 1 1
2 PG 1 1 1 1 1 1
C PR215 1 2 1 2 C
PC228 100K_0201_1% 1/20W_91K_1%_0201
0.1U_25V_K_X5R_0201 PR218

1
1
1

@ 1 2 +5VALW_PD_Mode 14 16 +5VALW_PD_VIN PR221 PR222


@ MODE NC2 499_0201_1% 1/16W_110K_1%_0402
@ PR280
1/16W_5.1_5%_0402

2
1 2 +5VALW_PD_3V3 3 8 +5VALW_PD_SW
+3VALW 3V3 NC1

PGND1

PGND2

PGND3

PGND4

PGND5
2.2U_0402_6.3V6-K

1
2 PR223

PC229
1/16W_10K_1%_0402

+5VALW_PD_SW
2
1
+3VALW

10K_0402_1%
2

PR224

1
@
PC1331
1000P_0201_25V7-K

2
5M_3M_PWRG @11/29,changePR213,PR214 to5.6Kohm
5M_3M_PWRG 44,58,60 EMC_NS@

EMC_NS@

1
PR934
1/4W_2.2_5%_0603

2
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date +5VALW_PD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 59 of 67
5 4 3 2 1
5 4 3 2 1

B+

1
PJ227

1
JUMP_43X79

2
D @ D

2
Remove 3.3V LDO Output to 3Valw power。 VCC5M
need add the cap？ ？ RF_NS@ RF_NS@
TDC =

22U_25V_M_X5R_0805_H1.25

22U_25V_M_X5R_0805_H1.25
6.3A

47P_25V_J_NPO_0201
100P_25V_J_NPO_0201
2 EMC@ 2 EMC@ 2 2

+5VALW_VIN
2 2
PC242 PC243

PC244

PC245

PC246

PC247
+5VALW

+5VALW_3VLDO
0.1U_25V_K_X5R_0201 2200P_25V_K_X7R_0201

2.2U_0402_6.3V6-K
1 1 1 1
1 1
2

PC240
1

PU203

12
9

1
AGND_5M
PL0301

VIN_1

VIN_2
3V3LDO

1
Need stuff @ @
C PJ236 PJ237 C

1
PR228
EC_ON_5V2 1 +5VALW_EN 5 6
CYNTEC : CMLE053T-1R5MS JUMP_43X79 JUMP_43X79
44 EC_ON_5V EN PG 5M_3M_PWRG 44,58,59

2
2

2
20K_0201_1%

PC248
PR232
2

NB690GRP-C669-Z_QFN12_2X2P5 8 +5VALW_BST 2 1 1 2
1 BST
PR229 PR230 PL203
PC241 100K_0201_1% 0_0201_5% 0_0402_5% 1.5UH_CMLE053T-1R5MS_8.2A_20%
0.1U_10V_K_X5R_0201 2 1 4 7 +5VALW_SW
@
0.22U_25V_K_X5R_0402 1 2 EMC@ EMC@ RF_NS@ RF_NS@
2 MODE SW
1

@ PR233
@
1/16W_3.3_1%_0402

PGND_1

PGND_2
11 +5VALW_Vout 1 2

2200P_25V_K_X7R_0201

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

100P_25V_J_NPO_0201
0.1U_6.3V_K_X5R_0201
VOUT
AGND

47P_25V_J_NPO_0201
1

PQ202 D
58 5V EN2 Gate 5V EN2 Gate 2 2 2 2 2 2 2 2 2 2 2

PC251

PC252

PC253

PC254

PC255

PC256

PC257

PC258

PC259

PC260
G
10

+5VALW_SW
S L2N7002KWT1G_SOT323-3
3

1 1 1 1 1 1 1 1 1 1
2

2
PC249
0.1U_6.3V_K_X5R_0201 @ PR234
B
1/20W_100K_1%_0201 B
AGND_5M 1

1
1
TABLE : NB690 Mode Control PC250
1000P_0201_25V7-K

2
RMode MODE VOUT 3V3LDO
PR231 EMC_NS@
0 Ceramic Cout 5.1V 3.3V LOGIC 2 1
EMC_NS@

1
60K POSCAP Cout 5.1V 3.3V 0_0402_5%
@ PR235
120K Ceramic Cout 5V 3.3V 1/4W_2.2_5%_0603

180K POSCAP Cout 5V 3.3V AGND_5M

2
Floating X 3.3V 3.3V

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date +5VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 60 of 67
5 4 3 2 1
5 4 3 2 1

PL805 EMC@
BLM18KG300TN1D_2P
1 2

PL809 EMC@
1,change the debug part to 0402 @ EMC@ EMC@ BLM18KG300TN1D_2P
2,chage the Core coreNB input cap VIN_+VDDNB_CORE 1 2
3,change the GPUcore some debug part to 0402 B+

0.1U_25V_K_X5R_0201

22U_B2_25VM_R100M

22U_B2_25VM_R100M
0.1U_25V_K_X5R_0201

0.1U_25V_K_X5R_0201
1 1

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M
2 2 2

1
+ +

PC405

PC408
PC1209

PC1224

PC1195

PC1196
PC404

PC403

PC402

2
1 1 1 2 2

PC401 PR402
680P_0201_25V7-K2K_0402_1%
UGATE_NB @ @ @ @ +VDDNB_CORE
1 2 1 2
TDC=10A

2
D 1 PQ630 D
@ @
AON6982_DFN8-7 PL806
EDC=13A
PC409 0.36UH 20% PCMB063T-R36MS3R205 20A OCP=16A
PR403 PR404 390P_0402_50V8-J PR405
PHASE_NB 7 PHASE_NB 1 4 +VDDCR_SOC
PR401 590_0402_1% 47K_0402_1% 32.4K_0402_1%
100_0402_1% 1 2 1 2 2 1 1 2
+VDDCR_SOC
1 2 6 2 3 1 1 1
+VDDCR_SOC

330U_B2_2.5VM_R9M

330U_B2_2.5VM_R9M

330U_D2_2V_Y
2
@ PR408 PC413 2 2
BOOT_NB 1 2 1 2 + + +
PR407 PC411 PR409 PC539

PC414

PC415

PC1334
PC410
301_0402_1% 100P_0402_50V8-J 4.7_0603_5% PC417
PR406 2 @ 1 0_0402_5% 2 1 1 2 1 2 2.2_0603_5% 0.22U_25V_K_X5R_0402 10U_0603_6.3V6M 0.1U_25V_K_X5R_0201
6 VDDCR_SOC_VCC_SENSE EMC_NS@

3
4
5
2 2 2 1 1
LGATE_NB @ @

1
1000P_25V_K_X7R_0201
PC412
2
2 1 @
PC419
330P_50V_K_X7R_0201 680P_0201_25V7-K
1
VSUMP_NB
EMC_NS@
@
2

COMP_NB
VSEN_NB
2.61K_0402_1%
PR410

FB_NB
1
PR411 PR414
2 1

11K_0402_1% 3.65K_0402_1%
VSUMP_NB

1
1 2
PGOOD_NB
PRT401 PC420 PC418
CLOSE PL401 10K_0402_NTC 0.033U_0402_25V7-K 0.033U_0402_25V7-K
2

2
LGATE_NB
PR418
1_0402_1%
PR412 PHASE_NB VSUMN_NB
1

1 2
VSUMN_NB 1 2
UGATE_NB
PR413
1 100_0402_1% PC421
1 21/16W_750_1%_0402
1 2 BOOT_NB
PL808 EMC@
PC422 BLM18KG300TN1D_2P
PR415 0.1U_0402_25V6-K
@ 1 2
27.4K_0402_1% 2 820P_0402_50V7-K

40

39

38

37

36

35

34

33

32

31
1 2 @ PL807 EMC@
EMC@ EMC@ EMC@ BLM18KG300TN1D_2P

ISUMP_NB

ISUMN_NB

VSEN_NB

FB_NB

COMP_NB

PGOOD_NB

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB
VIN_+VDD_CORE 1 2
PR416
10.7K_0402_1% PRT402 B+
470K_0402_3% CLOSE PQ401

33U_D2_25VM_R40M

33U_D2_25VM_R40M
1 2 2 1 APU_NTC_NB 1 30 BOOT2_APU
1 1

22U_B2_25VM_R100M

22U_B2_25VM_R100M

0.1U_25V_K_X5R_0201
NTC_NB BOOT2
1 1

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M
2200P_0201_25V7K
APU_IMON_NB 2 29 UGATE2_APU + +

PC406

PC407
1 2 2

47P_0201_25V8-J
IMON_NB UGATE2

1
+ +

PC1220

PC1208

PC1173

PC1176

PC1171

PC1177

PC1172
APU_SVC 2 1 3 28 PHASE2_APU
@

PC1175

PC1174
C 6 APU_SVC PR417 0_0402_5% SVC PHASE2 2 2 C
APU_VRHOT_A LGATE2_APU

2
2 @ 1 4 27 2 2 2 1 1
44,57 VR_HOT# PR419 0_0402_5% VR_HOT_L LGATE2
APU_SVD APU_VDDP
1

2 @ 1 5 26 PR422 1 2 0_0603_5%
1 6 APU_SVD PR420 0_0402_5% SVD VDDP +5VALW UGATE1_APU @ @ @ @
2 1 6 25 APU_VDD 1 2 0_0603_5%
PR421 PC423 @ PU401 PR872 @
+1.8VS VDDIO VDD
133K_0402_1% 0.1U_25V_K_X5R_0201 PR423 0_0402_5% ISL62771HRTZ_TQFN40_5X5
APU_SVT LGATE1_APU

1
2 2 @ 1 7 24 PC424
@ PC1156

10
6 APU_SVT
2

SVT LGATE1

3
4
PR425 0_0402_5% 1U_0402_10V 1U_0402_10V
EN_APU 8 23 PHASE1_APU 1

2
ENABLE PHASE1 PL3103
APU_PWROK_1 9 22 UGATE1_APU
0.24UH_PCME063T-R24MS1R145_35A_20% EMC@
PWROK UGATE1 5 1 2
PC433 1 2 0.1U_25V_K_X5R_0201 10 21 BOOT1_APU PHASE1_APU 2 6 +VDDC_VDD

22U_0603_6.3V6-M
IMON BOOT1 7 1 1 1

330U_D2_2V_Y
PC434

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M
2
PGOOD
PC423 change to SE00000G80T @11/29 PR430 8

ISUMN
2

ISUMP

COMP
PR426 BOOT1_APU

ISEN2

ISEN1

1
VSEN
1 2 1 2 PR431 + + +

PC159
PC1160

PC1158

PC1077
+VDD_CORE
NTC

RTN
1 2 AOE6930_DFN8-10 4.7_0603_5% PC1157

FB

TP
2.2_0603_5% PQ631 Dave change to EX85 L 0.1U_25V_K_X5R_0201
+3VALW EMC_NS@

2
0.22U_25V_K_X5R_0402 2 2 2 1
TDC=35A

1
11

12

13

14

15

16

17

18

19

20

41
133K_0402_1% LGATE1_APU

EDP=45A

10K_0402_1%
2
+1.8VS PR427
27.4K_0402_1% OCP=55A

PR428
2
1 2
1

APU_VSEN

APU_COMP
PC1060

APU_FB
APU_RTN
PR429 680P_0201_25V7-K

1
1.91K_0402_1% 2 1 1
EMC_NS@
PGOOD_APU 2 1 0_0402_5%
PRT403 CLOSE PQ403 PR432 @
IMVPPOK 44
2

470K_0402_3%
2 1 @ APU_PWROK_1
@
6 APU_PWROK PR433 0_0402_5% PR869 PGOOD_NB APU_ISEN1
10.7K_0402_1% PR435 2 @ 1 0_0402_5% 1 2
2

PR819 10K_0201_1%
PR439
3.65K_0402_1%
APU_ISEN2 VSUM+_VDD 1 2

+1.8VS
APU_ISEN1

VSUM-_VDD

2 2
PC1191
2

0.22U_25V_K_X5R_0402 PC1192
PR440 PR441 0.22U_25V_K_X5R_0402
1 1 PR442 PC1068 PR443
1K_0402_1% 1K_0402_1% PC1072
B 301_0402_1% 100P_0402_50V8-J 32.4K_0402_1% B
2 1 1 2 1 2 1 2
VSUM+_VDD
1

EMC@ EMC@ EMC@


@ @
2 1000P_25V_K_X7R_0201 PC1059 @ VIN_+VDD_CORE
2

PR873 PR876 390P_0402_50V8-J


APU_SVC
PR870 PC1055 681_0402_1% 56K_0402_1%
2.61K_0402_1% 1
330P_50V_K_X7R_0201 2 1 2 2 1
APU_SVD
0.082U_16V_K_X7R_0402

1
1

22U_B2_25VM_R100M

22U_B2_25VM_R100M
1

@
11K_0402_1%

1 1

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M
2200P_0201_25V7K
1

0.1U_25V_K_X5R_0201
PC1062 PR877
PR448

PC1069

1 2 2

47P_0201_25V8-J
PC1067

1
0.1U_0402_25V6-K 2K_0402_1% + +
CLOSE PL406

PC1225

PC1214

PC1166

PC1169

PC1164

PC1170

PC1165
2
2

2 1 2 2 1

PC1168

PC1167
<BOM Structure>
PRT404 @
2

2
1

10K_0402_NTC @ 2 2 2 1 1
PR868 PR451 100_0402_1% 680P_0201_25V7-K
PR450 PR452 620_0402_1% 1 2
VSUM-_VDD 2APU_ISUMN
+VDDC_VDD
1

220_0402_5% 220_0402_5% 1 @ @ @ @
+VDD_CORE
UGATE2_APU
2

@ @
1

PR454 2 @ 1 0_0402_5%
PC1061 PR455 VDDCR_VCC_SENSE 6 TDC=35A

10
3
4
0.1U_0402_25V6-K 100_0402_1% PC1071
EDP=45A
2

1 2 1 2 1
OCP=55A
PR871 2 @ 1 0_0402_5% PL3104 EMC@
Dave 2017 0824 @
820P_0402_50V7-K VDDCR_VSS_SENSE 6
PHASE2_APU
5 0.24UH_PCME063T-R24MS1R145_35A_20%
@ 2 6 1 2
SVID SVIC set the Boost Voltage. +VDDC_VDD
1

PR875 100_0402_1% 7
1 2 8
01 for 0.9V PC1066

22U_0603_6.3V6-M
2
PR458 .01U_0402_25V7-K PR817 PC1057 Dave change to EX85 L
1 1 2
2

BOOT2_APU

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M
47K_0402_5% 1 2 1 2 AOE6930_DFN8-10 PR816

1
1 2 PQ632 4.7_0603_5% + + PC1152

PC1154

PC1155

PC1151
PR868 change to SD00001PB0T @11/29 44 APUPWR_EN 2.2_0603_5% 0.22U_25V_K_X5R_0402 0.1U_25V_K_X5R_0201
EMC_NS@

9
1
EN_APU LGATE2_APU

2
2 2

2 2
@ @
PC1070 PC1045
0.1U_25V_K_X5R_0201 680P_0201_25V7-K
1 1
EMC_NS@

APU_ISEN2 1 2

2018.7.5 change PC1069 to SE00001HQ0T follow the A485 PR821


10K_0201_1%
A A
PR814
3.65K_0402_1%
VSUM+_VDD 1 2

VSUM-_VDD

Dave detel the net

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date VDDC_VCC/VDD_SOC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 61 of 67
5 4 3 2 1
A
B
C
D
PC505
22U_0603_6.3V6-M
2 1

PC506
22U_0603_6.3V6-M
2 1

PC507
22U_0603_6.3V6-M
2 1

PC508
22U_0603_6.3V6-M
2 1 2 1

1
2
1
2

5
5

PC1232 PC1250 PC1074 PC509

BAT-PWR
2200P_0201_25V7K 0.1U_25V_K_X5R_0201 22U_0603_6.3V6-M 22U_0603_6.3V6-M

+VDDC_VDD

EMC_NS@
2 1 2 1

+VDDCR_SOC

PC1233

EMC_NS@
EMC_NS@
PC1075 PC510
22U_0603_6.3V6-M 22U_0603_6.3V6-M
@

2 1 2 1

1000P_0201_25V7-K
PC1202 PC1079 PC511
22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M
@

2 1 2 1 2 1

2
1
1
2
Main source :SE00000M03T
PC1251 PC1201 PC1080 PC512
0.1U_25V_K_X5R_0201 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M

+VDDC_VDD

EMC_NS@
EMC_NS@
@

2 1 2 1 2 1

PC1265
PC1200 PC1081 PC513
22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M

1
@

2 1 2 1 2 1

PC1231

EMC_NS@
B+

1
2
PC1199 PC1197 PC514

0.1U_25V_K_X5R_0201
PC1258 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M

2nd source :SE00000M04T sumsung


0.1U_25V_K_X5R_0201 2 1 2 1 2 1

EMC_NS@
Murata

2200P_0201_25V7K
2 1

B+
2 1

EMC_NS@

1
2
PC1259
+VDDC_VDD

B+

BAT-PWR
PC1234
+VDDC_VDD
+VDDC_VDD

2200P_0201_25V7K
@

B+

1
2
1
2

1000P_0201_25V7-K

PC1263

EMC_NS@
EMC_NS@
PC1246 PC1301
0.1U_25V_K_X5R_0201 0.22U_25V_K_X5R_0402

EMC_NS@

1000P_0201_25V7-K

4
4

@
1
2

2 1
B+

2
1
PC1302
0.22U_25V_K_X5R_0402
@

EMC_NS@

PC1264
1
2
1
2

PC1257

+3VS
PC1249 PC1299

EMC_NS@
0.1U_25V_K_X5R_0201 0.22U_25V_K_X5R_0402

EMC_NS@
B+
PC1276 to 0201 8/16

1
2
@

1000P_0201_25V7-K
1
2

PC1271
change the PC1272 PC1273

0.1U_25V_K_X5R_0201
0.1U_25V_K_X5R_0201 PC1300

EMC_NS@
0.22U_25V_K_X5R_0402
@
1
2
2
1

2 1 PC1295 PC1276
B+

0.22U_25V_K_X5R_0402 1U_0201_6.3V6-M

1
2
@

+3VS
1
2

PC1254
EMC_NS@
2
1

0.1U_25V_K_X5R_0201 PC1296
PC1270

EMC_NS@
0.22U_25V_K_X5R_0402 PC1272
1U_0201_6.3V6-M
@
1
2

1000P_0201_25V7-K
2
1

PC1293
0.22U_25V_K_X5R_0402 PC1273
1U_0201_6.3V6-M
@

PC1277
B+

1
2
1
2

330U_B2_2.5VM_R9M
@

PC1261 PC1294
2
1
2
1
+

0.1U_25V_K_X5R_0201 0.22U_25V_K_X5R_0402

1
2
PC1274

+5VS
EMC_NS@
@

PC1242 0.47U_25V_K_X5R_0402
1
2

0.1U_25V_K_X5R_0201 PC1278

EMC_NS@
2 1 PC1291 470U_D2_2VM_R4.5M
B+
@

0.22U_25V_K_X5R_0402
2
1
2
1
+

@
@

2 1 PC1289

3
3

1
2

0.47U_25V_K_X5R_0402
EMC_NS@

PC1292 PC1279
PC1262

0.22U_25V_K_X5R_0402 470U_D2_2VM_R4.5M
@

PC1204
2
1
2
1
+

1
2
1000P_0201_25V7-K

PC1290
+5VS
B+

1
2

PC1243 0.47U_25V_K_X5R_0402
0.1U_25V_K_X5R_0201 PC1269
180P_0402_50V8-J

EMC_NS@
0.1U_25V_K_X5R_0201
EMC_NS@
+VDDC_VDD
+VDDC_VDD
+VDDC_VDD

Issued Date
2 1
B+

1
2
+2.5V

PC1255
+VDDC_VDD

Security Classification
0.1U_25V_K_X5R_0201
EMC_NS@
EMC_NS@
PC1268

PC1228
1000P_0201_25V7-K

22U_0603_6.3V6-M
2 1
1
2

PC1229
B+

1
2

PC1256 22U_0603_6.3V6-M
+0.6VS
@

0.1U_25V_K_X5R_0201 PC1266 2 1
EMC_NS@

0.1U_25V_K_X5R_0201
PC416
PC1085 22U_0603_6.3V6-M
EMC_NS@

1U_0402_10V6-K 2 1
@

2 1
2
1

PC534
2 1 PC1306 PC1311 22U_0603_6.3V6-M
B+

0.47U_25V_K_X5R_0402 1U_0402_10V6-K 2 1
@

2 1
@

PC535
2
1

PC1304 22U_0603_6.3V6-M
EMC_NS@

1
2

PC1305 1U_0402_10V6-K 2 1
PC1267

2
2

+1.2V
@

PC1253 0.47U_25V_K_X5R_0402 2 1
@

0.1U_25V_K_X5R_0201 PC536
EMC_NS@
2
1

22U_0603_6.3V6-M
Deciphered Date
@

1000P_0201_25V7-K

PC1314 PC1307 2 1
0.47U_25V_K_X5R_0402 1U_0402_10V6-K
@

2 1 PC537
@

22U_0603_6.3V6-M
1
2
2
1

PC1308 2 1
LC Future Center Secret Data

PC1252 PC1303 1U_0402_10V6-K


@

0.1U_25V_K_X5R_0201 0.47U_25V_K_X5R_0402 2 1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

PC538
EMC_NS@
1
2

22U_0603_6.3V6-M
1
2

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

PC1310 2 1
+1.2V
+3VALW1_LAN

PC1239 0.22U_25V_K_X5R_0402
0.1U_25V_K_X5R_0201 PC1227
EMC_NS@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
@
@

22U_0603_6.3V6-M
1
2
1
2

2 1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

PC1083 PC1315
0.22U_25V_K_X5R_0402 2.2U_0402_6.3V6-K PC540
22U_0603_6.3V6-M
@

2 1
1
2
1
2

1
2

PC1312 PC1084
PC1247 0.22U_25V_K_X5R_0402 2.2U_0402_6.3V6-K PC1207
+3VS

0.1U_25V_K_X5R_0201 330U_D2_2V_Y
1
2
@

2 1
Size
EMC_NS@

Date:
1
2
1
2
2
1
+

PC1240
Title
+1.8VALW

0.1U_25V_K_X5R_0201 PC1313 PC1309


EMC_NS@

0.22U_25V_K_X5R_0402 2.2U_0402_6.3V6-K
PC1205
180P_0402_50V8-J

Document Number
+VDDCR_SOC

CPUCORE MLCC
+VDDCR_SOC
+VDDCR_SOC
+VDDCR_SOC

1
2

Friday, March 01, 2019

PC1248
+3VS

1
1

Close to the CPU,Dave

+0.9VS

1
2

0.1U_25V_K_X5R_0201
EMC_NS@

PC1241
0.1U_25V_K_X5R_0201
EMC_NS@

Drift AMD
Sheet
62
of
67
Rev
0.1
A
B
C
D
5 4 3 2 1

@ PJ804
JUMP_43X79
2 1
+0.9VALWP 2 1 +0.9VALW

1
D PR702 D
91K_0201_1%

1 2 +0.9VALWP

2
PR703 0_0402_5%
FSW=700KHz
@
+0.9VALW_BST 2 TDC:8A
PC1092 OCP:12A

11

10
0.22U_25V_K_X5R_0402 PL3105
1 0.68UH_PCMC063T-R68MN_15.5A_20%

BST
CLM
PJ709 EMC@ EMC@ EMC@
2 1 +0.9VALW_VIN 1 9 +0.9VALW_SW 1 2
B+ +0.9VALWP

0.1U_25V_K_X5R_0201
2 1 VIN SW
@ JUMP_43X79 @ PR701
22U_B2_25VM_R100M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
2
10K_0402_1%
10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M
1

2200P_0201_25V7K

2200P_0201_25V7K
1 2 +0.9VALW_EN 15 PU705 PR862
2 2 EN 2 2
1

1
+ 0_0201_5%

PC707
PC1221

PC1332

PC1086

PC1099

PC1094

PC1097

PC1091

PC1093

PC1089
PR823 13 +0.9VALW_FB PC1087

PC1096

PC1098

PC1088
2 FB
10K_0402_1% 0.1U_25V_K_X5R_0201 +0.9VS
+3VALW
2

2
2
2 1 1 1 2 PC1095 @ PR705 1 1
@
0.1U_25V_K_X5R_0201 NB693GQ-Z_QFN16_3X3 PR711 1K_0201_5% PC1090 @
1 12 2 1 4.7_0603_5% 220P_0201_25V7-K
PG 1 2 1 2
PR704 EMC_NS@

1
C
@ @ @ 100K_0201_1% C
PR706

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
44,65 EC_ON2 1 2 14 16 PR708 PR710
MODE NC2 +0.9VALW_PWRGD 44
0_0201_5% 499_0201_1% 7.5K_0201_1% VFB=0.6V

1
PR712 Vout=0.6V*(7.5k/14.3K)=0.91V

PC1316

PC1317

PC1318
44,58,64,65 EC_ON 2
8.2_0402_5% @

2
1 2 3 8 PC1100
+3VALW

2
3V3 NC1 +0.9VALW_VIN 680P_0201_25V7-K
1 +0.9VALW_FB

1
EMC_NS@

PGND1

PGND2

PGND3

PGND4

PGND5
@ PD701

10U_0603_25V6-M

1
+0.9VALW_SW
1SS355VMTE-17

1
PR709

PC713
1/16W_14K_1%_0402

2
@10.09
Pin 8 and Pin16

2
change the PR709 to 14.3K

2
and improve the Output to 0.910V
follow MPS suggestion @11/29,add PC1316 and PC1317 for SDLE test fail
@11/29,change PR837 to jump
@11/29,add PR702 change to SD00002380T
@11/29,change PR712 change to 8.2ohm and PC713 to 10UF for input noise
@12/11,change PR709 change to SD00000QM0T

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date +0.9VALWP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 63 of 67
5 4 3 2 1
5 4 3 2 1

PJ370
JUMP_43X79
1 2
+1.2VP 1 2 +1.2V

PJ932
JUMP_43X79
@
1 2
+1.2VP 1 2 +1.2V
D D

PJ372
@ JUMP_43X39
2 1
+0.6VSP 2 1 +0.6VS
PJ710 EMC@
2 1
B+ 2 1 PJ373
@ JUMP_43X79 @ JUMP_43X39
2 1
+DDR_2.5VP 2 1 +2.5V
+1.2VP

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

2200P_0201_25V7K
1 1 2 2 @

1
PC1121

PC1108

PC1118

22U_B2_25VM_R100M
PC1111 PC1114
TDC= 7.5A

PC1109
0.1U_25V_K_X5R_0201
1
PR841 0.22U_25V_K_X5R_0402
PR372,PR373 change to SD00001RB0T
Table PL301
2

2
2 1 1
@ + 2 1 1 2
EDC= 9A

PC1222
0_0402_5% NEC TOKIN MPLCH0530LR68G OCP
2
@ CYNTEC CMLB053T-R68MS
+3VALW TDK SPM5030T-R68M =

10
TBD

1
PL3106

BST
VIN
@ 0.68UH_CMLB053T-R68MS_17A_20% EMC@
PR848 8 9 1R2A_SW 1 2
8.2_0402_5% VPPIN SW +1.2VP
1 2 3

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
3V3
2

PC1110 PR844 PU706 13 2


FB

1
22U_0603_6.3V6-M 100K_0201_5% NB687GQ-C669-Z

PC1103

PC1102

PC1113

PC1120

PC1107

PC1116

PC1117

PC1115
C 1 2 +1.2V_PG 12 PC1119 C
1

PG 6 0.1U_25V_K_X5R_0201

2
PC1104 1 2 1U_0402_6.3V6-K VDDQ PR933 PC1112 1
AGND_1R2A
@ 0_0201_5% 220P_0201_25V7-K
SUSP# PR847 1 @ 2 0_0201_5% +1.2V_EN1 16 2 1 1 2 @ @ @
44,52 SUSP# EN1 5
1A
VTT +0.6VSP
SYSON PR838 1 2 0_0201_5% +1.2V_EN2 15
27,44 SYSON EN2

VTTREF
1A

MODE

1
AGND

PGND
@ 11 2
VPP +DDR_2.5VP PC1101 PR842 PR839
44,58,63,65 EC_ON @ PR849 2 1 0_0201_5% 22U_0603_6.3V6-M 499_0201_1% 1/16W_102K_1%_0402

14

7
1 2018.7.5 change PR839 to SD00001840T 0402

2
1
AGND_1R2A
PR845
100K_0201_1%

0.22U_25V_K_X5R_0402
2
2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

2
PR843

PC1106
PR840 0_0201_5%

1
2 1

PC1105

PC1122
1
1

0_0402_5% AGND_1R2A
@

2
@
B B
AGND_1R2A

AGND_1R2A

@11/29,change PR848 to SD00001L30T

TABLE NB687GQ:EN1/EN2 TABLE NB687GQ:MODE


State EN1 EN2 VDDQ VTTREF VTT VPP State USM Fs Resistor to GND
S0 High High ON ON ON ON M1 NO 700KHz 0
S3 Low High ON ON OFF(High-Z) ON M2 YES 700KHz 90K
S4/S5 Low Low OFF OFF OFF OFF M3 NO 500KHz 150K
Others High Low OFF OFF OFF OFF M4 YES 500KHz >230K or Float
A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date VDDQ/VTT/VPP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 64 of 67
5 4 3 2 1
5 4 3 2 1

D D

@ PJ813
JUMP_43X39
2 1
+1.8VALWP 2 1 +1.8VALW

+3VALW

2
PR806
100K_0201_5%
+1.8VALW
TDC: 2.6A

1
Fsw: 1MHz
PU707
@2017 1129
PL3107 PC1123 change to SE00000ZH0T
@ PJ803 RT8068AZQW_WDFN10_3X3 1UH_PH041H-1R0MS_3.8A_20% EMC@
+1.8VALWP

4
10U_0603_6.3V6-M
JUMP_43X39
1 VIN_+1.8VALWP 1.8VALWP_LX
10U_0603_6.3V6-M
2 10 1 1 2
+3VALW

PG
C 2 1 PVIN2 LX1 C
1 1

2
PC1126

PC1129
9 2
PVIN1 LX2

2
1
8 3 PC1123
2 2 SVIN1 LX3 PR808 PR853
EMC_NS@

2200P_0201_25V7K
0.1U_25V_K_X5R_0201
4.7_0603_5% 102K_0201_1% 68P_0201_25V8-J

1
2

22U_0805_6.3VAM

22U_0805_6.3VAM
2 2 2 PC1128,PC816 delete the EMC@

1
5 6

GND
EN FB

PC1124

PC1125

PC1128

PC816
@ PR810 PC813

NC
33K_0402_1% 680P_0201_25V7-K

2
1 2 +1.8VALW_EN 1 1 1
44,63 EC_ON2

7
11
EMC_NS@
@
2

1 2 1
@ PR855
20170629 1M_0201_5% PC818
PC1128,PC816 change

1
PD801 0.1U_25V_K_X5R_0201
CUS357 2 the EMC_NS@ to @ PR854
1

1/20W_51K_1%_0201
PR813
33K_0402_1%

2
1 2
44,58,63,64 EC_ON @128
B PR854 SD0435102PT change to SD00002790T for 1% B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date +1.8VALWP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 65 of 67
5 4 3 2 1
5 4 3 2 1

TI +3VALW/7.5A RichTek
Converter Converter
TPS51393PRJER RT8068 +1.8VSP/2.6A
FOR SYSTEM
FOR System power EN PAGE 65 PGOOD
PAGE 58 PGOOD 5M_3M_PWRG
D D

TI
Load Sw Type C PD1
A 5V/3A
Dock power TYPE-C 2
TYPE-C 1
Adaptor Adaptor EN
MPS
Converter +5VALW_PD/7.2A
NB693GQ-Z_QFN16_3X3 TI
Load SW Type C PD2
B 5V/3A
FOR Type _C PD*2 +3VL/ 100mA
EC_ON EN EN PGOOD
PGOOD 5M_3M_PWRG
PAGE 59

PAGE 71 TI
PGOOD
Load Sw
C 5V/1.5A USB3.1
MPS
C Converter 5VALW/ 9.5A EN C

NB690GRP-C669-Z_
TI QFN12_2X2P5
BQ25700ARSNR FOR System +5VLP/ 100mA
_QFN32_4X4 EN TI
Battery Charger PGOOD 5M_3M_PWRG Load SW
PAGE 60 D 5V/3A USB3.1
Buck_Boost
PAGE 57 EN PGOOD

MPS
Converter 1.2VP/12A
B+ NB687AGQ-Z_
SMBus
QFN16P_3X3 +0.6VSP/ 2A
SUSP# FOR
S5 DDR4
SYSON S3

PGOOD
+2.5VPP/ 1A
BaTT+ PAGE 64

B B

Main
Battery MPS
Polymer Converter
3S2P NB693GQ-Z_
QFN16_3X3 +0.9VSP/10A
FOR System power
PAGE 63
EN PGOOD ALW_PWRGD

intesil VDDCR_VDD /35A


ISL62771HRTZ_
TQFN40_5X5
VDDCR__SOC / 10A
APUPWR_EN ENFOR APU Core Power
A PAGE 61 A
PGOOD VCore PG

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date Power Diagram


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Date: Friday, March 01, 2019 Sheet 66 of 67
5 4 3 2 1
5 4 3 2 1

UC1 ZEN3@

ZZZ1

@ H20
S IC RYZEN 3 YM330BC4T4MFG 2.1G BGA 1140 IP 01 ! @ H1 @ H2 @ H19 HOLEA
HOLEA HOLEA HOLEA PAD_CT6P0D3P3
SA00009X910
PAD_OB6P1X7P0D2P1X3P0 PAD_CT6P0D2P8 PAD_CT6P0D2P8

1
PCB FA495 NM-C131 NS-C131/C132/C133/C134/C135

1
STUD For WWAN STUD For SSD
DAZ1CM00100 STUD For WLAN
UC1 ZEN5@

EVT phase error


D PCB PN D

S IC RYZEN 5 YM350BC4T4MFG 2.1G BGA 1140 IP 01 ! @ H4 @ H5 @ H6 @ H7 @ H8


HOLEA HOLEA HOLEA HOLEA HOLEA
SA00009X810
PAD_C6P5D2P5 PAD_C6P5D2P5 PAD_C6P5D2P5 PAD_C6P5D2P5 PAD_C6P5D2P5

1
UC1 ZEN7@ ZZZ2 DYL@ 1017 H15 H16 H17 H18 change from
PAD_C6P0D3P6 to PAD_C6P0D3P2
Follow Vendor test result

@ H9 @ H10 @ H11 @ H15 @ H16


HOLEA HOLEA HOLEA HOLEA HOLEA
S IC RYZEN 7 YM370BC4T4MFG 2.3G BGA 1140 IP 01 ! HDMI LOGO PAD_C6P5D2P5 PAD_C6P5D2P5 PAD_C6P5D2P5 PAD_C6P0D3P2 PAD_C6P0D3P2
SA00009X310 RO00000040J

1
APU PN HDMI LOGO PN

@ NH3 @ NH4 @ H17 @ H18


HOLEA HOLEA HOLEA HOLEA
U148 GSE_ST@ PAD_C2P5D2P5N PAD_O2P0X2P3D2P0X2P3N PAD_C6P0D3P2 PAD_C6P0D3P2
U148 GSE_KIO@

1
S IC LIS2DWLTR LGA 12P G-SENSOR, A.3
SA00009AQ00 S IC KX022-1020 LGA 12P G-SENSOR, A.3 @ FD1 @ FD2
FIDUCIAL_C40M80 FIDUCIAL_C40M80
SA000081E00

1
G SENSOR PN
@ FD3 @ FD4 @ NH1 @ NH2
FIDUCIAL_C40M80 FIDUCIAL_C40M80 HOLEA HOLEA
PAD_C2P6D2P6N PAD_C2P0D2P0N

1
UTPM1 TPM_NUV@ UTPM1 TPM_ST@ @ FD5 @ FD6
FIDUCIAL_C40M80 FIDUCIAL_C40M80 2018/8/23 new add

1
Follow T490
S IC NPCT750LABYX QFN 32P TPM 2.0 QS/MP, A.3 S IC ST33HTPH2E32AHC0 VQFN 32P TPM 2.0, A.3
For ME Delete H3 H12 H14 H19
SA00008KS20 SA000089E20
C C

TPM PN

U188 CR_REA@ U188 CR_GEN@

S IC RTS5232S-GR QFN 32P CARD READER, A.3 S IC GL9750-OIYL3 QFN 32P CARD READER, A.1
SA000077K00 SA00009JG00

CARD READER PN

X76 RTC PN

DRAM PN BOARD ID CONFIGURE UZQ T7 Pin CHA


SDP/DDP
B B

UD1 S16Gb@ UD2 S16Gb@ UD3 S16Gb@ UD4 S16Gb@ RC1612 S16Gb@ RC1613 S16Gb@ RC1615 S16Gb@ RD280 S16Gb@ RD239 S16Gb@ RD265 S16Gb@ RD249 S16Gb@ RD275 S16Gb@

Samsung D16G
K4AAG165WA-BCTD
SA00009PX00
K4AAG165WA-BCTD
SA00009PX00
K4AAG165WA-BCTD
SA00009PX00
K4AAG165WA-BCTD
SA00009PX00
10K_0402_5%
SD02810028T
2K_0402_5%
SD02820010T
2K_0402_5%
SD02820010T
0_0402_5%
SD0280000YT
0_0402_5%
SD0280000YT
0_0402_5%
SD0280000YT
0_0402_5%
SD0280000YT
0_0402_5%
SD0280000YT SDP
UD1 H16Gb@ UD2 H16Gb@ UD3 H16Gb@ UD4 H16Gb@ RC1611 H16Gb@ RC1614 H16Gb@ RC1616 H16Gb@ RD280 H16Gb@ RD239 H16Gb@ RD265 H16Gb@ RD249 H16Gb@ R405 H16Gb@ R11114 H16Gb@ R11046 H16Gb@ R515 H16Gb@ RD257 H16Gb@ RD266 H16Gb@

K4AAG165WA-BCTD K4AAG165WA-BCTD K4AAG165WA-BCTD K4AAG165WA-BCTD 2K_0402_5% 10K_0402_5% 10K_0402_5%


Hynix D16G 240_0402_1% 240_0402_1% 240_0402_1% 240_0402_1% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 39_0201_5% DDP
SA000099P10 SA000099P10 SA000099P10 SA000099P10 SD02820010T SD02810028T SD02810028T SD000009T0T SD000009T0T SD000009T0T SD000009T0T SD0280000YT SD0280000YT SD0280000YT SD0280000YT SD0280000YT SD00002180T

UD1 M16Gb@ UD2 M16Gb@ UD3 M16Gb@ UD4 M16Gb@ RC1611 M16Gb@ RC1614 M16Gb@ RC1615 M16Gb@ RD280 M16Gb@ RD239 M16Gb@ RD265 M16Gb@ RD249 M16Gb@ R405 M16Gb@ R11114 M16Gb@ R11046 M16Gb@ R515 M16Gb@ RD257 M16Gb@ RD266 M16Gb@

MT40A1G16KNR-075:E MT40A1G16KNR-075:E MT40A1G16KNR-075:E MT40A1G16KNR-075:E 2K_0402_5% 10K_0402_5% 2K_0402_5%


Micron D16G 240_0402_1% 240_0402_1% 240_0402_1% 240_0402_1% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 39_0201_5% DDP
SA000090M00 SA000090M00 SA000090M00 SA000090M00 SD02820010T SD02810028T SD02820010T SD000009T0T SD000009T0T SD000009T0T SD000009T0T SD0280000YT SD0280000YT SD0280000YT SD0280000YT SD0280000YT SD00002180T

DRAM X76
S16GbX4@ M16GbX4@ H16GbX4@
ZZZ14 ZZZ16 ZZZ17

A
SAMSUNG D8G
X7646901005
MICRON D8G
X7646901001
HYNIX D8G
X7646901006
DRAM A

Security Classification LC Future Center Secret Data Title


Issued Date 2014/07/01 Deciphered Date 2015/12/31 SCREW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Drift AMD
Dat e : Friday, March 01, 2019 Sheet 67 of 67
5 4 3 2 1

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