Faculty Orientation Workshop (FOW)

on
Basic Electronics Engineering (BXE)
First Year Engineering
(2024 Course)
UNIT II
Transistors and Technology
Mali M. B.
Ph.D. (VLSI)
Professor & Head
Department of E&TC
Sinhgad College of Engineering, Pune - 41
16 December 2024 1
 Course Objectives

To study the operating principles

and applications of Bipolar Junction
Transistors & MOSFET.

16 December 2024 2
 Course Outcomes

• Understand the working of BJT,

MOSFET, their characteristics &
compare.

16 December 2024 3
 Contents
Bipolar Junction Transistor: Construction, type, Operation, V-I
Characteristics in common Emitter Mode.

BJT as switch and Common Emitter(CE) amplifier.

Enhancement Metal Oxide Semiconductor Field Effect

Transistors (EMOSFET): Construction, Types, Operation, V-I
characteristics.

MOSFET as Switch & Amplifier.

Introduction to VLSI Technology, Feature size/Channel Length.

N Well method of VLSI CMOS manufacturing.

#Exemplar: Audio Amplifier / PA System, CMOS ICs in Cell phone &

4
Laptops, Pen Drives.
 Introduction
• The semiconductor device like a diode cannot amplify a
signal, therefore its application area is limited.

• The next development of semiconductor device after diode is a

Bipolar Junction Transistor (BJT).

• It is a three terminal device. The terminals are – collector,

emitter, and base. Out of which the base is a control terminal.

• A signal of small amplitude applied to the base is available in

the “magnified” form at the collector of the transistor.

• Thus the large power signal is obtained from a small power

signal.
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 History of Transistor

1948 – The year of establishment of E&TC - COEP

16 December 2024 6
http://www.bellsystemmemorial.com/belllabs_transistor.html
 Why is it called transistor ?

• The term transistor was derived from the words

TRANSFER & RESISTOR.

• Transfers input signal current from a low resistance

path to a high resistance path.
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 N-P-N transistor

C
C
Collector

N Collector Base
Junction JC

P B
B
Emitter Base Base
Junction JE
N
E
Emitter
E

16 December 2024 8
 The BJT – Bipolar Junction Transistor

npn pnp

E n p n C E p n p C

Cross Section C Cross Section C

B B
B B
Schematic Schematic
Symbol Symbol
E E

Normally Emitter layer is heavily doped, Base is lightly doped and Collector layer
has Moderate doping.
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 Transistor Currents

Collector Base
Junction JC

P B
B
Emitter Base Base
Junction JE
N
E
Emitter
E

16 December 2024 10
 Number of P-N Junctions and Equivalent Circuits

E
Emitter

N E

B P B
Base

N C

C
Collector

16 December 2024 11
 An unbiased Transistor – Depletion region
• For an unbiased transistor no external power supplies are
connected to it

Base
Junction Junction
JEB JCB

+ - - - - +
+ - - - - +
Emitter Collector
+ - - P - - +
N N
+ - - - - +
+ - - - - +

Depletion Depletion
region region
16 December 2024 12
 Transistor biasing in the active region

Sr. Region of Base emitter Collector base

application
No. operation junction junction
Reverse Reverse
1 Cutoff region transistor is OFF
biased biased
Saturation Forward Forward transistor is ON
2
region biased biased
Active Forward Reverse
3 Amplifier
region biased biased

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 Transistor operation in the active region P-N-P
Junction Junction
JEB JCB

P N P

Emitter collector
N P

holes emitted
holes collected

RE RC
conventional
current
-
+ + -
Base

Conventional
current
16 December 2024 VEE IE = IC + IB VCC 14
 Transistor Configurations
• Depending on which terminal is made common to input and
output ports, there are three possible configurations of the
transistor.

• Common Base (CB) configuration

• Common Emitter (CE) configuration

• Common Collector (CC) configuration

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 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
JEB JCB

Emitter collector
N P N

Electron emitted
Electron collected

(injected collector current) RC

RE Direction
Direction Conventional Direction
Conventional Current IB Conventional
Current IE Current IC
- + - + (INJ)
Base

Emitter electron
current
16 December 2024 VEE VCC 16
 Transistor operation in the N-P-N
common base configuration
JEB JCB

+ - - - - +
+ - - - - +
Emitter collector
+ - - - - +
N N
+ - - - - +
+ - - P - - +

Depletion Depletion RC
region region
ICBO is a reverse saturation IC=ICB
VCC O
Current flowing due to the +
Base -
Minority carriers between
Collector and base when the
Emitter is open. ICBO flows due to the reverse ICBO
Biased collector base junction. Is a collector to base leakage current
16 December 2024 17
ICBO is neglected as compared to IC with open emitter
 Current relations in CB configuration

• Current amplification factor ( αdc)

• the current amplification factor is the ratio of collector current
due to the injection of total emitter current
IC = IC(INJ) + ICBO
αdc = IC(INJ) / IE
IC(INJ) = αdc IE

IC = αdcIE + ICBO
But ICBO is negligibly small

IC = αdcIE
Therefore the current amplification factor

αdc= IC / IE
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 Characteristics of transistor in CB configuration
Input characteristics VCB
VCB
4V
8V
IE IE
E C
N P N

- +
RE VBE JE JC
+ VCB =8V ΔIE

- + -

B
VEE

IE VBE
E C
ΔVBE
- +
VBE Input resistance
RE
VCB =8V Ri = ΔVBE / ΔIE
+
- + -
As the change in emitter current is very large for a
16 December 2024 B Small change in input voltage, the input resistance19
VEE Ri is small
 Characteristics of a transistor in CB configuration
“Early effect” or “base width modulation”.
zero effective base width
At larger values of VCB Wider Depletion
Region for larger values of VCB

JE JC

- - - - - - +
- - - - - - +
Emitter Emitter collector
- - - - - - + Collector
N Base N
P- - - - - - +
- - - - - - +

Total base width VCB increases extremely

● For extremely large VCB the effective base width may be reduced to zero,
causing voltage breakdown of a transistor.
● This phenomenon is known as punch through.
16 December 2024 20
 Characteristics of a transistor in CB configuration
Output characteristics
IC Active region
Constant
IE=3mA
(m (high output dynamic
C
E N P N IC A) resistance)

+ 3 IE=3 mA
RE JE JC VC RC 2 IE=2 mA
B
- + - + 1 IE=1 mA
IC=ICB
IE=0
B O
VEE VCC
-1 0 5 10 VC
B
Constant IE=3mA IC C Cutoff region
E Both the junctions
+ are reverse biased
-
VC RC
RE VEB
+ - B saturation region
Both the junctions
- + - +
are forward biased

16 December 2024
VEE B VCC 21
 Characteristics of a transistor in CB configuration
Transfer characteristics

IC (mA)
VCB constant
4

Slope = ΔIC / ΔIE = αdc

2

0 1 2 3 4
IE (mA)

αdc = ΔIC / ΔIE

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 Characteristics of a transistor in CE configuration
Input characteristics
C
• It is a graph of input current (IB)
versus input voltage (VBE) at a IC
constant output voltage (VCE). N

IB
(μA) VCE
VCE = 4V 10V constant
IB JC +
P
B VCC
ΔIB JE
-
Ri=ΔVBE/ΔIB
RB VBE
ΔVBE
N
VCE Constant VBB +

0 0.7 1 2
IE
VBE
- E
The value of dynamic input resistance “Ri”
16 December 2024 N-P-N Transistor 23
is low for CE
 Characteristics of a transistor in CE configuration
Output characteristics
• It is a graph of output current (Ic)
versus output voltage (VCE) at a C
constant input current (IB) IC

βdc = IC /IB RE
Saturation Active
region region
IC IB = 4μA
+
(mA)
4 B
IB = 4μA
3
IB = 3μA VBE VCE -
RB VCC
2
IB = 2μA
VBB + IE
1 IB = 0

1 2 3 4 E
VCE -
N-P-N Transistor
16 December 2024 Cutoff region 24
 Characteristics of a transistor in CE configuration
Transfer characteristics

IC (mA)
VCE constant
4

Slope = ΔIC / ΔIB = βac

2

0 1 2 3 4
IB (μA)

β ac = ΔIC / ΔIB

16 December 2024 β dc = IC / IB VCE constant 25

 Comparison of configurations
Sr. No. Parameter CB CE CC
1 Common terminal Base Emitter Collector
between input and output
2 Input current IE IB IB
3 Output current IC IC IE
4 Current gain αDC = IC/IE βDC = IC/IB
γ = IE/IB
Less than one High
HIGH
5 Input Voltage Veb Vbe Vbc
6 Output voltage Vcb Vce Vec
7 Current gain Less than unity High High
8 Input resistance Very low (20Ω) Low (1KΩ) High(500kΩ)
9 Output resistance Very high (1M) High(40kΩ) Low (50Ω)
10 Application As preamplifier Audio Impedance
amplifier matching
11. Voltage gain Medium Large Less than 1
16 December 2024 26
 Transistor Biasing
• What is meant by dc biasing of a transistor ?

• Depending on the application, a transistor is to be operated in

any of the three regions of operation namely cutoff, active and
saturation region.

• To operate the transistor in these regions the two junctions of a

transistor should be forward or reverse biased.

16 December 2024 27
 DC Load Line
IC = [-1/RC] VCE + VCC/RC
• and substituting IC = 0 in above equation C
• VCE = VCC or point “B”
IC
RC

DC load line
IC +
(mA)
IC
(MAX)
A -
IB = 4μA VCE VCC
3
IB = 3μA

2
IB = 2μA

1 IB = 0 E

1 2 3 4
VCE
B N-P-N Transistor
16 December 2024 VCE=VCC 28
16 December 2024 29
 Typical Junction Voltages
Voltage Silicon Transistor Germanium Transistor

VBE (Cut-off) 0 - 0.1V

VBE (Cut-in)
0.5v 0.1V

VBE (Active)
0.7V 0.2V

VBE (Saturation)
0.8V 0.3V

VCE (Saturation)
0.2V 0.1V

16 December 2024 30
 Biasing circuits
To avoid a shift of Q-point, bias-stabilization is
necessary. Various biasing ckts can be used for this
purpose.

• Fixed bias
• Collector-to-base bias
• Self Biased or Voltage divider bias
• Fixed bias with emitter resistor
• Emitter bias

16 December 2024 31
 Single Stage RC Coupled CE Amplifier
+VCC

R1 & R2 are Biasing C1 & C2 are

Resistor Coupling
R RC Capacitors
C2
1 V
Amplified
C1 O
signal
Vi output
Signal to Signal
be RL
Amplified
R RE CE
2
16 December 2024 Bypass Capacitor 32
 BJT as a Switch
• When operated in
saturation, the BJT
acts as a closed switch.
• When operated in
cutoff, the BJT acts as
an open switch.

16 December 2024 33
 MOSFET

16 December 2024 34
 FIELD-EFFECT TRANSISTORS ( FET)

• FETs are the uni polar devices because, unlike BJTs

that use both electron and hole current, they operate
only with one type of charge carrier.

• The two main types of FET are -

Junction Field Fffect Transistor (JFET) and

Metal Oxide Semiconductor Field Effect Transistor
(MOSFET)

16 December 2024 35
 Current & Voltage Controlled Devices

16 December 2024 36
 Field Effect Transistors - Classification

16 December 2024 37
 MOSFET (IGFET)
• The MOSFET (metal oxide semiconductor field effect
transistor) is the category of FET.

• The MOSFET differs from the JFET in that it has no PN

junction structure; instead, the gate of the MOSFET is
insulated from the channel by a silicon dioxide (Sio2) layer.

• Two basic types of MOSFETS are :

Depletion ( D ) MOSFET and
Enhancement ( E ) MOSFET

• Because of the insulated gate, these devices are also called

as IGFET.
16 December 2024 38
 ENHANCEMENT MOSFET ( E-MOSFET)

MOSFET was
invented by
Atalla & Dawon
at Bell Labs in
1959
16 December 2024 39
 Linear & Saturation Regions

16 December 2024 40
16 December 2024 41
 Transfer & Drain Characteristics

16 December 2024 42
 MOSFET as an Amplifier

16 December 2024 43
 MOSFET as a SWITCH

16 December 2024 44
 BJT MOSFET
It is a current controlled device. It is a voltage controlled device.
It is a bipolar device (Current flows due It is a unipolar device (Current flows due
to both majority & minority carriers). to only majority carriers).
Thermal Runaway can damage the BJT Thermal Runaway does not take place
Input resistance (Ri) is very low. Output resistance (Ro) is very high.
Transfer characteristics are linear in Transfer characteristics are non-linear in
nature. nature.
More sensitive Less sensitive
AC Voltage Gain is HIGH AC Voltage Gain is Less
Bigger in size. Smaller in size.
Regions of operation: Saturation – ON Regions of operation: Ohmic – ON
Switch , Cut off – OFF Switch Switch, Saturation – Amplifier ,
Active – Amplifier Cut off – OFF Switch
It is more noisy. It is less noisy.
Switching speed is less. Switching speed is high.
Symbol Symbol
16 December 2024 45
16 December 2024 46
 Introduction to VLSI Technology
• What is VLSI ?

• History and Evolution of VLSI

• Key Features of Very Large Scale Integration (VLSI)

• Advantages of VLSI

16 December 2024 47
Feature size/Channel Length/Technology
• The feature size of any semiconductor technology is defined as
the length of the MOS transistor channel between the drain
and the source.

• This length is reducing drastically due to advancement in

technology.

16 December 2024 48
 n-well Method / Process

16 December 2024 49
 n-well Method / Process
• Step 1 : A thin layer of SiO 2 is deposited which will serve as a the pad oxide.
• Step 2 : Deposition of a thicker sacrificial silicon nitride layer by chemical vapour deposition (CVD).
• Step 3 : A plasma etching process using the complementary of the active area mask to create
trenches used for insulating the devices.
• Step 4 : The trenches are filled with SiO 2 which is called as the field oxide.
• Step 5 : To provide flat surface chemical mechanical planerization is performed and also sacrificial
nitride is removed.
• Step 6 : The n-well mask is used to expose only the n-well areas, after this implant and annealing
sequence is applied to adjust the well doping. This is followed by second implant step to adjust
the threshold voltage of the PMOS transistor.
• Step 7 : Implant step is performed to adjust the threshold voltage of NMOS transistor (NMOSFET).
• Step 8 : A thin layer of gate oxide and Polysilicon is chemically deposited and patterned with the help of
Polysilicon mask.
• Step 9 : Ion implantation to dope the source and drain regions of the PMOS (p + ) and NMOS (n + )
transistors, this will also form n + Polysilicon gate and p + Polysilicon gate for NMOS and
PMOS transistors respectively. Hence this process is called as self aligned process.
• Step 10 : Then the oxide or nitride spacers are formed by chemical vapour deposition.
• Step 11 : In this step contact or via holes are etched, metal is deposited and patterned. After the
deposition of last metal layer final passivation or overglass is deposited for protection.

16 December 2024 50
• https://www.vlsi-expert.com/2014/09/create-
n-well-and-field-oxide-cmos.html

16 December 2024 51
 Important Instruction's/Guidelines

• Questions will be asked only on Common Emitter

Configuration (not on CB & CC – Working &
Characteristics )
• Simple Numerical on Current Amplification Factor (α,
β & γ)
• No Derivation/Questions on DC Load Line
• VLSI & n-Well Method
• Do not ask Question on Exemplar

16 December 2024 52
 Conclusion
• Start with need of device.
• Give history in brief.
• Opportunities –
✔ Telecom
✔ Consumable
✔ Automotive
✔ Space
✔ Robotics
✔ Medical
• Explore names of Semiconductor companies in Pune.
• Make them proud of E&TC.
16 December 2024 53
 Thank You
madanbmali@gmail.com
mbmali.scoe@sinhgad.edu
hodetc.scoe@sinhgad.edu
Cell: 9822893167

16 December 2024 54