EPC9151 QSG
EPC9151 QSG
Revision 1.0
QUICK START GUIDE Demonstration System EPC9151
DESCRIPTION
The EPC9151 1/16th brick evaluation power module is designed for 48 V to/from
12 V DC-DC applications. It features the EPC2152 ePower™ stage – enhancement
mode eGaN® field effect transistors (FETs) with integrated gate drivers, as well as the
Microchip dsPIC33CK32MP102 16-bit digital controller. Other features include:
• High efficiency: 95% @ 12 V/25 A output (buck)
95% @ 48 V/5.5 A output (boost)
• Dimension: 33 mm x 22.9 mm x 9 mm (1.30 in. x 0.90 in. x 0.35 in.)
• Industry standard footprint and pinout
• Power good output
• Constant switching frequency: 500 kHz
• Remote output voltage sense (buck)
• Re-programmable – Average current mode control (default) EPC9151 top view
• Fault protection:
o Input undervoltage
o Input overvoltage
o Regulation error
o Inductor overcurrent
REGULATORY INFORMATION
This power module is for evaluation purposes only. It is not a full-featured power
module and cannot be used in final products. No EMI test was conducted. It is not
FCC approved.
FIRMWARE UPDATES
The module is programmed as a Buck converter by default. To change to Boost
converter, please re-program the module with the boost firmware. Using the
incorrect firmware could result in damage. EPC9151 bottom view
Every effort has been made to ensure all control features function as specified.
It may be necessary to provide updates to the firmware. Please check the EPC and
Microchip websites for the latest firmware updates.
14
94
12
Efficiency (%)
10
Loss (W)
92
8
400 LFM 6 400 LFM
90
1700 LFM 1700 LFM
4
88 2
0 5 10 15 20 25 0 5 10 15 20 25
IOUT (A) IOUT (A)
Figure 1. 48 V input, 12 V output (Buck)
96 16
14
94
12
Efficiency (%)
10
Loss (W)
92
8
9151 Boost, 6
90 9151 Boost,
1700 LFM 1700 LFM
4
88 2
0 1 2 3 4 5 6 0 1 2 3 4 5 6
IOUT (A) IOUT (A)
Figure 2. 12 V input, 48 V output (Boost)
ELECTRICAL PERFORMANCE
Typical output voltage ripple
1 μs/div 1 μs/div
50 mV/div 200 mV/div
Figure 3: VIN = 48 V, VOUT = 12 V, IOUT = 25 A (Buck) Figure 4: VIN = 12 V, VOUT = 48 V, IOUT = 5.5 A (Boost)
VOUT VOUT
25 A
5A
IOUT 12.5 A
IOUT 2.5 A
1 ms/div 1 ms/div
500 mV/div 2 V/div
5 A/div 2 A/div
Figure 5: VIN = 48 V, VOUT = 12 V, output 50% (12.5 A) to Figure 6: VIN = 12 V, VOUT = 48 V, output 45% (2.5 A) to
100% (25 A), 250 Hz transitions (Buck) 90% (5 A), 250 Hz transitions (Boost)
Startup waveform
VOUT
VOUT
12.14 48.30
12.13
48.25
12.12
VOUT (V)
VOUT (V)
12.11 48.20
12.10
48.15
12.09
12.08 48.10
0 5 10 15 20 25 0 1 2 3 4 5 6
IOUT (A) IOUT (A)
90 90
Temperature (°C)
Temperature (°C)
80 80
70 70
60 60
50 50
40 40
0 5 10 15 20 25 0 1 2 3 4 5 6
IOUT (A) IOUT (A)
Figure 11: VIN = 48 V, VOUT = 12 V, 1700 LFM, Buck Figure 12: VIN = 12 V, VOUT = 48 V, 1700 LFM, Boost
OPERATING CONSIDERATIONS
Buck/Boost Modes Power good
The module is programmed with Buck mode by default. To operate This module features a power good signal with 3.3 V logic. This signal
as a Boost converter, please download the firmware for Boost mode will be logic high when the output voltage is regulated to +/- 10%
and re-program the module. In Boost mode, input voltage (12 V) is of the set point; and logic low for all other conditions. The maximum
supplied to the Vout+ pin, and the output is at the Vin+ pin. sink/source current on this pin is 6 mA. If the power good feature is
Output capacitance not used, the pin should be left floating.
Minimum external output capacitance of 200 μF is required for Output voltage trim (adjustment)
stability. The maximum capacitance tested is 550 μF. The EPC9531 For Buck mode only: the output voltage of this module can be
test fixture includes this extra capacitance. trimmed (adjusted) by connecting an external resistor between
Input capacitance the Trim pin and Vout- (GND) pin. The new output voltage can be
calculated as follows:
To minimize the impact from the input voltage feeding line, low-
ESR capacitors should be located at the input to the module. It is
recommended that a 33 μF–100 μF input capacitor be placed near
VOUT = VFB RFB1 ( 1
RFB2
+
1
R1 ) + VFB
the module. This will also be the external output capacitance in boost
mode. For this design, VFB is 2.5 V, RFB1 is 18 kΩ, RFB2 is 4.75 kΩ, therefore
Over-current protection
45
If the load current exceeds a pre-determined maximum setpoint, this VOUT = 12 +
R1 [kΩ]
condition will be regarded as a fault condition and the module will
shut down. The module will then attempt to restart after 2 seconds.
The maximum trim voltage is 1 V using this method. It is recom-
This shut down and restart cycle will continue until the over-current mended to re-program the controller to further change the output
condition clears. voltage set point.
Remote On/Off
This feature is not implemented for this module. Please leave EN pin 8 Vout+
floating.
7 Sense+
VFB RFB1
Remote sense 6 Trim
For Buck mode only: remote sense can compensate for output RFB2 R1
voltage distribution drops by sensing the actual output voltage at the
4 Vout–(GND)
point of load. The maximum voltage allowed between the output and
sense pins is 5% of the output voltage (0.6 V for 12 V output). If the
remote sense feature is not used, the pin can be either left floating or Figure 13. External resistor connection for output voltage trim adjust.
connected to Vout+.
CONTROLLER
The EPC9151|1/16th brick evaluation power module features a the behavior of the converter to application specific requirements
Microchip dsPIC33CK32MP102 Digital Signal Controller (DSC). without the need for modifying hardware.
This 100 MHz single core device is equipped with dedicated peripheral There are two firmware versions available for the EPC9151 1/16th
modules for Switched-Mode Power Supply (SMPS) applications, such brick evaluation power module in buck mode: average current mode
as a feature-rich 4-channel (8x output), 250 ps resolution pulse- control (ACMC) and adaptive voltage mode control (AVMC). For the
width modulation (PWM) logic, three 3.5 Msps Analog-To-Digital boost mode, only ACMC is available.
Converters (ADC), three 15 ns propagation delay analog comparators
with integrated Digital-To-Analog Converters (DAC) supporting ramp • Conventional, Robust Average Current Mode Control (ACMC)
signal generation, three operational amplifiers as well as Digital (figure 14): With this firmware the power converter is controlled
Signal Processing (DSP) core with tightly coupled data paths for high- by one outer voltage loop providing a shared reference to two
performance real-time control applications. The device used is the independent inner average current loops controlling the phase
smallest derivative of the dsPIC33CK single core and dsPIC33CH dual current of each converter phase. This conventional approach
core DSC families. The device used in this design comes in a 28 pin ensures proper current balancing between both phases of this
6x6 mm UQFN package, specified for ambient temperatures from interleaved converter, operating 180° out of phase to minimize
-40 to +125° C. Other packages including a 28 pin UQFN package with the input current ripple and filtering. The inner current loops are
only 4x4 mm are available. adjusted to average cross-over frequencies of 10 kHz. To balance
the current reference perturbation of the inner current loops, the
The dsPIC33CK device is used to drive and control the converter in a outer voltage loop has been adjusted to an average cross-over
fully digital fashion where the feedback loops are implemented and frequency of 2 kHz, which determines the overall response time of
executed in software. Migrating control loop execution from analog the converter.
circuits to embedded software enhances the flexibility in terms of
applied control laws as well as making modifications to the feedback For Buck mode only:
loop and control signals during runtime, optimizing control schemes • Adaptive Type IV Voltage Mode Control (AVMC) with featuring
and adapting control accuracy and performance to most recent Adaptive Gain Control (AGC) and Phase Current Balancing PWM
operating conditions. As a result, digital control allows users to tailor Steering (figure 15): The second, alternative firmware is tailored
to intermediate bus converter module applications in power
distribution networks (PDN). The major focus of this firmware lies on
REF +
error HC(z) VOUT reducing PDN segment decoupling capacitance by maximizing the
– Compensator control bandwidth and the output impedance tuning capabilities,
Voltage Loop Voltage
Divider enhancing system robustness while minimizing cost.
Anti-Windup
input output
ADC
output IOUT
error HC(z) Gp(s)
REF +
Compensator PWM
– (Plant A)
Current
Current Loop A Sense
Amp
input
ADC
output IOUT
error HC(z) Gp(s)
REF +
– Compensator PWM (Plant B)
Current
Current Loop B Sense
Amp
input Current Feedback IPH_A IPH_B
ADC
(10 kHz state machine)
Current Current
Figure 14. Interleaved buck converter average current mode control Offset Sense A Sense B
Compare
ADC
ADC
Voltage Feedback
(500 kHz cycle-by-cycle control) Gp(s)
+/– VIN
(Plant A)
output VOUT
error PWM
REF +
HC(z) Distribution
– Compensator Gp(s) Voltage Voltage
Anti- (Plant B) Divider Divider
Windup
input ADC
Figure 15. Interleaved buck converter Adaptive Gain ADC
Control (AGC)
advanced voltage mode control
PROGRAMMING
The Microchip dsPIC33CK controller can be re-programmed using the in-circuit serial programming port (ICSP) available on the RJ-11
programming interface. It supports all of Microchip’s in-circuit programmers/debuggers, such as MPLAB® ICD4, MPLAB® REAL ICE or MPLAB®
PICkit4 and previous derivatives.
Download the latest MPLAB IPE from Microchip website and follow the steps below:
https://www.microchip.com/mplab/mplab-integrated-programming-environment
3 Select programming tool and then connect: 5 Erase device, and then program device:
② Program ① Erase
C:\XXX\...\*.HEX
MECHNICAL SPECIFICATIONS
Pin 1 Chamfer Pin 1
Top view Bottom view
22.9 (0.90)
Pin 4
33.0 (1.30)
Front view
9.0 (0.35)
3.8 (0.15)
Note: Dimensions are in mm (inches)
1 Vin+ 8 Vout+ 8 1
7 Sense+ 7
6 MCLR 2
2 On/Off (Not used) 6 Trim 3.3 V
5 Power good 5 GND
PGD
3 Vin– (GND) 4 Vout–(GND) 4 PGC 3
Microchip Programming /
Communication Interface
THERMAL MANAGEMENT
Thermal management is very important to ensure proper and reliable Thermal derating
operation. Sufficient cooling is required for this module to operate in Without sufficient cooling, the output current capability is reduced.
the full specified output current range. Forced air of 1700 LFM is used The module temperature should be monitored to ensure the
for specification testing. maximum temperature does not exceed the rating. Especially when
the input voltage is higher than 48 V, the maximum output current
Heatsink or heat spreader can also be used.
is reduced.
The hot spots are the GaN ICs (U1 and U2) as shown in figure 18.
U1
U1
U2
U2
6
R99 U90
86.6 k Vin VCC LM5018SD/NOPB 0Ω
20µA
Diode OR PGC
1
Reg
2
3 UVLO U91 PGD
2
J2 1μF, 25 V TPS62177DQCR PGND
V IN
PG
1.225V 3 3
R98 VIN_D BST 7 C98
EN 3V3
C92 Control HS lim 4
16.5 k 0.66V MCLR
SD 10 nF, 100 V 4 5
NC Logic Com p
R90 4 Ron J3
Timer Logic L90 VCC12V
SW 8 DNP
PGND 300 k G ate L91
3V3 8 SLEEP S leep Power 9 3V3
OV 220 μH 190 mA 3V3
1.62V C94 R92 Contr ol
Control Drive
SW 10 μH
3300 pF, 100 V 31.6 k
12 V Supply 5 FB Ilim R94
C93 3V3 10
1 uF, 25 V 22 μF, 6.3 V
1
V OS
1.225V 51 k 10 μF, 16 V
Direct control
& C96 C97 R1
UVLO Setting: 8 V on, 1.7 V hystersis C95 5
C ompens ation
Com p Timer ton toff
Gnd FB
- 6.8 k
fs: 400 kHz 0.1 uF, 50 V +
EA
PGND
DCS -Contr ol
2
1
Ex Pad AGND
R91 MCLR
11
1
3.65 k
3V3
MCP6C02T -050E/CHY
6
U20 U61
1 28 PWM1L CS1+ 3 V IP V DD
R64
VIN VOUT RP46/PWM1H/RB14 RP45/PWM2L/RB13 V OUT 1 ISENSE1
2 27 PWM1H VOUT 4 V IM
GM1 RM 3
RP47/PWM1L/RB15 TDI/RP44/PWM2H/RB12 20 Ω
MCLR 3 26
/MCLR TCK/RP43/PWM3L/RB1 1 GM2
V REF 5 IREF ISENSE1 3V3 3V3
ISENSE1 4 25 EN V SS
R21 R20 OA1OUT/AN0/CMP1A/IBIAS0/RA0 TMS/RP42/PWM3H/RB10
1 10 k 20 Ω ISENSE2 5 24 3V3
OA1IN-/ANA1/RA1 VDD
2
PGND 6 23 PGND IREFDAC 1 R63 2 OA2IN+ C60 C61 C62
OA1IN+ /AN9/RA2 VSS
VIN_SNS VOUTS IREFDAC 7 22 PWM2H 51 pF, 50 V 2.2 μF, 25 V 0.1 μF, 25 V
DACOUT/AN3/CMP1C/RA3 PGC1/AN1 1/RP41/SDA1/RB9 10 k
VOUT_SNS 8 21 PWM2L C68
AN4/CMP3B/IBIAS3/RA4 PGD1/AN10/RP40/SCL1/RB8
R22 AVDD 9 20 VIN_SNS 220 pF, 50 V
C33 AVDD TDO/AN2/CMP3A/RP39/RB7
4.87 k R23 PGND 10 19 PGC
1 nF, 25 V 18 k AVSS PGC3/RP38/SCL2/RB6
3V3 11 18 PGD
VOUT_SNS VDD PGD3/RP37/SDA2/RB5
PGND 12 17 OA2IN+ 3V3
VSS PGC2/OA2IN+ /RP36/RB4
13 16
R24 OSCI/CLKI/AN5/RP32/RB0 PGD2/OA2IN-/AN8/RP35/RB3
PG 14 15 IREF
4.75 k OSCO/CLKO/AN6/RP33/RB1 OA2OUT/AN1/AN7/ANA0/CMP1D/CMP2D/CMP3D/RP34/INT0/RB2 MCP6C02T -050E/CHY
C34
6
1 nF, 25 V DSPIC33CK32MP102-E/2N U62
CS2+ 3 V IP V DD
R65
V OUT 1 ISENSE2
TP1 VOUT 4 V IM
GM1 RM 3
20 Ω
PG
1 GM2
5 IREF
V REF
ISENSE2 3V3 3V3
.040 dia pin J4 V SS
VOUT
2
TP2
EN C63 C64 C65
1 51 pF, 50 V 2.2 μF, 25 V 0.1 μF, 25 V
.040 dia pin
J5
TP9
VOUTS
3V3 3V3 3V3 AVDD 1
C44 C45 C46 C47 C23 C12 C24 C25 C19 C21 C35 C9 C11 C26 C31
220 nF, 100 V 220 nF, 100 V 220 nF, 100 V 220 nF, 100 V 220 nF, 100 V 220 nF, 100 V 220 nF, 100 V 220 nF, 100 V 1uF, 100V 1uF, 100V 1uF, 100V 1uF, 100V 1uF, 100V 1uF, 100V 1uF, 100V
C14
U1 0.1uF, 25V
R2 R3
10 Ω Vdd12 10 Ω
VCC12V 1 2 2 Vdd12F 1 1 2 SW1
Sync
boot
C17
Vin 5,9 VIN
2.2 μF, 25 V
PWM1H 3 HSin Level Output
Shift Driver VOUT
Logic
R32 L1
+ R61 VOUT
22 k SW 6,7 SW1 CS1+
UVLO Vdd12 10,11 B82559A0242A013 1 mΩ
+ C67
PWM1L 4 LSin POR 2.4 μH
Output 10 nF, 50 V
Driver C5 C6 C7 C8 C10
R33 22 μF, 25 V 22 μF, 25 V 22 μF, 25 V 22 μF, 25 V 22 μF, 25 V
22 k 8 Vss Vss 8,12
PGND
EPC2152
PGND
C22
U2 0.1uF, 25 V
R4 R5
10 Ω Vdd12 10 Ω
VCC12V 1 2 2 Vdd12F 1 1 2 SW2
Sync
C18 boot VOUT
2.2 μF, 25 V Vin 5,9 VIN
PGND
EPC would like to acknowledge Microchip Technology Inc. (www.microchip.com) for their support of this project.
Microchip Technology Incorporated is a leading provider of smart, connected and secure embedded control solutions. Its easy-to-use development
tools and comprehensive product portfolio enable customers to create optimal designs, which reduce risk while lowering total system cost and
time to market. The company’s solutions serve customers across the industrial, automotive, consumer, aerospace and defense, communications and
computing markets.
The EPC9151 system features the dsPIC33CK32MP102 16-Bit Digital Signal Controller with High-Speed ADC, Op Amps, Comparators and High-
Resolution PWM. Learn more at www.microchip.com.
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