Common-Mode Response
An important attribute of differential amplifiers is their ability to suppress the
effect of common-mode perturbations. Example 4.8 portrays an idealized
case of common-mode response. In reality, neither is the circuit fully
symmetric nor does the current source exhibit an infinite output impedance.
As a result, a fraction of the input CM variation appears at the output.
We first assume that the circuit is symmetric, but the current source has a
finite output impedance, RSS [Fig. 4.29(a)]. As Vin,C M changes, so does VP ,
thereby increasing the drain currents of M1 and M2 and lowering both VX
and VY . Owing to symmetry, VX remains equal to VY and, as depicted in Fig.
4.29(b), the two nodes can be shorted together. Since M1 and M2 are now “in
parallel,” i.e., they share all of their respective terminals, the circuit can be
reduced to that in Fig. 4.29(c). Note that the composite device, M1 + M2, has
twice the width and the bias current of each of M1 and M2 and, therefore,
twice their transconductance. The “common-mode gain” of the circuit is thus
equal to
where gm denotes the transconductance of each of M1 and M2 and λ = γ =
0.
What is the significance of this calculation? In a symmetric circuit, input CM
variations disturb the bias points, altering the small-signal gain and possibly
limiting the output voltage swings. This can be illustrated by an example.
The foregoing discussion indicates that the finite output impedance of the
tail current source results in some common-mode gain in a symmetric
differential pair. Nonetheless, this is usually a minor concern. More
troublesome is the variation of the differential output as a result of a change
in Vin,C M , an effect that occurs because in reality the circuit is not fully
symmetric, i.e., the two sides suffer from slight mismatches during
manufacturing. For example, in Fig. 4.29(a), RD1 may not be exactly equal to
RD2.
We now study the effect of input common-mode variations if the circuit is
asymmetric and the tail current source suffers from a finite output
impedance. Suppose, as shown in Fig. 4.31, RD1 = RD and RD2 = RD + RD,
where RD denotes a small mismatch and the circuit is otherwise symmetric.
Assume that λ = γ = 0 for M1 and M2. What happens to VX and VY as Vin,C
M increases? We recognize that M1 and M2 operate as one source follower,
raising VP by
Since M1 and M2 are identical, ID1 and ID2 increase by [gm/(1 + 2gm
RSS)]Vin,C M , but VX and VY change by different amounts:
Thus, a common-mode change at the input introduces a differential
component at the output. We say that the circuit exhibits common-mode to
differential conversion. This is a critical problem because if the input of a
differential pair includes both a differential signal and common-mode noise,
the circuit corrupts the amplified differential signal by the input CM change.
The effect is illustrated in Fig. 4.32.
In summary, the common-mode response of differential pairs depends on the
output impedance of the tail current source and asymmetries in the circuit,
manifesting itself through two effects: variation of the output CM level (in the
absence of mismatches) and conversion of input common-mode variations to
differential components at the output. In analog circuits, the latter effect is
much more severe than the former. For this reason, the common-mode
response should usually be studied with mismatches taken into account.
How significant is common-mode to differential conversion? We make two
observations. First, as the frequency of the CM disturbance increases, the
total capacitance shunting the tail current source introduces larger tail
current variations. Thus, even if the output resistance of the current source is
high, common-mode to differential conversion becomes significant at high
frequencies. Shown in Fig. 4.33, this capacitance arises from the parasitics of
the current source itself as well as the source-bulk junctions of M1 and M2.
Second, the asymmetry in the circuit stems from both the load resistors and
the input transistors, the latter contributing a typically much greater
mismatch.
Let us study the asymmetry resulting from mismatches between M1 and M2
in Fig. 4.34(a). Owing to dimension and threshold voltage mismatches, the
two transistors carry slightly different currents and exhibit unequal
transconductances. We assume that λ = γ = 0. To calculate the small-signal
gain from Vin,C M to X and Y , we use the equivalent circuit in Fig. 4.34(b),
writing ID1 = gm1(Vin,C M − VP ) and ID2 = gm2(Vin,C M − VP ). Since (ID1
+ ID2)RSS = VP ,
We now obtain the output voltages as
The differential component at the output is therefore given by
In other words, the circuit converts input CM variations to a differential error
by a factor equal to
where AC M−DM denotes common-mode to differential-mode conversion and
gm = gm1 − gm2.
For a meaningful comparison of differential circuits, the undesirable
differential component produced by CM variations must be normalized to the
wanted differential output resulting from amplification. We define the
“common-mode rejection ratio” (CMRR) as the desired gain divided by the
undesired gain:
If only gm mismatch is considered, the reader can show from the analysis of
Fig. 4.17 that
where gm denotes the mean value, that is, gm = (gm1 + gm2)/2. In practice,
all mismatches must be taken into account. Note that 2gm RSS 1, and hence
CMRR ≈ 2g2 m RSS/gm.
