Okay, I will consolidate all the categorized questions from 2022 down to 2016 into a single text

block. You can then copy this text and save it as a file named "distribution".

This will combine the 2021 and 2022 question categorizations I provided previously with the
questions from 2016 to 2020 extracted from your "distribution.pdf" file.

Here is the consolidated distribution of questions:

M1: Fundamentals of Embedded Systems

 2022 - Section B
o Q. 5(a) Define embedded system. Discuss about typical characteristics of embedded systems. (4
marks)
o Q. 5(b) Discuss various types of processors used in embedded system designing purpose. (4
marks)
o Q. 5(c) Differentiate between microprocessor and microcontroller. (4 marks)
 2021 - Section A
o Q.1.(a) Define system. Briefly explain a system you observed in your class-room highlighting
the key features of a system. (04 marks)
o Q.1.(b) Mr. X manages various sensors installed in his house using embedded system connected
via the IP protocol. He can control these sensors remotely through a smartphone from his office.
Mention the type of embedded systems Mr. X is using and discuss their functionalities. (04
marks)
o Q.1.(c) Discuss the application of microcontroller in embedded system. (04 marks)
 2020 - Section A
o Q1(a) Define embedded system. Explain the architecture of embedded system. (05 marks)
o Q 1(b) Differentiate between embedded system and general purpose system. (03 marks)
o Q 1(c) Consider a microwave oven. What kind of system is this? Mention the characteristics of
this system. (04 marks)
 2019 - Section A
o Q. 1(a) Define embedded system? What are requirements of embedded system? (03 marks)
o Q. 1(b) Draw the architecture and explain each component of an embedded system. (03 marks)
o Q. 1(c) What are the categories of embedded system? Classify the processors of embedded
system. (03 marks)
o Q. 1(d) How the Von-Neumann architecture can be differentiated from the Harvard architecture?
(03 marks)
 2018 - Section A
o Q. 1(a) What do you mean by System-on-Chip (SoC)? How will the definition of an embedded
system change with a System-on-Chip? (03 marks)
o Q. 1(b) Consider the voice command feature of your smart phone. What kind of embedded
system is this? Mention all the characteristics of that type of embedded system in detail. (03
marks)
o Q. 1(c) Differentiate between CISC and RISC processor architecture. Determine which one is
best based on the program execution time. (04 marks)
o Q. 1(d) What are the constraints that should be kept in mind while designing an embedded
system? (02 marks)
 2017 - Section A
o Q.1. (a) What is an embedded system? Write down some applications of embedded system. (03
marks)
o Q.1. (b) Draw and explain the architecture of embedded system. (05 marks)
o Q.1. (c) What are the differences between embedded system and general purpose computing? (04
marks)
 2016 - Section A
o Q.1. (a) Define embedded system. What are the requirements of embedded system? (03 marks)
o Q.1. (b) Distinguish between Harvard and Von Neumann architecture with diagram. (03 marks)
o Q.1. (c) What are the various classifications of embedded systems? (03 marks)
o Q.1. (d) What are the challenges of embedded systems? (2.5 marks)
 2016 - Section B
o Q.7. (a) Mention two basic differences among PLC, FPGA. and microcontroller. (04 marks)
(This is a comparative question fitting here for the "microcontroller" aspect and general system
understanding)
o Q.8. (a) What is PLC? How is it different from the microcontroller? (3.5 marks) (Microcontroller
comparison part)

M2: The 8051 Microcontroller: Architecture, Programming & Interfacing

 2022 - Section B
o Q. 6(a) Define branching instruction. Discuss the execution procedure of short absolute JUMP
instruction of 8051 microcontroller. (4 marks)
o Q. 6(b) Justify the significance of indexed addressing mode of 8051 microcontroller with proper
example. (3 marks)
o Q. 6(c) Write an assembly language program for 8051 microcontroller to subtract a 16 bit
number stored at locations 51H-52H from 55H-56H and store the result in locations 40H and
41H. Assume that the least significant1 byte of data or result is stored in low address. (5 marks)
o Q. 7(a) Discuss the timer-counter control logic of 8051 microcontroller with neat sketch. (4
marks)
o Q. 7(b) Discuss the function of each bit of the following registers of 8051 microcontroller. (i) IE,
and (ii) TMOD. (4 marks)
o Q. 7(c) Write an assemble language program for a 8051 microcontroller to generate a square
wave of 50% duty cycle with frequency of 1KHz on Pin P2.3 using timmer 1, mode 1. Assume
the crystal oscillator frequency to be 12 MHz. (4 marks)
o Q. 8(a) Discuss the hardware and software controlling process of 8051 microcontroller through
the GATE bit of TMOD register. (3 marks)
o Q. 8(b) Discuss the interfacing of 16KB RAM and 4KB ROM to 8051 microcontroller. (4
marks)
 2021 - Section A
o Q.2.(a) Discuss the key features of 8051 microcontroller. (04 marks)
o Q.2.(b) Define addressing mode. Discuss the following addressing modes of 8051
microcontroller with example: (i) Direct addressing mode, (ii) Register indirect addressing mode
(iii) Indexed addressing mode. (04 marks)
o Q.2.(c) Write an assembly language program for 8051 microcontrollers to exchange the lower
nibble of data present in external memory 6000H and 6001H. (04 marks)
o Q.3.(a) Discuss the procedure to connect any device to 8051 microcontroller following RS-232
standards. (04 marks)
o Q.3.(b) Mention the timer related SFRs of 8051 microcontrollers: i) non-maskable interrupt, ii)
asynchronous serial data communication, iii) short absolute jump. (04 marks)
o Q.3.(c) Write an assembly language program for the 8051 microcontroller to transfer the
message 'EEE17' serially at 9600 baud rate, 8-bit data, 1 stop bit continuously. (04 marks)
o Q.4.(a) Discuss the interfacing of 32 KB ROM to 8051 microcontroller. (04 marks)
 2020 - Section A
o Q. 2(a) Draw the internal memory architecture of 8051 microcontroller and explain it in brief.
(04 marks)
o Q. 2(b) Draw and explain the interfacing of 8051 microcontroller to the RS-232 DB-9 using
MAX232 line driver. What do you mean by DCE and DTE? (04 marks)
o Q. 2(c) Write a program to copy a block of 15 bytes of data from RAM locations starting at 20H
to RAM locations starting at 45H. (04 marks)
o Q. 3(a) Discuss the following addressing modes of 8051 microcontroller: (i) Relative addressing,
(ii) Long addressing, (iii) Indexed addressing. (03 marks)
o Q. 3(b) Define interval timing and event counting and explain 8 bit auto reload mode of TMOD
register. (05 marks)
o Q. 3(c) What is baud rate? Write a program segment that uses timer I in mode 2 to toggle P2.0
once whenever the counter reaches a count of 250. Assume the timer clock is taken from external
source P3.5(T1) and XTAL=11.0592 MHz. (04 marks)
o Q. 4(a) Explain the function of each bit of IE and IP register of 8051. (04 marks)
o Q. 4(b) Define serial communication. How is this achieved with 8051 using RS-232 standards?
(04 marks)
o Q. 4(c) Write a program for the 8051 to transfer the message 'EEE' serially at 4800 baud rate, 8
bit data, I stop bit continuously. (04 marks)
 2019 - Section A
o Q. 2(a) Explain the indexed and indirect addressing modes of 8051 microcontroller. (02 marks)
o Q. 2(b) How the target address is calculated in relative jump instruction? (02 marks)
o Q. 2(c) Write an 8051 assembly language program to exchange the lower nibble of data present
in external memory 6000H and 6001H. (04 marks)
o Q. 2(d) With neat sketch explain the interfacing of 16 Kbyte of RAM and 32 Kbyte of EPROM
to 8051. (04 marks)
o Q. 3(a) Mention any four addressing modes of 8051 with example. (04 marks)
o Q. 3(b) Explain the following instructions (i) MOVX A, @RI (ii) MOVC A, @A+DPTR (iii)
MOV RI, 12H and (iv) MUL AB (04 marks)
o Q. 3(c) Write a program to copy the value of 55H into RAM memory location 40H to 45H using
register indirect addressing mode without a loop. (04 marks)
o Q. 4(a) What is serial communication? How is this achieved with 8051 using RS 232 standards?
(04 marks)
o Q. 4(b) Explain the function of each bit of SCON and PCON register. (04 marks)
o Q. 4(c) Write a program for 8051 to transfer letter 'A' serially at 4800 baud rate, 8-bit data, and 1
stop bit continuously. (04 marks)
 2018 - Section A
o Q. 2(a) Draw and explain the memory map for the 128 byte internal RAM of 8051
microcontroller. (04 marks)
o Q. 2(b) What are the attractive functions of Port-3 of 8051 microcontroller? Briefly explain the
functions of the following pins of 8051 microcontroller, (i) PSEN, (ii) ALE/PROG. (iii) EA. (04
marks)
o Q. 2(c) How the target address of a short jump instruction is calculated? Explain the differences
among the following addressing modes of 8051 microcontroller: (i) Relative addressing, (ii)
Absolute Addressing and (iii) Long Addressing. (04 marks)
o Q. 3(a) To make any LED blink, there must be a delay between ON time and OFF time. Suppose
an LED is connected to pin no. 0 of port 1. Write an 8051 assembly language program to blink
that LED with 500 ms delay. Use timer 0 in mode 1. Assume XTAL=12MHz. (04 marks)
o Q. 3(b) Explain the functions of any 4 pins of RS 232 DB-9 serial interfacing standard. Give a
diagram that connects 8051 microcontroller to the RS 232 DB-9 using MAX 232 line driver. (04
marks)
o Q. 3(c) Write down the names of interrupt related SFRs in 8051. How priorities are set for
different interrupt sources? What are the rules that apply in case of multiple interrupts of 8051?
(04 marks)
o Q. 4(a) How can bank-1 register of 8051 be worked with? (03 marks)
 2018 - Section B
o Q. 5(d) With XTAL=11.0592 MHz, find the TH1 value needed to have a baud rate of 1200. (01
mark)
 2017 - Section A
o Q.2. (a) Draw and explain the internal RAM (from 00H to 7FH) structure of 8051
microcontroller. (04 marks)
o Q.2. (b) Name the alternate use of pins of port 3 of the microcontroller 8051. (04 marks)
o Q.2. (c) Write the 8051 assembly language program to read the temperature and test it for the
value 75. According to the test result, place the temperature value into the registers indicated by
the following: If T=75 then A=75, If T<75 then R1=T, If T>75 then R2=T (04 marks)
o Q.3. (a) Draw and explain the Timer/Counter control logic of 8051 microcontroller. (04 marks)
o Q.3. (b) Assuming that clock pulses are fed into pin T1, write a program for counter 1 in mode 2
to count the pulses and display the state of the TL1 count on P2. (04 marks)
o Q.3. (c) Define baud rate. With XTAL=11.0592 MHz, find the TH1 value needed to have a baud
rate of 9600. (02 marks)
o Q.3. (d) Briefly explain the importance of RI flag in programming the 8051 microcontroller to
receive data serially. (02 marks)
 2016 - Section A
o Q.2. (a) Mention any four addressing modes of 8051 with examples. (3.5 marks)
o Q.2. (b) Briefly explain the architecture of 8051. (04 marks)
o Q.2. (c) Write a program to subtract a 16 bit number stored at location 51H-52H from 55H-56H
and store the result in locations 40H and 41H. (04 marks)
o Q.3. (a) Draw the interfacing diagram of RS 232 with 8051 and explain its operation. (04 marks)
o Q.3. (b) Explain the functions of each bit of SCON and PCON registers. (03 marks)
o Q.3. (c) Write a program for the 8051 to transfer letter "A" serially at 4800 baud rate 8 bit data, 1
stop bit continuously. (4.5 marks)

M3: Data Converters (ADC & DAC)

 2022 - Section A
o Q. 3(a) Draw the circuit diagram and explain the operation of a binary weighted DAC. Also
derive the generalized equation for the output voltage. (4 marks)
o Q. 3(b) For a 3-bit ADC with Vref=8V, show that there will be a missing code if DNL=−1LSB.
However, if the DNL=+1LSB, there will be no missing code. (4 marks)
o Q. 3(c) For a successive approximation type ADC with 6 bit, Vin=0.6V, and Vref=1V, what will
be the binary output? (The document suggests 100110). (4 marks)
o Q. 4(a) Illustrate the circuit diagram of an R-2R ladder DAC and derive the generalized output
voltage equation. (4 marks)
 2021 - Section B
o Q.7.(a) For a 3-bit ADC with Vref=8V, show that there will be a missing code if DNL=−1LSB.
However, if the DNL=+1LSB, there will be no missing code. (04 marks)
o Q.7.(c) Derive the equation for output voltage of a 4-bit R-2R ladder DAC. Also write the
equation for an n-bit DAC. (04 marks)
o Q.8.(b) What is quantization error of an ADC? Show that for an ADC the maximum quantization
error is ±0.5LSB, when the 1st transition of the ADC transfer curve occurs at 0.5 LSB. (04
marks)
 2020 - Section B
o Q. 5(a) What do you mean by missing code? Explain it for a 3 bit ADC with suitable figure. (04
marks)
o Q. 5(b) For two 32 bit ADCs, the differential non-linearity errors (DNE) are as follows: (i) DNE
for 1st ADC≤±8LSB (ii) DNE for 2nd ADC≤±2LSB. If 29 bit resolution is necessary, then
which ADC will meet the requirement? Justify your answer. (04 marks)
o Q. 5(c) For a general n bit R-2R ladder DAC show that, Vout=−Vref∑i=1nbn−i2i1. (04 marks)
 2019 - Section B
o Q. 5(a) With functional flow chart, circuit diagram and example, explain the basic operating
principle of a sigma-delta ADC. (05 marks)
o Q. 5(c) Briefly explain the dual slope converter. (03 marks)
o Q. 6(a) What is over sampling? What is the impact of over sampling on antialiasing filters? (03
marks)
o Q. 6(b) Draw and explain R-2R ladder D/A converter. (04 marks)
 2018 - Section A
o Q. 4(b) List the name of various analog to digital converters and digital to analog converters.
Why these converters are important in an embedded system? (04 marks)
o Q. 4(c) Draw the circuit diagram and explain R-2R ladder DAC with a single valued resistor. (02
marks)
o Q. 4(d) Explain the operation of Sigma-Delta ADC with necessary sketches and equation. Why
over sampling is used in this type of ADC? (03 marks)
 2017 - Section A
o Q.4. (a) Derive the equation of conversion time of a Dual Slope ADC and hence explain why it's
not used in Data Acquisition System. (04 marks)
o Q.4. (b) For general n-bit Binary Weighted Resistor DAC, show that Vout=−Vref∑i=1nbn−i2i1
(assuming standard formula, original document had i/2i). (04 marks)
 2016 - Section A
o Q.4. (a) Draw and explain Sigma-delta A/D converter. (04 marks)
o Q.4. (b) What are the types of errors associated with A/D converter, explain. (3.5 marks)

M4: Programmable Logic Controllers (PLC)

 2022 - Section A
o Q. 1(a) A single-phase induction motor (220 V, 50Hz, 3A) is connected to the output terminal
Q2 and a normally open push button is connected to the input terminal I2 of a PLC. Draw the
complete connection diagram considering the internal connections of the input and output
modules. Assume source type input and output modules. (3 marks)
o Q. 1(b) A system consists of a three-phase induction motor and three normally open push
buttons... Design a PLC ladder diagram so that the motor can be rotated in both clockwise and
anticlockwise directions. (4 marks)
o Q. 1(c) For the following system (boiler, heater, fan, pump, sensors T1, T2)... Design a hardware
and PLC ladder diagram for the system. (5 marks)
o Q. 4(b) Consider a house, in which it is required to design an automatic alarm security system
using PLC... Briefly explain the design procedure including ladder diagram. (4 marks)
o Q. 4(c) A 2-pole, NO relay switch powers to a 240 V single phase load... Draw a PLC ladder
diagram of the coil and load circuits. (4 marks)
 2021 - Section B
o Q.5.(a) A 220 V, 50 Hz single-phase induction motor and a single-pole single-through switch are
connected to the sink-type output and source-type input modules of a PLC... Draw the entire
connection diagram... (03 marks)
o Q.5.(b) Design a PLC ladder diagram for the following system (Tank 1, Pump, Tank 2 with
high/low level sensors)... (05 marks)
o Q.5.(c) A car parking lot can hold a maximum of 10 cars... Design a system based on PLC to
count the number of cars... (04 marks)
o Q.6.(a) For the following system (Analog Temperature sensor, Heater, Relay, PLC)... Design a
PLC-based control system for regulating the heater temperature... (04 marks)
o Q.6.(b) For the following system (Motor, Belt, Sensor, Start button)... Design a PLC ladder
diagram to count the number of objects... (04 marks)
o Q.6.(c) The following mixer system consists of two processes... Design a ladder diagram for the
system. (04 marks)
 2020 - Section B
o Q. 8(b) The remote control car can move through the sliding surface as shown in the following
figure... Design a ladder diagram so that the lamp can be turned "ON" or turned "OFF" from both
the top and the bottom position... (04 marks)
o Q. 8(c) Design PLC ladder logic for running an oven using push button for following criterions:
(i) Green LED indication while running, (ii) Red LED indication after 6 minutes, (iii) Emergency
stop switch and overload protection. (06 marks)
 2019 - Section B
o Q. 8(a) A three phase induction motor is connected to three-phase. Design a PLC ladder diagram
considering the following requirements... (04 marks)
o Q. 8(b) The requirement of a microwave oven is follows... Design a PLC ladder diagram for the
oven... (04 marks)
o Q. 8(c) Consider a room temperature control system having two heaters and one cooler... Design
a PLC ladder diagram for the system... (04 marks)
 2018 - Section B
o Q. 8(c) What types of programming language are used in PLC system? Draw the PLC ladder
diagram to design the following: (i) 4x1 MUX. (ii) X-NOR gate. (04 marks)
 2017 - Section B
o Q.7. (c) Write short notes on PLC. (04 marks)
 2016 - Section B
o Q.8. (a) What is PLC? How is it different from the microcontroller? (3.5 marks) (PLC part)
o Q.8. (b) Define the following symbols. (Shows PLC ladder symbols) (04 marks)
o Q.8. (c) Discuss the 4 steps of PLC operation. (3.5 marks)

M5: Field Programmable Gate Arrays (FPGA) & Programmable Logic

 2022 - Section B
o Q. 8(c) Determine the configuration bits for the following circuit implementation (logic circuit
with I0, I1, I2, I3, CLK inputs and D-FlipFlop shown in figure) in a 2x2 FPGA... (5 marks)
 2021 - Section A
o Q.4.(b) 'Programming of FPGA is different from microcontroller'-Justify the statement. (04
marks)
o Q.4.(c) Determine the configuration bits for the following circuit implementation (logic circuit
with I0, I1, I2, I3, CLK inputs and D-FlipFlop shown in Fig 1) in a 2x2 FPGA... (04 marks)
 2020 - Section B
o Q. 6(a) Define FPGA. Draw the structure of FPGA and explain each block. (04 marks)
o Q. 6(b) 'FPGA programming is different from microprocessor'- Justify the statement. (02 marks)
o Q. 6(c) Design 2x2 FPGA with I/O constraints as shown in the following figure. Assume two
input LUTs in each CLB. Also determine the configuration bits to implement the circuit. (Figure
provided in PYQ) (06 marks)
o Q. 8(a) What do you mean by "semi-custom" application specific integrated circuits (ASICs)?
Write down the application of FPGA. (02 marks)
 2019 - Section B
o Q. 7(a) What is FPGA? Define semicustom and full custom with example. (03 marks)
o Q. 7(b) Design 2x2 FPGA, with I/O constraints as shown in the following figure. Assume 2-
input LUTs in each CLB. Also, determine the configuration bits to implement the circuit. (Figure
provided in PYQ) (06 marks)
o Q. 7(c) What are the disadvantages of FPGA? (03 marks)
 2018 - Section B
o Q. 8(a) What does a field programmable represent in FPGA? How can you differentiate between
FPGA and ASIC? (04 marks)
o Q. 8(b) What do you mean by LUT? Draw the structure of a 2x2 FPGA and explain the structure.
(04 marks)
 2017 - Section B
o Q.6. (a) What is LUT? Give four advantages of LUT. (04 marks)
o Q.6. (b) Realize y=a⋅b+c using 2 input LUTs. (04 marks)
o Q.7. (a) What is FPGA? Differentiate between FPGA and CPLD. (04 marks)
 2016 - Section B
o Q.5. (c) What is LUT? Give four advantages of LUT. (3.5 marks)
o Q.7. (b) Discuss the procedure to implement an OR gate using FPGA. (marks not clearly
specified, assumed 4 marks)
o Q.7. (c) Discuss the functional block diagram of FPGA with suitable notations. (3.5 marks)

M6: Real-Time Operating Systems (RTOS)

 2022 - Section A
o Q. 2(a) Mention the difference between Earliest Deadline First scheduling and Rate Monitoring
algorithm. Schedule the following using EDF algorithm: Task T1(C:3, D:7, P:20), T2(C:2, D:8,
P:10), T3(C:2, D:4, P:5). (4 marks)
o Q. 2(b) Briefly explain different types of real time operating systems with examples. (4 marks)
o Q. 2(c) With a neat sketch, discuss periodic task model of real time system. (4 marks)
 2021 - Section B
o Q.7.(b) Briefly explain different types of real time operating systems with examples. (04 marks)
o Q.8.(a) What is the difference between earliest dead line first scheduling and rate monotonic
algorithm? Schedule the following using RMA: Task T1(Capacity:3, Period:20), T2(Capacity:2,
Period:5), T3(Capacity:2, Period:10). (04 marks)
o Q.8.(c) For the following tasks, determine whether they are EDF schedule or not. Explain
different types of RTOS. T1=(e1=10,p1=20), T2=(e2=5,p2=50), T3=(e3=10,p3=35). (04 marks)
 2020 - Section B
o Q. 7(a) Define real time system. Draw the basic model of a real time system and explain each
block. (04 marks)
o Q. 7(b) Classify timing constraints of real time system and describe each class. (04 marks)
o Q. 7(c) Using the following table, determine whether task can be scheduled or not. If yes, then
schedule the task. (Table provided: T1(Exe:5, D:18, P:20), T2(Exe:3, D:8, P:10), T3(Exe:2, D:4,
P:5)) (04 marks)
 2019 - Section B
o Q. 5(b) Discuss different types of real time systems with examples. What are the constraints that
should be kept in mind while designing a real time system? (04 marks)
o Q. 6(c) Mention two basic differences between the earliest deadline first scheduling and the rate
monotonic algorithm. A particular system consists of three tasks T1, T2, and T3. The execution
time and the period of the tasks are as follows. Schedule the task using the rate monotonic
algorithm. (Table provided: T1(Exe:3, P:20), T2(Exe:2, P:5), T3(Exe:2, P:10)) (01+04=05
marks)
 2018 - Section B
o Q. 5(a) What is the basic difference between real-time operating system and general operating
system? Define hard real-time system and soft-real time system with examples. (03 marks)
o Q. 5(b) Define Latency, deadline and Preemption in the case of real-time system. Explain the
process of preemption with a suitable example and neat sketch. (04 marks)
o Q. 5(c) What do you mean by scheduling of RTOS? Schedule the following three processes
using EDF and RM scheduling algorithm: Process T1(Capacity:3, Deadline: 7, Period:20),
T2(Capacity:2, Deadline:4, Period:5), T3(Capacity:2, Deadline: 8, Period:10). (04 marks)
 2017 - Section B
o Q.6. (c) What do you mean by scheduling of RTOS? With neat sketches, differentiate between
the Earliest Deadline First (EDF) and Rate Monotonic (RM) scheduling algorithm. (04 marks)
o Q.8. (b) What is RTOS? What are the goals of RTOS? (04 marks)

M7: Specialized Interfacing, Architectures & Design Practices

 (No specific questions directly fitting the distinct sub-topics of M7 like specialized bus protocols
(beyond general PLC/8051 interfacing), detailed HDL, or advanced testing methodologies were
found in the 2022 and 2021 question papers provided in "Embedded Q (including 18).pdf". The
questions below are from 2016-2018 from "distribution.pdf".)
 2018 - Section B
o Q. 6(a) List the name of various serial and parallel bus protocols. Give a diagram that shows a
processor of embedded system connected to system memory bus and networked to other systems
through a serial bus. (04 marks) (Bus Protocols)
o Q. 6(b) What are the limitations of ISA bus? Explain the functions of the following pins of an
ISA bus: (i) +T/C, (ii) DACK0-DACK3 and (iii) AEN. (04 marks) (Bus Protocols)
o Q. 6(c) What is meant by Plug and Play? Explain how PCI bus works while installing a new
device. (04 marks) (Bus Protocols)
o Q. 7(a) What are the differences between VHDL and Verilog hardware description language?
(04 marks) (HDL)
o Q. 7(b) How testing differs from verification? Why testing embedded system is difficult? (04
marks) (Testing & Verification)
o Q. 7(c) What is co-testing? Distinguish between defects, errors and faults with example. (04
marks) (Testing & Verification)
 2017 - Section A
o Q.4. (c) Explain the advantages of wireless devices. How do wireless devices network using
different protocols? (04 marks) (Wireless Interfacing)
 2017 - Section B
o Q.5. (a) Define ROM image and explain each section of an ROM image in a system. What role
does a linker play? (04 marks) (Embedded Software Dev)
o Q.5. (b) Why do we use a loader in a computer system and a locator in an embedded system? (04
marks) (Embedded Software Dev)
o Q.5. (c) List the software tools required to design a Robot as an embedded system. Clearly
explain any one software tool from the list. (04 marks) (Embedded Software Dev / Specialized
Applications)
o Q.7. (b) What are the different modes that are employed during the design process of embedded
software? (04 marks) (Embedded Software Dev)
o Q.8. (a) Why testing embedded system is difficult? How hardware testing differs from software
testing? (04 marks) (Testing & Verification)
o Q.8. (c) Explain the process of converting an assembly language program into machine
implementable software file. (04 marks) (Embedded Software Dev)
 2016 - Section A
o Q.4. (c) An 8086-8255 based microcomputer is required to drive an LED connected in bit0 of
port B based on two switch inputs connected to bit 6 and 7 of port C. If both switches are either
high or low, LED will turn on; otherwise it will remain OFF. Assume base address of 60H. Write
an assembly language program to accomplish this. (04 marks) (Specialized Architectures - 8086)
 2016 - Section B
o Q.5. (a) Discuss the bus structure of embedded systems with proper diagram. (04 marks) (Bus
Protocols)
o Q.5. (b) Discuss the complete architecture of the USB port. (04 marks) (Bus Protocols)
o Q.6. (a) What is hardware description language? How is it different from C program language?
(04 marks) (HDL)
o Q.6. (b) What would happen if the higher threshold voltage 3 volts are used instead of 1.5 volts
to define the logic 1? (04 marks) (Digital Logic Basics)
o Q.6. (c) What is VERILOG? Is it better than VHDL? (3.5 marks) (HDL)