BEC601 Module 1 Notes
BEC601 Module 1 Notes
Module-1
Examples:
     Electronic Toys
     Mobile Handsets
     Washing Machines
     Air Conditioners
     Automotive Control Units
     Set Top Box
     DVD Player etc…
 Contain a General Purpose Operating System           May or may not contain an operating system for
 (GPOS)                                               functioning
 Less/not at all tailored towards reduced operating   Highly tailored to take advantage of the power
 power requirements, options for different levels     saving modes supported by hardware and
 of power management.                                 Operating System
❑ Based on Generation
❑ Based on Triggering
1. First Generation:
   ➢ The early embedded systems built around 8bit microprocessors like 8085 and Z80 and 4bit
     microcontrollers.
   ➢ Simple in hardware circuit & firmware developed.
   ➢ Examples: Digital telephone keypads.
2. Second Generation:
   ➢ Embedded Systems built around 16bit microprocessors and 8 or 16bit microcontrollers, following
     the first generation embedded systems.
   ➢ They are more complex & powerful than first generation microprocessors and controller.
   ➢ Example: SCADA systems
3. Third Generation:
4. Fourth Generation:
   ➢ Embedded Systems built around System on Chips (SoCs), Re-configurable processors and
     multicore processors
   ➢ Highly complex and very powerful.
   ➢ Examples: Smart Phones
1. Small Scale:
2. Medium Scale:
3. Large Scale/Complex:
   ➢ Embedded systems coming under this category are specifically designed for monitoring purpose.
   ➢ They are used for determining the state of some variables using input sensors.
   ➢ They cannot impose control over variables.
   ➢ Electro Cardiogram (ECG) machine for monitoring the heartbeat of a patient is a typical example
     for this.
   ➢ The sensors used in ECG are the different Electrodes connected to the patient’s body
   ➢ Measuring instruments like Digital CRO, Digital Multi meter, Logic Analyzer etc. used in
     Control & Instrumentation applications are also examples of embedded systems for monitoring
     purpose.
1.6.5 Control
   ➢ Embedded systems with control functionalities are used for imposing control over some variables
     according to the changes in input variables.
   ➢ Embedded system with control functionality contains both sensors and actuators.
   ➢ Sensors are connected to the input port for capturing the changes in environmental variable or
     measuring variable.
   ➢ The actuators connected to the output port are controlled according to the changes in input
     variable to put an impact on the controlling variable to bring the controlled variable to the
     specified range.
Dept. of ECE, ATMECE, Mysuru                                                                   Page 6
Module-1                                                                                  Embedded Systems [BEC601]
   ➢ Air conditioner for controlling room temperature is a typical example for embedded system with
     ‘Control’ functionality.
   ➢ Air conditioner contains a room temperature sensing element (sensor) which may be a thermistor
     and a handheld unit for setting up (feeding) the desired temperature.
   ➢ The air compressor unit acts as the actuator. The compressor is controlled according to the current
     room temperature and the desired temperature set by the end user.
1.6.6 Application Specific User Interface
               FPGA/ASIC/DSP/SoC
              Microprocessor/controller                                             Embedded
                                                                                    Firmware
Memory
Communication Interface
                                              System
                   I/p Ports                   Core                          O/p Ports
                   (Sensors)
                                                                            (Actuators)
                                             Other supporting
                                           Integrated Circuits &
                                                subsystems
Embedded System
Real World
   ❑ System Core:
    • It is a Single chip controller, which acts as master brain of the system.
    • It can be Microprocessor (eg. Intel 8085, 8086) or Microcontroller (eg .Atmel AT89C51) or
      Field Programmable Gate Array [FPGA ] (eg. Xilinx, Spartan) or Digital Signal Processor
      (DSP) or Application Specific Integrated Circuits (ASIC)/ Application Specific Standard
      Product (ASSP)
   ❑  Embedded Firmware:
   •   Designed to regulate a state of device through control signals.
   •   It acts as intelligence to the system.
   •   In a controller based embedded system, the controller may contain internal memory for storing
       the controller algorithm (eg. EEPROM or FLASH memory).
    • Embedded hardware or software systems are basically designed to regulate a physical variable or
       to manipulate the state of some devices by sending some control signal to the actuator or devices
       connected to the output ports of the system, in response to the input signals provided by the end
       users or Sensor which are connected to the input ports.
    • Hence an embedded system can be viewed as a reactive system.
    • The control is achieved by processing the information coming from the sensors and user
       interfaces and controlling some actual tests that regulate the physical variable.
   ❑   I/O devices:
   •   Keyboard push buttons switches extra example for common user interface input devices.
   •   LEDs, liquid crystal display, piezoelectric buzzer ..etc are example for output device
   •   It is not necessary that all embedded system should incorporate these user interfaces it's only
       depends on the type of application for which the embedded system is designed.
   •   For example if the embedded system is designed for any handheld application such as mobile
       handset application then the system should contain user interfaces like keyboard performing input
       operation and display unit for providing you the status of various activities in progress.
   ❑ Memory:
    • The memory of the system is responsible for holding the control algorithm and other important
      configuration details.
    • For most of embedded systems the memory for storing the algorithm or configuration data is a
      fixed type which is a kind of read only memory ROM and it is not available for the end user for
      modification which means the memory is protected from unwanted user interaction by
      implementing some kind of memory protection mechanism.
    • The most common types of memories used in embedded system for control algorithms storage
      are OTP, PROM, UVEPROM, EEPROM and FLASH
    • Sometimes the system required for temporary memory for performing arithmetic operation or
      control algorithm execution and this type of memory is known as working memory.
    • Random Access Memory (RAM) is used in most of the system as the working memory
    • Various types of RAM like S-RAM, D-RAM and NVRAM are used for this purpose.
   ❑ Communication Interface:
    • Communication interface is essential for communicating with various subsystems of the
       embedded system and with the external world.
    • Device/board level communication interface (Onboard Communication Interface)
          Eg. I2C, SPI, UART, 1-Wire etc and Parallel bus
  1.8.1     General Purpose Processor (GPP) Vs Application Specific Instruction Set Processor
            (ASIP).
   ➢      General Purpose Processor or GPP is a processor designed for general computational tasks.
   ➢      GPPs are produced in large volumes and targeting the general market. Due to the high volume
          production, the per unit cost for a chip is low compared to ASIC or other specific ICs.
   ➢      A typical general purpose processor contains an Arithmetic and Logic Unit (ALU) and Control
          Unit (CU).
   ➢      Application Specific Instruction Set processors (ASIPs) are processors with architecture and
          instruction set optimized to specific domain/application requirements like Network processing,
          Automotive, Telecom, media applications, digital signal processing, control applications etc.
   ➢      ASIPs fill the architectural spectrum between General Purpose Processors and Application
          Specific Integrated Circuits (ASICs).
   ➢      The need for an ASIP arises when the traditional general purpose processor are unable to meet
          the increasing application needs.
   ➢      Some Microcontrollers (like Automotive AVR, USB AVR from Atmel), System on Chips,
          Digital Signal Processors etc are examples of Application Specific Instruction Set Processors
          (ASIPs).
   ➢      ASIPs incorporate a processor and on-chip peripherals, demanded by the application
          requirement, program and data memory.
1.8.2. Microprocessor
   ➢ A silicon chip representing a Central Processing Unit (CPU), which is capable of performing
     arithmetic as well as logical operations according to a pre-defined set of Instructions, which is
     specific to the manufacturer.
   ➢ In general the CPU contains the Arithmetic and Logic Unit (ALU), Control Unit and Working
     registers.
   ➢ Microprocessor is a dependant unit and it requires the combination of other hardware like
     Memory, Timer Unit, and Interrupt Controller etc for proper functioning.
   ➢ Intel claims the credit for developing the first Microprocessor unit Intel 4004, a 4 bit processor
     which was released in Nov 1971.
  1.8.3. Microcontroller
   ➢ A highly integrated silicon chip containing a CPU, scratch pad RAM, Special and General
     Purpose Register Arrays, On Chip ROM/FLASH memory for program storage, Timer and
     Interrupt control units and dedicated I/O ports.
   ➢ Microcontrollers can be considered as a super set of Microprocessors.
   ➢ Microcontroller can be general purpose (like Intel 8051, designed for generic applications and
     domains) or application specific (Like Automotive AVR from Atmel Corporation. Designed
     specifically for automotive applications).
   ➢ Since a microcontroller contains all the necessary functional blocks for independent working, they
     found greater place in the embedded domain in place of microprocessors.
   ➢ Microcontrollers are cheap, cost effective and are readily available in the market.
   ➢ Texas Instruments TMS 1000 is considered as the world’s first microcontroller.
           •   Program Memory
           •   Data Memory
           •   Computational Engine
           •   I/O Unit
   ➢ Audio video signal processing, telecommunication and multimedia applications are typical
     examples where DSP is employed.
   1.8.5. Microprocessor Vs Microcontroller
                  Microprocessor                                      Microcontroller
                                                      A microcontroller is a highly integrated chip
  A silicon chip representing a Central Processing    that contains a CPU, scratch pad RAM, Special
  Unit (CPU), which is capable of performing          and General purpose Register Arrays, On Chip
  arithmetic as well as logical operations            ROM/FLASH memory for program storage,
  according to a pre-defined set of Instructions      Timer and Interrupt control units and dedicated
                                                      I/O ports
  Most of the time general purpose in design and      Mostly application oriented or domain specific
  operation
  Doesn’t contain a built in I/O port. The I/O Port   Most of the processors contain multiple built-in
  functionality needs to be implemented with the      I/O ports which can be operated as a single 8 or
  help of external Programmable Peripheral            16 or 32 bit Port or as individual port pins
  Interface Chips like 8255
                                                      Targeted for embedded market where
  Targeted for high end           market    where     performance is not so critical (At present this
  performance is important                            demarcation is invalid)
  Limited power saving options compared to            Includes lot of power saving features
  microcontrollers
RISC CISC
 Orthogonal Instruction Set (Allows each Non Orthogonal Instruction Set (All instructions
instruction to operate on any register and use are not allowed to operate on any register and use
any addressing mode)                           any addressing mode. It is instruction specific)
Large number of registers are available Limited no. of general purpose registers
✓ The terms Harvard and Von-Neumann refers to the processor architecture design.
   ✓ Microprocessors/controllers based on the Harvard architecture will have separate data bus and
     instruction bus. This allows the data transfer and program fetching to occur simultaneously on
     both buses
   ✓ With Harvard architecture, the data memory can be read and written while the program memory is
     being accessed. These separated data memory and code memory buses allow one instruction to
     execute while the next instruction is fetched (“Pre-fetching”)
                                                   Program
                                                                     CPU         Data Memory
                                                   Memory
      Separate buses for Instruction and Data     Single shared bus for Instruction and Data
      fetching                                    fetching
   Endianness specifies the order in which the data is stored in the memory by processor operations in a
   multi byte system (Processors whose word size is greater than one byte). Suppose the word length is
   two byte then data can be stored in memory in two different ways.
       ➢ Higher order of data byte at the higher memory and lower order of data byte at location just
         below the higher memory.
       ➢ Lower order of data byte at the higher memory and higher order of data byte at location just
         below the higher memory.
       ➢ Little-endian means the lower-order byte of the data is stored in memory at the lowest
         address, and the higher-order byte at the highest address. (The little end comes first)
       ➢ Big-endian means the higher-order byte of the data is stored in memory at the lowest address,
         and the lower-order byte at the highest address. (The big end comes first .)
Little-endian Operation
Big-endian Operation
The RISC processor instruction set is orthogonal and it operates on registers. The memory access related
operations are performed by the special instructions load and store. If the operand is specified as memory
location, the content of it is loaded to a register using the load instruction. The instruction store stores
data from a specified register to a specified memory location.
                  R1                 R2                  R3
         1                 3              3                                                       1
                                                                        load R1, x
                                                                        load R2, y                2
     x           00                                                     add R3, R1, R2            3
     y           7F                  ALU                 3
                                                                        store R3, z               4
     z           23
Instruction Pipelining
   ✓ Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs)
     are the two major types of programmable logic devices.
   ✓ FPGAs offer the highest amount of logic density, the most features, and the highest performance.
   ✓ These advanced FPGA devices also offer features such as built-in hardwired processors (such as
     the IBM Power PC), substantial amounts of memory, clock management systems, and support for
     many of the latest, very fast device-to-device signaling technologies.
   ✓ FPGAs are used in a wide variety of applications ranging from data processing and storage, to
     instrumentation, telecommunications, and digital signal processing.
   ✓ CPLDs, by contrast, offer much smaller amounts of logic - up to about 10,000 gates.
   ✓ CPLDs offer very predictable timing characteristics and are therefore ideal for critical control
     applications.
   ✓ CPLDs such as the Xilinx CoolRunner series also require extremely low amounts of power and
     are very inexpensive, making them ideal for cost-sensitive, battery-operated, portable applications
     such as mobile phones and digital handheld assistants.
1.12 Memory
   ➢ Memory is an important part of an embedded system. The memory used in embedded system can
     be either Program Storage Memory (ROM) or Data memory (RAM).
   ➢ Certain Embedded processors/controllers contain built in program memory and data memory and
     this memory is known as on-chip memory.
1.12.1 Program Storage Memory
➢ One-time programmable memory. Uses hardwired technology for storing data. The device is factory
  programmed by masking and metallization process according to the data provided by the end user.
➢ The primary advantage of MROM is low cost for high volume production. They are the least
  expensive type of solid state memory.
➢ Different mechanisms are used for the masking process of the ROM, like
   ▪   Creation of an enhancement or depletion mode transistor through channel implant.
   ▪   By creating the memory cell either using a standard transistor or a high threshold transistor. In the
       high threshold mode, the supply voltage required to turn ON the transistor is above the normal
       ROM IC operating voltage. This ensures that the transistor is always off and the memory cell
       stores always logic 0.
➢ The limitation with MROM based firmware storage is the inability to modify the device firmware
  against firmware upgrades. Since the MROM is permanent in bit storage, it is not possible to alter the
  bit information.
   ➢ Erasable Programmable Read Only (EPROM) memory gives the flexibility to re-program the
     same chip.
   ➢ EPROM stores the bit information by charging the floating gate of an FET.
   ➢ Bit information is stored by using an EPROM Programmer, which applies high voltage to charge
     the floating gate.
   ➢ EPROM contains a quartz crystal window for erasing the stored information. If the window is
     exposed to Ultra violet rays for a fixed duration, the entire memory will be erased.
   ➢ Even though the EPROM chip is flexible in terms of re-programmability, it needs to be taken out
     of the circuit board and needs to be put in a UV eraser device for 20 to 30 minutes.
   ➢ Erasable Programmable Read Only (EPROM) memory gives the flexibility to re-program the
     same chip using electrical signals.
   ➢ The information contained in the EEPROM memory can be altered by using electrical signals at
     the register/Byte level.
   ➢ They can be erased and reprogrammed within the circuit.
   ➢ These chips include a chip erase mode and in this mode they can be erased in a few milliseconds
   ➢ It provides greater flexibility for system design.
   ➢ The only limitation is their capacity is limited when compared with the standard ROM (A few
     kilobytes).
5. FLASH Memory
➢ RAM is volatile, meaning when the power is turned off, all the contents are destroyed.
   ➢ RAM is a direct access memory, meaning we can access the desired memory location directly
     without the need for traversing through the entire memory locations to reach the desired memory
     position (i.e. Random Access of memory location).
                                      Read/Write
                                     Memory (RAM)
➢ Static RAM stores data in the form of Voltage. They are made up of flip-flops.
   ➢ In typical implementation, an SRAM cell (bit) is realized using 6 transistors (or 6 MOSFETs).
     Four of the transistors are used for building the latch (flip-flop) part of the memory cell and 2 for
     controlling the access.
   ➢ Static RAM is the fastest form of RAM available. SRAM is fast in operation due to its resistive
     networking and switching capabilities.
                                                Bit Line B\                              Bit Line B
                                                              Q1                    Q3
Q5 Q6
                                                              Q2                    Q4
                                                                       Vcc
Word Line
       ➢ Accesses to the memory cell is controlled by the word line, which controls the access
         transistors (MOSFET Q5 and Q6) .
       ➢ The access transistors control the connections to bit line B &B\.
       ➢ In order to write a value to the memory cell, apply the desired value to the bit control lines
         ( For writing 1, make B=1 and B\=0; For writing 0 , , make B=o and B\=1) and assert word
         line.
       ➢ For reading the content of the memory cell, assert both B and B\ bit lines to 1 and set word
         line to 1.
       ➢ The major limitation of SRAM is low capacity and high cost.
   ➢ Dynamic RAM stores data in the form of charge. They are made up                       Bit Line B
     of MOS transistor gates.
   ➢ The advantages of DRAM are its high density and low cost
     compared to SRAM.                                                        Word Line
   ➢ The disadvantage is that since the information is stored as charge it
     gets leaked off with time and to prevent this they need to be                           +
     refreshed periodically.                                                                 -
   ➢ Special circuits called DRAM controllers are used for the refreshing
     operation. The refresh operation is done periodically in milliseconds
     interval.                                                                  DRAM cell implementation
   ➢ NVRAM is used for the nonvolatile storage of results of operations or for setting up of flags etc
   ➢ The life span of NVRAM is expected to be around 10 years.
   ➢ DS1744 from Maxim/Dallas is an example for 32KB NVRAM.
Sensor:
   ➢ A transducer device which converts energy from one form to another for any measurement or
      control purpose. Sensors acts as input device
   ➢ Eg. Hall Effect Sensor which measures the distance between the cushion and magnet in the Smart
      Running shoes from adidas.
Actuator:
   ➢ A form of transducer device (mechanical or electrical) which converts signals to corresponding
      physical action (motion). Actuator acts as an output device
   ➢ Eg. Micro motor actuator which adjusts the position of the cushioning element in the Smart
      Running shoes from adidas.
                                                                 LED
                                        I/O interface
                                                                           I/O interface
                                                        Photo-transistor
Vcc
                                      SDA
                                                           2.2K
                         Port Pins     SCL
                                                                    Slave 1
                                                     SCL          I2C Device
                    Master                           SDA          (Eg: Serial
                (Microprocessor/                                  EEPROM)
                  Controller)
                                                     SCL            Slave 2
                                                     SDA          I2C Device
I2C Bus
The sequence of operation for communicating with an I2C slave device is:
   1. Master device pulls the clock line (SCL) of the bus to ‘HIGH’.
   2. Master device pulls the data line (SDA) ‘LOW’, when the SCL line is at logic ‘HIGH’ (This is the
       ‘Start’ condition for data transfer).
   3. Master sends the address (7 bit or 10 bit wide) of the ‘Slave’ device to which it wants to
       communicate, over the SDA line. Clock pulses are generated at the SCL line for synchronizing
       the bit reception by the slave device. The MSB of the data is always transmitted first. The data in
       the bus is valid during the ‘HIGH’ period of the clock signal.
   4. Master sends the Read or Write bit (Bit value = 1 Read Operation; Bit value = 0 Write Operation)
       according to the requirement.
   5. Master waits for the acknowledgement bit from the slave device whose address is sent on the bus
       along with the Read/Write operation command. Slave devices connected to the bus compares the
       address received with the address assigned to them.
   6. The Slave device with the address requested by the master device responds by sending an
       acknowledge bit (Bit value =1) over the SDA line.
   7. Upon receiving the acknowledge bit, master sends the 8bit data to the slave device over SDA
       line, if the requested operation is ‘Write to device’. If the requested operation is ‘Read from
       device’, the slave device sends data to the master over the SDA line.
   8. Master waits for the acknowledgement bit from the device upon byte transfer complete for a write
       operation and sends an acknowledge bit to the slave device for a read operation.
   9. Master terminates the transfer by pulling the SDA line ‘HIGH’ when the clock line SCL is at
       logic ‘HIGH’ (Indicating the ‘STOP’ condition).
   ➢ The Serial Peripheral Interface Bus (SPI) is a synchronous bi-directional full duplex four wire
      serial interface bus.
   ➢ The concept of SPI is introduced by Motorola.
   ➢ SPI is a single master multi-slave system.
   ➢ It is possible to have a system where more than one SPI device can be master, provided the
      condition only one master device is active at any given point of time, is satisfied.
   ➢ SPI requires four signal lines for communication. They are:
   1. Master Out Slave In (MOSI): Signal line carrying the data from master to slave device.
                                      It is also known as Slave Input/Slave Data In (SI/SDI).
   2. Master In Slave Out (MISO): Signal line carrying the data from slave to master device.
                                      It is also known as Slave Output (SO/SDO).
   3. Serial Clock (SCLK):          Signal line carrying the clock signals.
   4. Slave Select (SS): Signal line for slave device select. It is an active low signal.
                                   MISO
                                   SCL
                                   MOSI                   MOSI           Slave 1
                                                          SCL          SPI Device
                  Master
                                                          MISO         (Eg: Serial
              (Microprocessor/
                                                           SS\         EEPROM)
                Controller)
                          SS1\
                          SS2\
                                                          MOSI
                                                                         Slave 2
                                                          SCL
                                                                       SPI Device
                                                          MISO
                                                                       (Eg: LCD)
                                                           SS\
                                              SPI Bus
   ➢ The master device is responsible for generating the clock signal. Master device selects the
     required slave device by asserting the corresponding slave device’s slave select signal ‘LOW’.
     The data out line (MISO) of all the slave devices when not selected floats at high impedance state
   ➢ The serial data transmission through SPI Bus is fully configurable. SPI devices contain certain set
     of registers for holding these configurations. The Serial Peripheral Control Register holds the
     various configuration parameters like master/slave selection for the device, baud rate selection for
Dept. of ECE, ATMECE, Mysuru                                                                     Page 25
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      communication, clock signal control etc. The status register holds the status of various conditions
      for transmission and reception.
   ➢ SPI works on the principle of ‘Shift Register’. The master and slave devices contain a special
     shift register for the data to transmit or receive. The size of the shift register is device dependent.
     Normally it is a multiple of 8. During transmission from the master to slave, the data in the
     master’s shift register is shifted out to the MOSI pin and it enters the shift register of the slave
     device through the MOSI pin of the slave device. At the same time the shifted out data bit from
     the slave device’s shift register enters the shift register of the master device through MISO pin.
   ➢ A serial, half duplex, line of sight based wireless technology for data communication between
     devices.
   ➢ Infrared communication technique makes use of Infrared waves of the electromagnetic spectrum
     for transmitting the data.
   ➢ IrDA supports point-point and point-to-multipoint communication, provided all devices involved
     in the communication are within the line of sight.
   ➢ The typical communication range for IrDA lies in the range 10cm to 1 m.
   ➢ IR supports data rates ranging from 9600bits/second to 16Mbps. Depending on the speed of data
     transmission IR is classified into Serial IR (SIR), Medium IR (MIR), Fast IR (FIR), Very Fast IR
     (VFIR) and Ultra Fast IR (UFIR).
   ➢ SIR supports transmission rates ranging from 9600bps to 115.2kbps. MIR supports data rates of
     0.576Mbps and 1.152Mbps. FIR supports data rates up to 4Mbps. VFIR is designed to support
     high data rates up to 16Mbps. The UFIR specs are under development and it is targeting a data
     rate up to 100Mbps.
   ➢ IrDA communication involves a transmitter unit for transmitting the data over IR and a receiver
     for receiving the data. Infrared Light Emitting Diode (LED) is used as the IR source for
     transmitter and at the receiving end a photodiode is used as the receiver.
      1.15.4 External Communication Interface – Bluetooth
  ➢        Low cost, low power, short range wireless technology for data and voice communication.
  ➢        Bluetooth operates at 2.4GHz of the Radio Frequency spectrum and uses the Frequency
           Hopping Spread Spectrum (FHSS) technique for communication.
  ➢        Bluetooth supports a theoretical maximum data rate of up to 1Mbps and a range of
           approximately 30 feet for data communication.
  ➢        Bluetooth communication has two essential parts; a physical link part and a protocol part. The
           physical link is responsible for the physical transmission of data between devices supporting
           Bluetooth communication and protocol part is responsible for defining the rules of
           communication.
Dept. of ECE, ATMECE, Mysuru                                                                        Page 26
Module-1                                                                       Embedded Systems [BEC601]
  ➢        The physical link works on the Wireless principle making use of RF waves for communication.
  ➢        Bluetooth enabled devices essentially contain a Bluetooth wireless radio for the transmission
           and reception of data.
  ➢        The rules governing the Bluetooth communication is implemented in the ‘Bluetooth protocol
           stack’. The Bluetooth communication IC holds the stack.
  ➢        Each Bluetooth device will have a 48 bit unique identification number. Bluetooth
           communication follows packet based data transfer.
  ➢        Bluetooth supports point-to-point (device to device) and point-to-multipoint (device to multiple
           device broadcasting) wireless communication. The point-to-point communication follows the
           master-slave relationship. A Bluetooth device can function as either master or slave.
  ➢        A network formed with one Bluetooth device as master and more than one device as slaves is
           known as Piconet.
       1.15.5.External Communication Interface – Wi-Fi
   ➢       The popular wireless communication technique for networked communication of devices.
   ➢       Wi-Fi follows the IEEE 802.11 standard.
   ➢       Wi-Fi is intended for network communication and it supports Internet Protocol (IP) based
           communication.
   ➢       Wi-Fi based communications require an intermediate agent called Wi-Fi router/Wireless
           Access point to manage the communications.
   ➢       The Wi-Fi router is responsible for restricting the access to a network, assigning IP address to
           devices on the network, routing data packets to the intended devices on the network.
   ➢       Wi-Fi enabled devices contain a wireless adaptor for transmitting and receiving data in the
           form of radio signals through an antenna.
   ➢       Wi-Fi operates at 2.4GHZ or 5GHZ of radio spectrum and they co-exist with other ISM band
           devices like Bluetooth.
   ➢       A Wi-Fi network is identified with a Service Set Identifier (SSID). A Wi-Fi device can connect
           to a network by selecting the SSID of the network and by providing the credentials if the
           network is security enabled.
   ➢       Wi-Fi networks implements different security mechanisms for authentication and data transfer.
   ➢       Wireless Equivalency Protocol (WEP), Wireless Protected Access (WPA) etc are some of the
           security mechanisms supported by Wi-Fi networks in data communication.
                                             Wi-Fi Router
                               Device 1
                                            Device 2         Device 3
   ➢ Low power, low cost, wireless network communication protocol based on the IEEE 802.15.4-
     2006 standard.
   ➢ ZigBee is targeted for low power, low data rate and secure applications for Wireless Personal
     Area Networking (WPAN).
   ➢ The ZigBee specifications support a robust mesh network containing multiple nodes. This
     networking strategy makes the network reliable by permitting messages to travel through a
     number of different paths to get from one node to another.
   ➢ ZigBee operates worldwide at the unlicensed bands of Radio spectrum, mainly at 2.400 to 2.484
     GHz, 902 to 928 MHz and 868.0 to 868.6 MHz.
   ➢ ZigBee Supports an operating distance of up to 100 meters and a data rate of 20 to 250Kbps.
   ➢ ZigBee is primarily targeting application areas like Home & Industrial Automation, Energy
     Management, Home control/security, Medical/Patient tracking, Logistics & Asset tracking and
     sensor networks & active RFID.
   ➢ Automatic Meter Reading (AMR), smoke and detectors, wireless telemetry, HVAC control,
     heating control, Lighting controls, Environmental controls, etc are examples for applications
     which can make use of the ZigBee technology.
   ➢ In the ZigBee terminology, each ZigBee device falls under any one of the following ZigBee
     device category.
   ➢ ZigBee Coordinator (ZC)/Network Coordinator: The ZigBee coordinator acts as the root of
     the ZigBee network. The ZC is responsible for initiating the ZigBee network and it has the
     capability to store information about the network.
   ➢ ZigBee Router (ZR)/Full function Device (FFD): Responsible for passing information from
     device to another device or to another ZR .
   ➢ ZigBee End Device (ZED)/Reduced Function Device (RFD): End device containing ZigBee
     functionality for data communication. It can talk only with a ZR or ZC and doesn’t have the
     capability to act as a mediator for transferring data from one device to another.
ZED ZED
ZED
ZR ZC ZR
ZED ZED
Recommended Questions
1. What is an embedded system? Mention its applications.
6. Mention all the cores around which an embedded system is built. Explain any two in detail.
7. Differentiate between
9. What are the different types of memories used in embedded system design? Explain the role of each
12. Explain the sequence of operation for communicating with I2C slave device.
a. IrDA
b. Wi-Fi
c. Bluetooth
d. Zig-Bee