2024VL22 SAURABH GARG

Experiment No. 2

Aim: Design and simulate n-channel SOI MOSFET of 1 micro meter gate length and extract
its I-V Characteristics using TCAD

Tools & Apparatus used: Silvaco TCAD

Theory: Silicon-on-Insulator (SOI) technology is an advanced semiconductor fabrication

technique that improves device performance by introducing an insulating layer between the
active silicon region and the supporting substrate. Unlike conventional bulk MOSFETs, SOI
transistors minimize parasitic interactions by restricting charge movement within a thin silicon
layer positioned above a buried oxide (BOX) layer, leading to enhanced electrical properties.

The structure of an SOI device consists of three main components. The active silicon layer
serves as the conduction channel where charge carriers move, facilitating current flow.
Beneath it, the buried oxide (BOX) layer acts as an insulating barrier, reducing parasitic
capacitance and improving switching speed. The handle substrate, typically composed of bulk
silicon, provides mechanical support and structural stability to the device.

SOI transistors exhibit unique operational characteristics. Since the active silicon is
electrically isolated from the substrate, they experience significantly lower junction
capacitance, which enhances switching efficiency. The BOX layer influences heat dissipation,
which can be either advantageous or challenging based on the design. Additionally, the
absence of a direct substrate connection alters the body effect, allowing for dynamic threshold
voltage control, a feature not present in bulk MOSFETs.

SOI devices are categorized based on depletion mode into Fully Depleted SOI (FD-SOI) and
Partially Depleted SOI (PD-SOI). FD-SOI employs an ultra-thin silicon layer where the entire
channel is depleted of free carriers under equilibrium, ensuring better electrostatic control and
mitigating short-channel effects. PD-SOI, on the other hand, has a thicker silicon layer that
permits some charge retention, leading to floating body effects that can impact transient
behavior.

Compared to bulk MOSFETs, SOI technology offers several advantages. The electrical
isolation provided by the BOX layer significantly reduces leakage currents and junction
capacitance, improving overall efficiency. The lower capacitance and enhanced carrier
mobility result in faster switching speeds, making SOI transistors ideal for high-performance
applications. Additionally, the reduced leakage and superior subthreshold characteristics lead
to lower power consumption, enhancing energy efficiency. With these benefits, SOI MOSFET
continue to drive innovations in semiconductor design, particularly in applications.
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Fig 2.1: n-channel SOI MOSFET

Table 2.1: Models used

Model Syntax Notes

Fermi-Dirac FERMI Incorporates statistical methods to adjust carrier

concentration in highly doped regions, improving
accuracy.
Bandgap Narrowing BGN Accounts for the reduction in bandgap in heavily
doped areas, influencing bipolar transistor
performance. The Klassen model is preferred.
Auger AUGER Models the three-carrier recombination process,
which becomes significant at high current densities.
Shockley-Read-Hall SRH Describes recombination via trap states using fixed
minority carrier lifetimes, applicable in most
simulations.
Concentration CONSRH Implements variable carrier lifetimes based on
Dependent concentration, ideal for silicon-based semiconductor
modeling.

Table 1.2: Device parameters

Device parameters Value(um)

Gate length 1
Gate Thickness 0.0025
Oxide Thickness 0.0075
Source Length 0.09
Drain Length 0.09
Channel length 1
Back Oxide Thickness 0.01
Doping conc. 1E19
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Design Code:
go atlas
mesh space.mult=1.0
#x mesh
x.mesh loc=0.0 spac=0.05
x.mesh loc=0.060 spac=0.05
x.mesh loc=0.15 spac=0.05
x.mesh loc=0.2 spac=0.05
x.mesh loc=1.2 spac=0.05
x.mesh loc=1.25 spac=0.05
x.mesh loc=1.34 spac=0.05
x.mesh loc=1.4 spac=0.05
#y mesh
y.mesh loc=0.0 spac=0.05
y.mesh loc=0.003 spac=0.05
y.mesh loc=0.01 spac=0.0025
y.mesh loc=0.03 spac=0.0025
y.mesh loc=0.04 spac=0.0025
y.mesh loc=0.06 spac=0.0025
#Region
region num=1 y.min=0.0 x.min=0.0 material=air
region num=2 y.min=0.003 y.max=0.01 x.min=0.2 x.max=1.2 material=oxide
region num=3 x.min=0.0 x.max=1.4 y.min=0.04 y.max=0.06 material=silicon
region num=4 x.min=0.0 x.max=1.4 y.min=0.03 y.max=0.04 material=oxide
region num=5 x.min=0.0 x.max=1.4 y.min=0.01 y.max=0.03 material=silicon

#electrode
electrode name=source x.min=0.06 x.max=0.15 y.min=0.003 y.max=0.01
electrode name=gate x.min=0.2 x.max=1.2 y.min=0.0 y.max=0.003
electrode name=drain x.min=1.25 x.max=1.34 y.min=0.003 y.max=0.01
#doping
doping uniform concentration=1E17 p.type region=3
doping uniform concentration=1E19 n.type x.min=0.0 x.max=0.2 y.min=0.01 y.max=0.03
doping uniform concentration=1E19 n.type x.min=1.2 x.max=1.4 y.min=0.01 y.max=0.03
#
contact name=gate workfunction=4.6
contact name=drain
contact name=source
material material=silicon me.tunnel=0.20 mh.tunnel=0.24
model fermi consrh cvt auger bgn ni.fermi print
method newton
solve init
solve vsource=0.0
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solve vgate=0.0

solve vdrain=0.03125
solve vdrain=0.0625
solve vdrain=0.125
solve vdrain=0.25
solve vdrain=0.5
solve vdrain=1.00

log outf=saurabhmos1.log
solve vgate=0.0 vstep=0.1 name=gate vfinal=1.5
#solve vgate=0.0
#log outf=dgtfetl.log
#solve vdrain=0.0 vstep=0.1 name=drain vfinal=1.5
tonyplot saurabhmos1.log
output val.band con.band qfn qfp e.field
save outf=saurabhmos2.str
tonyplot saurabhmos2.str
extract name="vt"(xintercept(maxslope(curve(abs(v."gate"), abs(i."drain"))))
abs(ave(v."drain"))/2.0)
#
extract name="idsmax" max(abs(i."drain"))
#
extract name="leak" min(abs(i."drain"))
quit
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Output:

Fig 2.2: n-channel SOI MOSFET Structure

Fig 2.3: I-V characteristics of n-channel SOI MOSFET

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Fig 2.4: I-V characteristics of n-channel SOI MOSFET (log scale)

Fig 2.3: Conduction Band and valance band energy

Results: Obtain I-V Characteristics and conduction and valance band energy and calculated
the following values.
1. Idmax(Maximum Drain Current) = 0.000304997 A/um
2. Imin(Leakage current) = 9.85003e-006 A/um
3. Vt (Threshold voltage) = 0.582056 V