Question Bank
Computer Organization and Architecture
1.Explain about the functional block diagram of a computer.
2.Compare between primary and secondary memory,
3. Subtract i) (45)10 – (25)10 and ii) (456)10 – (650)10 using 9’s complement method and verify
also the results with 10’s complement method.
4. Classify five differences between arithmetic and shift microoperation.
5. Consider a value (11011)2 stored in register. Identify the change in the value of register if 0
is inserted while right shift is executed and after that left shift is executed.
6. Categorize the basic instruction formats for I/O, Register and Memory reference
instructions.
7. Explain the concept of microinstruction and control memory.
8. Compare in five points about Hardwired and Micro programmed control unit.
9. Demonstrate five points about advantage of RISC over CISC architecture.
10. Explain about stored program organization. Illustrate with reference to 4096*16 memory,
the flowchart of Instruction cycle.
11. A processor with a 2 GHz speed is executing a program of 109 instructions. The following
are the execution times observable:
• 30% of instructions take 2 clock cycles
• 40% take 3 clock cycles
• 20% take 5 clock cycles
• 10% take 8 clock cycles
What is the average CPI (Cycles per instruction) of the system? What will be the
improvement in the execution time if the speed of the same processor is increased to 3 GHz?
12. Explain the operation of register stack and memory stack.
13. Discuss about registers in computers and show with a diagram, how they are connected
through a common bus.
14. Discuss about register stack and memory stack. Use a neat diagram to show the PUSH
and POP operation in terms of microoperations. Implement (A+B)*[C*(D+E)+F] in RPN.
15. Discuss about arithmetic microoperation and describe how A-B can be performed.
16. The outputs of four registers R0, R1, R2 and R3 relate to a 4:1 Mux to the input of
destination register R4. Each register is 8 bit long and the required transfer take place using
timing interval T0 to T3.
T0: R4,R0
T1: R4 R1
T2: R4 R2
T1: R4 R3
Demonstrate a hardware to implement this register transfer
17. Implement a hardware for logic micro-operation for A and B, A or B, A xor B and A
complement.
18. Compare between Memory reference and register reference instructions.
19. Show the status of the stack after each step when you perform the following operation
5*2+(3*4-4)+(2+4*4) on a stack based computer.
20. Explain CPU organization in terms of Single accumulator organization, General register
organization and Stack organization.
21. Consider a memory of 64K * 20 and the instruction has three parts which are the operand,
opcode and a mode bit to specify direct or indirect address. Use reference of this memory to
find out the instruction format followed by the size of a) Address register b) Data register c)
Instruction register.
22. Compare between Von Neumann and Harvard architecture
23. What do you mean by common bus system and why it is used?
24. Implement an instruction cycle flowchart to decode the instruction types for a memory
size of 8192 *18.
25. Discuss about direct and indirect addressing.
26. Illustrate this equation X=(A+B)*(C+D) with One address instruction, Two address
instruction, Three address instruction, Zero address instruction and RISC instruction.
27. Explain the instruction format for one address, two address and three address instruction.
28. Explain indexed and based register addressing mode.
29. Explain with examples the concept of any four data transfer, data manipulation and program
control instruction.
30. Illustrate with a neat flowchart to explain how the control unit determines the instruction
after decoding an instruction.
