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X20CM8281-en V3.20

The document provides detailed specifications for the X20CM8281, a universal mixed module featuring 4 digital inputs, 2 digital outputs, 1 analog input, and 1 analog output. It includes information on order data, technical descriptions, operating conditions, and diagnostics, along with relevant certifications. Additionally, it outlines the module's electrical properties, input/output characteristics, and LED status indicators for monitoring functionality.

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0% found this document useful (0 votes)
43 views22 pages

X20CM8281-en V3.20

The document provides detailed specifications for the X20CM8281, a universal mixed module featuring 4 digital inputs, 2 digital outputs, 1 analog input, and 1 analog output. It includes information on order data, technical descriptions, operating conditions, and diagnostics, along with relevant certifications. Additionally, it outlines the module's electrical properties, input/output characteristics, and LED status indicators for monitoring functionality.

Uploaded by

lucashrmg
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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X20CM8281

X20CM8281

1 General information
1.1 Other applicable documents

For additional and supplementary information, see the following documents.

Other applicable documents


Document name Title
MAX20 X20 system user's manual
MAEMV Installation / EMC guide

1.2 Order data


Order number Short description Figure
Other functions
X20CM8281 X20 universal mixed module, 4 digital inputs, 24 VDC, sink, 1-
wire connections, 2 digital outputs, 0.5 A, source, 1-wire con-
nections, 1 analog input, ±10 V or 0 to 20 mA / 4 to 20 mA, 12-
bit converter resolution, 1 analog output, ±10 V / 0 to 20 mA, 12-
bit converter resolution, 2 counters as event counters or for gate
measurement
Required accessories
Bus modules
X20BM11 X20 bus module, 24 VDC keyed, internal I/O power supply con-
nected through
X20BM15 X20 bus module, with node number switch, 24 VDC keyed, in-
ternal I/O power supply connected through
Terminal blocks
X20TB12 X20 terminal block, 12-pin, 24 VDC keyed

Table 1: X20CM8281 - Order data

Data sheet V3.20 1


X20CM8281

1.3 Module description

This module is a universal mixed module. This module combines digital inputs and outputs with analog inputs and
outputs.
Functions:
• Digital inputs
• Event or gate time counter
• Monitoring the output status
• Analog input and output
Digital inputs
The digital inputs are equipped with an input filter with a configurable input delay. The input states can also be
latched if required.
Event counter / Gate measurement
The module has 2 counter channels that can be used either as event counters or for gate measurement.
Monitoring status of the digital outputs
The output signal of the digital outputs is monitored for short circuit or overload.
Analog input filter
The module is equipped with a configurable input filter with input ramp limiting.
Monitoring the input signal
The input signal of the analog inputs is monitored against the upper and lower limit values as well as for open
circuit. Other limit values can be defined if necessary.

2 Data sheet V3.20


X20CM8281

2 Technical description
2.1 Technical data
Order number X20CM8281
Short description
I/O module 4 digital inputs, 2 digital outputs, 1 analog input, 1 analog output, special functions
General information
B&R ID code 0x24C3
Status indicators I/O function per channel, operating state, module status
Diagnostics
Module run/error Yes, using LED status indicator and software
Analog inputs Yes, using LED status indicator and software
Digital outputs Yes, using LED status indicator and software (output error status)
Power consumption
Bus 0.01 W
Internal I/O 1.75 W
Additional power dissipation caused by actuators -
(resistive) [W]
Certifications
CE Yes
UKCA Yes
ATEX Zone 2, II 3G Ex nA nC IIA T5 Gc
IP20, Ta (see X20 user's manual)
FTZÚ 09 ATEX 0083X
UL cULus E115267
Industrial control equipment
HazLoc cCSAus 244665
Process control equipment
for hazardous locations
Class I, Division 2, Groups ABCD, T5
DNV Temperature: B (0 to 55°C)
Humidity: B (up to 100%)
Vibration: B (4 g)
EMC: B (bridge and open deck)
LR ENV1
KR Yes
ABS Yes
BV EC33B
Temperature: 5 - 55°C
Vibration: 4 g
EMC: Bridge and open deck
EAC Yes
KC Yes
Digital inputs
Quantity 4
Nominal voltage 24 VDC
Input characteristics per EN 61131-2 Type 1
Input voltage 24 VDC -15% / +20%
Input current at 24 VDC Typ. 3.3 mA
Input circuit Sink
Input filter
Hardware ≤2 µs
Software Default 1 ms, configurable between 0 and 25 ms in 0.2 ms increments
Connection type 1-wire connections
Input resistance Typ. 7.18 kΩ
Additional functions 20 kHz event counting, gate measurement
Switching threshold
Low <5 VDC
High >15 VDC
Insulation voltage between channel and bus 500 Veff
Event counters
Quantity 2
Signal form Square wave pulse
Evaluation Each negative edge, cyclic counter
Input frequency Max. 20 kHz
Counter 1 Input 1
Counter 2 Input 3
Counter frequency Max. 20 kHz
Counter size 16-bit
Gate measurement
Quantity 1
Signal form Square wave pulse
Evaluation Positive edge - Negative edge

Table 2: X20CM8281 - Technical data

Data sheet V3.20 3


X20CM8281
Order number X20CM8281
Counter frequency
Internal 48 MHz, 24 MHz, 12 MHz, 6 MHz, 3 MHz, 1.5 MHz, 750 kHz, 375 kHz, 187.5 kHz
Counter size 16-bit
Length of pause between pulses ≥100 µs
Pulse length ≥20 µs
Supported inputs Input 4
Analog inputs
Quantity 1
Input ±10 V or 0 to 20 mA / 4 to 20 mA, via different terminal connections
Input type Single-ended
Digital converter resolution
Voltage ±12-bit
Current 12-bit
Conversion time 400 µs, conversion runs asynchronous to the X2X Link cycle
Output format INT
Output format
Voltage INT 0x8001 - 0x7FFF / 1 LSB = 0x0008 = 2.441 mV
Current INT 0x0000 - 0x7FFF / 1 LSB = 0x0008 = 4.883 µA
Input impedance in signal range
Voltage >1 MΩ
Current -
Load
Voltage -
Current <300 Ω
Input protection Protection against wiring with supply voltage
Permissible input signal
Voltage Max. ±15 V
Current Max. ±50 mA
Output of digital value during overload
Undershoot
Voltage 0x8001
Current 0x0000
Overshoot
Voltage 0x7FFF
Current 0x7FFF
Conversion procedure Successive approximation
Input filter Second-order low-pass filter / Cutoff frequency 1 kHz
Max. error
Voltage
Gain 0.08% 1)
Offset 0.02% 2)
Current
Gain 0 to 20 mA = 0.08% / 4 to 20 mA = 0.1% 1)
Offset 0 to 20 mA = 0.03% / 4 to 20 mA = 0.16% 3)
Max. gain drift
Voltage 0.01%/°C 1)
Current 0 to 20 mA = 0.009 %/°C
4 to 20 mA = 0.0113 %/°C 1)
Max. offset drift
Voltage 0.002%/°C 2)
Current 0 to 20 mA = 0.004 %/°C
4 to 20 mA = 0.005 %/°C 3)
Nonlinearity
Voltage <0.02% 2)
Current <0.02% 3)
Insulation voltage between channel and bus 500 Veff
Digital outputs
Quantity 2
Variant Current-sourcing FET
Nominal voltage 24 VDC
Switching voltage 24 VDC -15% / +20%
Nominal output current 0.5 A
Total nominal current 1A
Connection type 1-wire connections
Output circuit Source
Output protection Thermal shutdown in the event of overcurrent or short circuit, integrat-
ed protection for switching inductive loads, reverse polarity protection
Diagnostic status Output monitoring with 10 ms delay
Leakage current when the output is switched off 5 µA
RDS(on) 105 mΩ
Peak short-circuit current <14 A
Switch-on in the event of overload shutdown or Approx. 10 ms (depends on the module temperature)
short-circuit shutdown

Table 2: X20CM8281 - Technical data

4 Data sheet V3.20


X20CM8281
Order number X20CM8281
Switching delay
0→1 <250 µs
1→0 <270 µs
Switching frequency
Resistive load Max. 100 Hz
Inductive load See section "Switching inductive loads".
Braking voltage when switching off inductive loads Typ. 50 VDC
Insulation voltage between channel and bus 500 Veff
Analog outputs
Quantity 1
Output ±10 V or 0 to 20 mA, via different terminal connections
Digital converter resolution 12-bit
Conversion time 300 µs, conversion runs asynchronous to the X2X Link cycle
Settling time on output change over entire range 1 ms
Switch on/off behavior Internal enable relay for startup and errors
Max. error
Voltage
Gain 0.04% 4)
Offset 0.0225% 5)
Current
Gain 0.05% 4)
Offset 0.125% 5)
Output protection Short-circuit proof
Output format
Voltage INT 0x8001 - 0x7FFF / 1 LSB = 0x0010 = 4.882 mV
Current INT 0x0000 - 0x7FFF / 1 LSB = 0x0010 = 9.766 µA
Load per channel
Voltage Max. ±10 mA, load ≥ 1 kΩ
Current Max. load is 400 Ω
Max. gain drift
Voltage 0.012%/°C 4)
Current 0.014 %/°C 4)
Max. offset drift
Voltage 0.0075% / °C 5)
Current 0.03 %/°C 5)
Error caused by load change
Voltage Max. 0.02%, from 10 MΩ → 1 kΩ, resistive
Current Max. 0.5%, from 1 Ω → 400 Ω, resistive
Nonlinearity <0.1% 6)
Insulation voltage between channel and bus 500 Veff
Electrical properties
Electrical isolation Channel isolated from bus
Channel not isolated from channel
Operating conditions
Mounting orientation
Horizontal Yes
Vertical Yes
Installation elevation above sea level
0 to 2000 m No limitation
>2000 m Reduction of ambient temperature by 0.5°C per 100 m
Degree of protection per EN 60529 IP20
Ambient conditions
Temperature
Operation
Horizontal mounting orientation -25 to 60°C
Vertical mounting orientation -25 to 50°C
Derating See section "Derating".
Storage -40 to 85°C
Transport -40 to 85°C
Relative humidity
Operation 5 to 95%, non-condensing
Storage 5 to 95%, non-condensing
Transport 5 to 95%, non-condensing
Mechanical properties
Note Order 1x terminal block X20TB12 separately.
Order 1x bus module X20BM11 separately.
Pitch 12.5+0.2 mm

Table 2: X20CM8281 - Technical data


1) Based on the current measured value.
2) Based on the 20 V measurement range.
3) Based on the 20 mA measurement range.
4) Based on the current output value.
5) Based on the entire output range.
6) Based on the output range.

Data sheet V3.20 5


X20CM8281

2.2 LED status indicators

For a description of the various operating modes, see section "Additional information - Diagnostic LEDs" in the
X20 system user's manual.
Figure LED Color Status Description
r Green Off No power to module
Single flash RESET mode
Blinking PREOPERATIONAL mode
On RUN mode
e Red Off No power to module or everything OK
Single flash Warning/Error on an I/O channel. Level monitoring for digital outputs has been
triggered.
e+r Red on / Green single flash Invalid firmware
1-4 Green Input state of the corresponding digital input
1-2 Orange Output status of the corresponding digital output
1 Green Off Open line or sensor is disconnected
Blinking Input signal overflow or underflow
On Analog/digital converter running, value OK
1 Orange Off Value = 0
On Value ≠ 0

2.3 Pinout

r e
X20 CM 8281

1 2
3 4
1 2
1 1

DI 1 DI 2

DI 3 DI 4

DO 1 DO 2

AI + 1 I AO + 1 I

AI + 1 U AO + 1 U

AI - 1 U/I AO - 1 U/I

2.4 Connection example

+24 VDC CM +24 VDC


GND GND
Sensor 1 Sensor 2

Sensor 3 Sensor 4

Actuator 1 Actuator 2
Load

+24 VDC +24 VDC


GND GND

6 Data sheet V3.20


X20CM8281

2.5 Input circuit diagram

Digital inputs

Input x

VDR
Input status

I/O status

LED (green)

Analog inputs
PTC
AI +I

A/D Input value


Converter

I/O status
AI +U

AI -U/I
LED (green)

2.6 Output circuit diagram

Digital outputs
24 V

High side
Output status
Logic
Output x

VDR
Output
monitoring

I/O status

LED (orange)

Analog outputs

Enable relay AO +I

Output value
D/A
Converter
I/O status Enable relay AO +U

AO -U/I
LED (orange)

Reset

Data sheet V3.20 7


X20CM8281

2.7 Switching inductive loads

100 H 10 H
1000

1H

Coil resistance Coil inductance


[Ω] 100 mH

100
10 mH

50
0.1 1 10 100
Max. switching cycles / second
(with 90% duty cycle)

2.8 Derating

There is no derating when operated below 55°C.


During operation over 55°C, the power dissipation of the modules to the left and right of this module is not permitted
to exceed 1.15 W!
For an example of calculating the power dissipation of I/O modules, see section "Mechanical and electrical config-
uration - Power dissipation of I/O modules" in the X20 user's manual.
Power dissipation > 1.15 W

Power dissipation > 1.15 W


Power dissipation ≤ 1.15 W
Power dissipation ≤ 1.15 W
Neighboring X20 module

Neighboring X20 module


This module
X20 module

X20 module

8 Data sheet V3.20


X20CM8281

3 Function description
3.1 Digital inputs

The module is equipped with 4 digital input channels.

3.1.1 Recording the input state

Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered state is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.

Information:
The register is described in "Digital inputs and status of the digital outputs" on page 17.

3.1.2 Input filter

An input filter is available for each input. Disturbance pulses that are shorter than the input delay are suppressed
by the input filter.
Input
signal

Time

Signal after tDelay tDelay tDelay


the filter

Time

tDelay ⇒ Input delay

The input delay can be set in steps of 100 μs. It makes sense, however, to enter values in steps of 2 since the
input signals are sampled in an interval of 200 μs.
Values Filter
0 No software filter
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value.

Information:
The register is described in "Digital input filter" on page 17.

3.1.3 Event or gate time counter

The module provides 2 counters.


• Counter 1 (digital input 1) is only intended for event counter operation.
• Counter 2 can be configured as an event counter (digital input 3) or for gate time measurement (digital
input 4).
Event counter operation
The falling (negative) edges are recorded on the counter input.
The counter value is collected with a fixed offset to the network cycle and transferred in the same cycle.
Gate measurement
The time of rising to falling edges for the gate input is registered using an internal frequency. The result is checked
for overflow (0xFFFF) and corrected according to the prescaler set.
The recovery time between measurements must be greater than 100 µs.
The measurement result is transferred with the falling edge to the result memory.
Data sheet V3.20 9
X20CM8281

Configuring/Clearing counters
Counters are configured and cleared in a common register. This register contains configuration data in addition
to cyclic data.
The preset configuration for this register is only kept when operating directly on the CPU. On the bus controller,
the configuration is always overwritten with 0.
With upgrade version 1.0.2.1 and later, however, the cyclic bit can be hidden to avoid overwriting the configuration.

Information:
If the counter should be cleared, this must take place using an acyclic write command. The configura-
tion bits must also be transferred together with bit ResetCounter!

Information:
The registers are described in "Event or gate counter" on page 17.

3.2 Digital outputs

The module is equipped with 2 digital output channels.


The output state is transferred to the output channels with a fixed offset (<60 µs) in relation to the network cycle
(SyncOut).

3.2.1 Monitoring the output status

The status of each individual channel can be read out.


Bit Description
0 No error
1 Short circuit or overload

Information:
The register is described in "Digital inputs and status of the digital outputs" on page 17.

3.3 Analog input and output

The module is equipped with 1 analog input and output with 13-bit resolution. The input and output can be config-
ured separately to either a voltage or current input for the following ranges:
Input signal:
• ±10 V voltage signal
• 0 to 20 mA current signal
• 4 to 20 mA current signal
Output signal:
• ±10 V voltage signal
• 0 to 20 mA current signal
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Configuration via registers must take place in addition to using the appropriate terminal connections.

Information:
3.3.1 Limiting the input signal

The input signal is monitored against the upper and lower limit values as well as for open circuit (only for voltage
signal measurement). These must be defined according to the operating mode:
Limit value (default) Voltage signal
Upper maximum limit value -10 V +32767
Lower minimum limit value +10 V -32768
Limit value (default) Current signal 0 to 20 mA Current signal 4 to 20 mA
Upper maximum limit value 20 mA +32767 20 mA +32767
Lower minimum limit value 0 mA 0 4 mA -8191

10 Data sheet V3.20


X20CM8281

Other limit values can be defined if necessary. These are enabled automatically by writing to the limit value registers.
From this point on, the analog values will be monitored and limited according to the new limits. The results of
monitoring are displayed in the status register.
Examples of limit value settings
Use case Limit value settings
Current signal: 4 to 20 mA If values <4 mA should be measured for a current signal with 4 to 20 mA, a negative limit value must be
set: 0 mA corresponds to value -8192 (0xE000).

Limiting the analog value


In addition to the status information, the analog value is fixed to the upper or lower limit value by default in the error
state. The analog value is limited to the new values if the limit values were changed.

Information:
The registers are described in "Analog inputs" on page 20.

Data sheet V3.20 11


X20CM8281

3.3.2 Input filter

The module is equipped with a configurable input filter. The minimum X2X cycle time must be greater than 400 μs.
The filter function is disabled for shorter X2X cycle times.
When the input filter is enabled, the channel is sampled at 1 ms intervals. Conversion is performed acyclically to
the X2X cycle.

Information:
The filter sampling time is fixed at 1 ms and is acyclic to the X2X cycle.

3.3.2.1 Input ramp limiting

Input ramp limiting can only be performed in conjunction with filtering. Input ramp limiting is performed before
filtering.
The difference of the input value change is checked for exceeding the specified limit. In the event of overshoot,
the tracked input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255

Input ramp limiting is well suited for suppressing disturbances (spikes). The following examples show the function-
ality of input ramp limiting based on an input step and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the tracked input value with the following settings:
Input ramp limiting = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally tracked input value before the filter

17000

8000

0
1 2 3 4 5 6 7 8 t [ms]

Input step

Figure 1: Tracked input value for input step

12 Data sheet V3.20


X20CM8281

Example 2
A disturbance interferes with the input value. The diagram shows the tracked input value with the following settings:
Input ramp limiting = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally tracked input value before the filter

16000
Disturbance (spike)

8000

0
1 2 3 4 5 6 7 8 t [ms]

Figure 2: Tracked input value for disturbance

3.3.2.2 Filter level

A filter can be defined to prevent large input steps. This filter is used to bring the input value closer to the actual
analog value over a period of several milliseconds.
Filtering takes place after any input ramp limiting has been carried out.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128

Data sheet V3.20 13


X20CM8281

The following examples show the functionality of the filter based on an input step and a disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limiting = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4

16000

8000

0
1 2 3 4 5 6 7 8 t [ms]

Input step

Figure 3: Calculated value during input step


Example 2
A disturbance interferes with the input value. The diagram shows the calculated value with the following settings:
Input ramp limiting = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4

16000
Disturbance (spike)

8000

0
1 2 3 4 5 6 7 8 t [ms]

Figure 4: Calculated value during disturbance

14 Data sheet V3.20


X20CM8281

4 Register description
4.1 General data points

In addition to the registers described in the register description, the module has additional general data points.
These are not module-specific but contain general information such as serial number and hardware variant.
General data points are described in section "Additional information - General data points" in the X20 system user's
manual.

4.2 Function model 0 - Standard


Register Name Data type Read Write
Cyclic Non-cyclic Cyclic Non-cyclic
Configuration
12 ConfigOutput01 (digital input filter) USINT ●
14 ConfigOutput02 (counter configuration) USINT ●
22 ConfigOutput03 (analog input filter) USINT ●
24 ConfigOutput04 (configure analog input/output) USINT ●
26 ConfigOutput05 (lower limit value) INT ●
28 ConfigOutput06 (upper limit value) INT ●
Communication
Digital inputs
0 Digital inputs USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput04 Bit 3
4 Counter01 UINT ●
6 Counter02 UINT ●
14 Reset counter USINT ●
ResetCounter01 Bit 4
ResetCounter02 Bit 5
16 Input state of digital latch inputs 1 - 4 DINT ●
DigitalInput01Latch Bit 0
... ...
DigitalInput04Latch Bit 3
18 Acknowledge digital inputs USINT ●
DigitalInput01LatchQuit Bit 0
... ...
DigitalInput04LatchQuit Bit 3
Digital outputs
0 Status of the digital outputs USINT ●
StatusDigitalOutput01 Bit 4
StatusDigitalOutput02 Bit 5
2 Switching state of digital outputs 1 to 2 USINT ●
DigitalOutput01 Bit 0
DigitalOutput02 Bit 1
Analog input
8 AnalogInput01 INT ●
31 StatusInput01 USINT ●
Analog output
10 AnalogOutput01 INT ●

Data sheet V3.20 15


X20CM8281

4.3 Function model 254 - Bus controller


Register Offset1) Name Data type Read Write
Cyclic Non-cyclic Cyclic Non-cyclic
Configuration
12 - ConfigOutput01 (digital input filter) USINT ●
14 - ConfigOutput02(counter configuration) USINT ●
22 - ConfigOutput03 (analog input filter) USINT ●
24 - ConfigOutput04 (configure analog input/out- USINT ●
put)
26 - ConfigOutput05 (lower limit value) INT ●
28 - ConfigOutput06 (upper limit value) INT ●
Communication
Digital inputs
0 0 Digital inputs USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput04 Bit 3
4 2 Counter01 UINT ●
6 4 Counter02 UINT ●
14 - Reset counter USINT ●
ResetCounter01 Bit 4
ResetCounter02 Bit 5
16 - Input state of digital latch inputs 1 - 4 DINT ●
DigitalInput01Latch Bit 0
... ...
DigitalInput04Latch Bit 3
18 - Acknowledge digital inputs USINT ●
DigitalInput01LatchQuit Bit 0
... ...
DigitalInput04LatchQuit Bit 3
Digital outputs
0 0 Status of the digital outputs USINT ●
StatusDigitalOutput01 Bit 4
StatusDigitalOutput02 Bit 5
2 0 Switching state of digital outputs 1 to 2 USINT ●
DigitalOutput01 Bit 0
DigitalOutput02 Bit 1
Analog input
8 6 AnalogInput01 INT ●
31 - StatusInput01 USINT ●
Analog output
10 2 AnalogOutput01 INT ●
1) The offset specifies the position of the register within the CAN object.

4.3.1 Using the module on the bus controller

Function model 254 "Bus controller" is used by default only by non-configurable bus controllers. All other bus
controllers can use other registers and functions depending on the fieldbus used.
For detailed information, see section "Additional information - Using I/O modules on the bus controller" in the X20
user's manual (version 3.50 or later).

4.3.2 CAN I/O bus controller

The module occupies 1 analog logical slot on CAN I/O.

16 Data sheet V3.20


X20CM8281

4.4 Digital inputs

4.4.1 Digital inputs and status of the digital outputs

Name:
DigitalInput01 to DigitalInput04
StatusDigitalOutput01 to StatusDigitalOutput02
This register is used to indicate the input state of the digital inputs and the status of the digital outputs.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
3 DigitalInput04 0 or 1 Input state - Digital input 4
4 StatusDigitalOutput01 0 Digital output channel 1: No error
1 Digital output channel 1: Short circuit or overload
5 StatusDigitalOutput02 0 Digital output channel 2: No error
1 Digital output channel 2: Short circuit or overload
6-7 Reserved -

4.4.2 Digital input filter

Name:
ConfigOutput01
The filter value for all digital inputs can be configured in this register.
Data type Values Filter
USINT 0 No software filter (bus controller default setting)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value.

4.4.3 Event or gate counter

4.4.3.1 Event or gate counter

Name:
Counter01 to Counter02
Counter01 is intended for event counter operation.
Event counter operation or gate measurement can be selected for Counter02:
Data type Value
UINT Counter value

Data sheet V3.20 17


X20CM8281

4.4.3.2 Counter configuration

Name:
ConfigOutput02
The individual counters can be configured and also reset in this register. For additional information, see "Config-
uring/Clearing counters" on page 10.
Data type Values Bus controller default setting
USINT See the bit structure. 0

Bit structure:
Bit Name Value Information
0-3 Counter02 (counter frequency, only with gate measurement) 0 48 MHz (bus controller default setting)
1 3 MHz
2 187.5 kHz
3 24 MHz
4 12 MHz
5 6 MHz
6 1.5 MHz
7 750 kHz
8 375 kHz
4 ResetCounter01 0 No influence on the counter
1 Clear counter (at positive edge)
5 ResetCounter02 0 No influence on the counter
1 Clear counter (at positive edge)
6-7 Counter02 (operating mode) 0 Event counter measurement (bus controller default setting)
1 Gate measurement

4.4.4 Input latch

4.4.4.1 Input state of digital latch inputs 1 - 4

Name:
DigitalInputLatch01 to DigitalInputLatch04
This register is used to indicate input state of digital inputs 1 to 4 after expiration of the input filter time.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 DigitalInputLatch01 0 or 1 Input state of digital input 1 after expiration of the delay time
... ...
3 DigitalInputLatch04 0 or 1 Input state of digital input 4 after expiration of the delay time
4-7 Reserved -

4.4.4.2 Acknowledge digital inputs

Name:
DigitalInput01LatchQuitt to DigitalInput04LatchQuitt
This register is used to reset the input latches channel by channel.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 DigitalInput01LatchQuitt 0 No influence on the latch status
1 Resets the latch status
... ...
3 DigitalInput04LatchQuitt 0 No influence on the latch status
1 Resets the latch status
4-7 Reserved -

18 Data sheet V3.20


X20CM8281

4.5 Digital outputs

The output state is transferred to the output channels with a fixed offset (<60 µs) based on the network cycle
(SyncOut).

4.5.1 Switching state of digital outputs 1 to 2

Name:
DigitalOutput01 to DigitalOutput02
This register is used to store the switching state of digital outputs 1 to 2.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
1 DigitalOutput02 0 Digital output 02 reset
1 Digital output 02 set

4.5.2 Digital inputs and status of the digital outputs

Name:
DigitalInput01 to DigitalInput04
StatusDigitalOutput01 to StatusDigitalOutput02
This register is used to indicate the input state of the digital inputs and the status of the digital outputs.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
3 DigitalInput04 0 or 1 Input state - Digital input 4
4 StatusDigitalOutput01 0 Digital output channel 1: No error
1 Digital output channel 1: Short circuit or overload
5 StatusDigitalOutput02 0 Digital output channel 2: No error
1 Digital output channel 2: Short circuit or overload
6-7 Reserved -

Data sheet V3.20 19


X20CM8281

4.6 Analog inputs

The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.

4.6.1 Analog input register

Name:
AnalogInput01
This register is used to indicate the analog input value depending on the configured operating mode.
Data type Value Input signal:
INT -32768 to 32767 Voltage signal -10 to 10 VDC
0 to 32767 Current signal 0 to 20 mA
0 to 32767 Current signal 4 mA to 20 mA

4.6.2 Configuring the input filter

Name:
ConfigOutput03
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values Bus controller default setting
USINT See the bit structure. 0

Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter disabled (bus controller default setting)
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines input ramp limiting 000 The input value is applied without limitation
(bus controller default setting)
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0

4.6.3 Lower limit for the analog value

Name:
ConfigOutput05
This register can be used to configure the lower limit for analog values. If the analog value goes below the limit
value, it is frozen at this value and the corresponding error status bit is set.
Data type Values Information
INT -32768 to 32767 Bus controller default setting: -32768

Information:
• The default value of -32768 corresponds to the minimum default value of -10 VDC.
• For current measurements, this value should be set to 0.
• When configured as 4 to 20 mA, this value can be set to -8192 (corresponds to 0 mA) in order
to display values <4 mA.

20 Data sheet V3.20


X20CM8281

4.6.4 Upper limit for the analog value

Name:
ConfigOutput06
This register can be used to configure the upper limit for analog values. If the analog value goes above the limit
value, it is frozen at this value and the corresponding error status bit is set.
Data type Values Information
INT -32767 to 32767 Bus controller default setting: 32767

Information:
• The default value of 32767 corresponds to the maximum default value of 20 mA or +10 VDC.

4.6.5 Status of the analog input

Name:
StatusInput01
This register is used to monitor the analog input on the module. A change in the monitoring status generates an
error message.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Description Value Information
0-1 Channel 1 00 No error
01 Lower limit value exceeded
10 Upper limit value exceeded
11 Open line1)
2-7 Reserved 0
1) Open-circuit detection does not occur during current signal measurement.

4.7 Analog output

The channel can be configured for the current or voltage signal. The type of signal is also determined by the
terminals used.

4.7.1 Analog output register

Name:
AnalogOutput01
This register is used to output the analog output value appears depending on the operating mode that is set.
Data type Value Information
INT -32768 to 32767 Voltage signal -10 to 10 VDC
0 to 32767 Current signal 0 to 20 mA

4.8 Configuration of the analog inputs and outputs

Name:
ConfigOutput04
This register can be used to define the type and range of signal measurement.
Data type Values Bus controller default setting
USINT See the bit structure. 0

Bit structure:
Bit Description Value Information
0-1 Analog input 00 Voltage signal -10 VDC to +10 VDC (bus controller default set-
ting)
01 Current signal 0 mA to 20 mA
11 Current signal 4 mA to 20 mA
2-3 Reserved 0
4 Analog output 0 Voltage signal -10 VDC to +10 VDC (bus controller default set-
ting)
1 Current signal 0 mA to 20 mA
5-7 Reserved 0

Data sheet V3.20 21


X20CM8281

4.9 Minimum cycle time

The minimum cycle time specifies how far the bus cycle can be reduced without communication errors occurring.
It is important to note that very fast cycles reduce the idle time available for handling monitoring, diagnostics and
acyclic commands.
Minimum cycle time
Without filtering 100 μs
With filtering 150 μs

4.10 Minimum I/O update time

The minimum I/O update time specifies how far the bus cycle can be reduced so that an I/O update is performed
in each cycle.
Minimum I/O update time
Digital without filtering 150 μs
Digital with filtering 200 μs
Analog without filtering 400 μs
Analog with filtering 1000 μs

22 Data sheet V3.20

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