•

By J. Mathenge

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• Transistor biasing refers to the process of setting the DC
operating point(Q point), of a transistor circuit to ensure
and ! " in various
electronic circuits, such as amplifiers, oscillators, and
switches.
• The #! junction is ! $ and
! # junction is % & $ ! $.

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 $ %

(i) Base bias

(ii) Base Bias with emitter feedback

(iii) Base Bias with collector feedback

(iv) Base Bias with collector and emitter feedback

(v) Emitter Bias with two supplies

(vi) Voltage divider bias

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' ( $)

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' ( $)

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#

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#

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* # $ ' ( )

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* # $
'+ ( )

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* # $

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+ "

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+ "

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(

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,

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FET’s
Current Controlled vs Voltage Controlled Devices

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Types of Field Effect Transistors
(The Classification)

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 JFET Construction
There are two types of JFET’s: n channel and p channel. The n channel is more
widely used.

There are three ohmic terminals:

Drain (D) and Source (S) are connected to n channel; Gate (G) is connected to
the p type material.
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 N Channel JFET Operation

The nonconductive depletion region becomes thicker with increased reverse bias.
( The two gate regions of each FET are connected to each other.)

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 -# .

P Channel JFET operates in a similar manner as the n channel JFET except

the voltage polarities and current directions are reversed

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Symbols

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 BJT VS FET

Since IG=0, ID=IS

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JFET as an Amplifier

VGG= Bias voltage

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 JFET as an Amplifier
• A small change in the reverse bias on the gate produces a large
change in drain current. This fact makes JFET capable of raising the
strength of a weak signal.

• During the positive half of signal, the reverse bias on the gate
decreases. This increases the channel width and hence the drain
current.

• During the negative half cycle of the signal, the reverse voltage on the
gate increases. Consequently, the drain current decreases. The result
is that a small change in voltage at the gate produces a large change
in drain current.

• These large variations in drain current produce large output across

the load RL. In this way, JFET acts as an amplifier.
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 Output Characteristics of JFET
• At first, the drain current ID rises rapidly with drain source voltage VDS but
then becomes constant.
• The drain source voltage above which drain current becomes constant is
known as %% .
• After pinch off voltage, the channel widtha becomes so narrow that depletion
layers almost touch each other.
• The drain current passes through the small passage between these layers.
• Therefore, increase in drain current is very small with VDS above pinch off
voltage. Consequently, drain current remains constant.

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 Output Characteristics of JFET

At the pinch off point:

• any further increase in VGS does not produce any increase in ID. VGS
at
pinch off is denoted as Vp.
• ID is at saturation or maximum. It is referred to as IDSS.
• The ohmic value of the channel is at maximum. 29
, $#
Some Important
'/ )
Terms
,,

!!
It is sometimes called " # .

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, $# $
Important
'/ )
Terms
,,

• Since is measured under shorted gate conditions, it is the

maximum drain current that you can get with normal operation of
$%&'.
• There is a maximum drain voltage [ (( ))] that can be applied to a
$%&'. If the drain voltage exceeds (( )), $%&' would breakdown
• The region between * and (( )) (breakdown voltage) is called
or . As long as is kept within
this range, will remain constant for a constant value of . In other
words, in the active region, $%&' behaves as a constant–current device.
• For proper working of $%&', it must be operated in the active region.

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 Important Terms
- %% '*-)

• ( ( (
+# (

0 # %% 1*0, ' %%)2

( + !!
# ( "

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 Important Terms
• We note that gate source cut off voltage
[ ( !!)] on the transfer characteristic is
equal to pinch off voltage * on the drain
characteristic

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 Important Terms
3 3$ ' $)

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Important Terms
$ ' % )

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 Important Terms
+ % % '4)
• !
;
(; )

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 %
The input output transfer characteristic of the JFET is not as
straight forward as it is for the BJT

In a BJT,  (hFE) defined the relationship between IB (input

current) and IC (output current).

In a JFET, the relationship (Shockley’s Equation) between VGS

(input voltage) and ID (output current) is used to define the
transfer characteristics, and a little more complicated (and not
linear):
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 VGS 
ID = IDSS  1 - 
 VP 

As a result, FET’s are often referred to a square law devices

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 % ' $ )

From this graph it is easy to determine the value of ID for a given value of VGS
It is also possible to determine IDSS and VP by looking at the knee where VGS is
0
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 Exercise
Calculate the Drain Current for the circuit below:

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 Exercise
Find VDS and VGS in Fig. Qn 3(c) given that ID = 5 mA

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