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COA Unit 2 Tutorial

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25 views1 page

COA Unit 2 Tutorial

Uploaded by

dss745147
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Rajarshi Rananjay Sinh Institute of Management of Technology Amethi

B. Tech CSE & IT 2nd Year

Subject: Computer Organization and Architecture

Unit 2 Tutorial

1. Differentiate between Full Adder and Half Adder.


2. What is the difference between Signed No and Unsigned No Representation?
3. Why we use IEE standard representation for floating point number?
4. Difference between restoring division Algorithm and Non restoring division Algorithm.
5. List & Explain major benefits of design and using Array multiplexer.
6. Explain the concept of Ripple Adder.
7. Show the step by step of multiplication of following no with the help of booth Algorithm. Size
of Register should be 5 Bits.
(i) (+13)(+11) (ii) (+13)(-11)
8. Design a 4- bit Parallel Adder with the help of 4 – Full Adder.
9. Representation of logical diagram of Full Adder.
10. Representation of logical diagram of Half Adder.

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