Swap two 8-bit numbers stored at memory find posi and nega num from list timer 0 to generate

timer 0 to generate delay of 1 sec

locations 30H and 31H
.model small ORG 0000H ; Start of code
ORG 0000H ; Start of program memory .data
numbers db -5, 3, -1, 0, 9, -4, 6, -7, 2, -8 ; List of 10 START:
MOV A, 30H ; Load the first number into signed numbers MOV P0, #00H ; Initialize Port 0 (LED off)
Accumulator A pos_count db 0 ; Counter for positive numbers MOV TMOD, #01H ; Timer 0 Mode 1 (16-bit timer)
MOV R0, A ; Store A into Register R0 temporarily neg_count db 0 ; Counter for negative numbers
MAIN_LOOP:
MOV A, 31H ; Load the second number into .code ACALL DELAY_1S ; Call 1-second delay
Accumulator A .startup CPL P0.0 ; Toggle LED on P0.0
MOV 30H, A ; Store second number into the first mov cx, 10 ; Loop counter = 10 numbers SJMP MAIN_LOOP ; Repeat forever
number’s location lea si, numbers ; Load address of numbers array
;-------------------------------------
MOV A, R0 ; Retrieve original first number from R0 next_number: ; Subroutine: 1-second delay using Timer 0
MOV 31H, A ; Store it into the second number’s mov al, [si] ; Load current number into AL ; 15 x 65ms ≈ 1 second
location cmp al, 0 ;-------------------------------------
jl is_negative ; Jump if less than 0 DELAY_1S:
SJMP $ ; Endless loop to stop execution MOV R2, #15 ; Outer loop for 15 overflows

END

Write 8051 assembly language program to checks Write a program to generate a square wave on Port Pin Operating modes of 8259
whether the ten numbers stored from external RAM 2.0 using Timer 0 in Mode 1 in 8051.
memory address, 2000H are odd or even. The ORG 0000H 1. Fully Nested Mode: Default mode where IR0 has the
program should store accordingly 00H/FFH from highest priority and IR7 the lowest. Higher priority
internal location 30H onwards START: interrupts can interrupt lower ones.
MOV TMOD, #01H ; Timer 0 Mode 1 (16-bit timer) 2. Special Fully Nested Mode: Used in cascaded systems.
ORG 0000H SETB P2.0 ; Initialize P2.0 HIGH (optional) Allows higher-priority interrupts from slave PICs even
during servicing.
MOV DPTR, #2000H ; DPTR points to external RAM MAIN_LOOP: 3. Rotating Priority Mode: After servicing an interrupt, its
starting address 2000H ; Load timer for delay (~50 ms, adjust for your clock) priority becomes the lowest. Priority rotates among all
MOV R0, #30H ; R0 points to internal RAM address MOV TH0, #0x4B ; High byte for timer start value lines in a round-robin manner.
30H MOV TL0, #0x00 ; Low byte 4. Special Mask Mode: Allows selective masking of
MOV R1, #10 ; Loop counter for 10 numbers SETB TR0 ; Start Timer 0 interrupts without changing priority logic. Useful for
temporary disabling.
CHECK_LOOP: WAIT_TIMER: 5. Poll Mode: The CPU polls the PIC to check for pending
; Read byte from external RAM [DPTR] JNB TF0, WAIT_TIMER ; Wait until timer overflow interrupts instead of relying on INTR signals. Useful when
MOVX A, @DPTR (TF0=1) no hardware interrupt pin is used.
CLR TR0 ; Stop timer 6. Buffered Mode: Used in systems needing data buffers
; Check LSB (bit 0) for odd/even CLR TF0 ; Clear overflow flag or in multiprocessor setups. Supports bidirectional data
JB ACC.0, ODD ; If bit 0 = 1, number is odd CPL P2.0 ; Toggle P2.0 (square wave output) flow via buffer enable pins.
SJMP MAIN_LOOP ; Repeat forever 7. Cascade Mode: Connects multiple 8259s (1 master +
up to 8 slaves) to handle up to 64 interrupts using
END cascade lines.
memory organization of 8051: Addressing mode of 8086: 1. Hardware Interrupts - 8086
These are triggered by external hardware devices to get
The 8051 microcontroller's memory is organized The 8086 microprocessor supports several addressing the attention of the CPU.
into program memory (ROM), data memory (RAM), modes to access data from memory and registers. Types of Hardware Interrupts in 8086:
and special function registers (SFRs). It also has a 16- The major addressing modes of 8086 are: (a) Non-Maskable Interrupt (NMI)
bit address bus, allowing it to access up to 64KB of 1. Immediate Addressing Mode Type: Edge-triggered, non-maskable (cannot be
memory. - Operand is a constant or immediate value. disabled).
1. Program Memory (ROM): - The value is given directly in the instruction. Pin: NMI pin.
Purpose: Used to store the program instructions that - Example: MOV AX, 1234H Vector Address: Type 2 → 0008H
the microcontroller executes. 2. Register Addressing Mode Use: Critical events like power failure, memory parity
Size: Typically 4KB of internal ROM is available in the - The operand is located in a register. error, etc.
8051. - Example: MOV AX, BX (b) Maskable Interrupt (INTR)
External Memory: External ROM can be added to 3. Direct Addressing Mode Type: Level-triggered, maskable (can be
increase the program memory capacity if needed. - The operand is in memory at a known 16-bit offset enabled/disabled).
2. Data Memory (RAM): address. Pin: INTR pin.
Purpose: Used for temporarily storing data and - The address is directly specified in the instruction. Requires an Interrupt Acknowledge (INTA) cycle to fetch
intermediate results during program execution. - Example: MOV AX, [1234H] the interrupt type number.
Internal RAM: The 8051 has 128 bytes of internal 4. Register Indirect Addressing Mode Use: For general-purpose interrupt requests from
RAM, which can be further divided into different areas, - Memory address is specified in a register (BX, SI, or DI). peripherals like keyboard, mouse, etc.
including a register bank, a bit-addressable area, and a - Example: MOV AX, [BX]
general-purpose area. 5. Indexed Addressing Mode
- Uses an index register (SI or DI) to hold the offset.
- Useful for accessing array elements.
- Example: MOV AX, [SI]
DELAY_LOOP: ; Positive number (including 0) Divide 1234H by 12H (i.e., 4660 / 18)
MOV TL0, #0x00 ; Load low byte inc pos_count
MOV TH0, #0x4B ; Load high byte (65536 - 50000 jmp continue_loop .model small
= 15536 = 3CB0H → TH=4B, TL=00) .data
SETB TR0 ; Start Timer 0 is_negative: dividend dw 1234H ; 16-bit dividend = 4660
inc neg_count divisor db 12H ; 8-bit divisor = 18
WAIT_OV: quotient db ? ; Result of division (quotient)
JNB TF0, WAIT_OV ; Wait for overflow continue_loop: remainder db ? ; Remainder after division
CLR TR0 ; Stop timer inc si ; Move to next number
CLR TF0 ; Clear overflow flag loop next_number ; Repeat for 10 numbers .code
DJNZ R2, DELAY_LOOP ; Repeat 15 times .startup
RET ; Program done - pos_count and neg_count contain the mov ax, dividend ; Load 16-bit dividend into AX
results mov bl, divisor ; Load divisor into BL
END ; You can place a breakpoint here to check values
div bl ; AX ÷ BL → Quotient in AL, Remainder in
.exit AH
end
mov quotient, al ; Store quotient
mov remainder, ah ; Store remainder

.exit
End

Arithmetic Instructions of 8051: Memory Segmentation ; Even number case

MOV @R0, #00H ; Store 00H at internal RAM [R0]
1. ADD (Addition): Adds a value to the accumulator. In 8086, memory segmentation divides the 1 MB SJMP STORE_DONE
Example: ADD A, #25H → Adds 25H to accumulator A. memory space into 64KB segments, each with a unique
2. ADDC (Add with Carry): Adds a value and the carry starting address. The CPU uses these segment registers ODD:
flag to the accumulator. to efficiently access data and instructions within these MOV @R0, #0FFH ; Store FFH at internal RAM [R0]
Example: ADDC A, #10H segments.
3. SUBB (Subtract with Borrow): Subtracts a value and Elaboration: STORE_DONE:
the carry (borrow) from accumulator. 1. Segment Registers: INC DPTR ; Move to next external RAM address
Example: SUBB A, #05H The 8086 has four segment registers: INC R0 ; Move to next internal RAM address
4. INC (Increment): Increments the value of a register CS (Code Segment): Holds the starting address of the DJNZ R1, CHECK_LOOP ; Loop 10 times
or memory location by 1. code segment, where instructions are stored.
Example: INC A DS (Data Segment): Holds the starting address of the HERE:
5. DEC (Decrement): Decrements the value by 1. data segment, where data is stored. SJMP HERE ; Infinite loop to end program
Example: DEC R1. SS (Stack Segment): Holds the starting address of the
6. MUL AB (Multiply A and B) Multiplies A and B. stack segment, used for function calls and local END
Example: If A = 04H and B = 03H → A = 0CH, B = 00H. variables.
7. DIV AB (Divide A by B) ES (Extra Segment): Holds the starting address of the
Divides A by B. Quotient stored in A, remainder in B. extra segment, which can be used for additional data or
Example: If A = 09H and B = 02H → A = 04H, B = 01H. string manipulation.

2. Software Interrupts 6. Base Plus Index Addressing Mode External RAM: External RAM can be added to increase
These are initiated by the execution of interrupt - Combines base register (BX or BP) and index register (SI the data memory capacity.
instructions within the program. or DI). 3. Special Function Registers (SFRs):
(a) INT n (Interrupt Instruction) - Address = [Base + Index]. Purpose: SFRs are dedicated registers used for
Syntax: INT n where n is the type number (0 to 255). - Example: MOV AX, [BX + SI] controlling various functions of the microcontroller, such
Example: INT 21H → Used for DOS function calls. as I/O ports, timers, and interrupts.
CPU jumps to the address stored in the Interrupt 7. Base Plus Index with Displacement Location: SFRs are typically located within the internal
Vector Table (IVT) at n × 4. - Adds a displacement (constant offset) to the sum of RAM space.
(b) INTO (Interrupt on Overflow) base and index. 4. Addressing Modes:
Triggers interrupt type 4 only if overflow flag (OF) is - Address = [Base + Index + Displacement]. Direct Addressing: Directly address memory locations by
set. - Example: MOV AX, [BX + SI + 10] specifying their address.
Used for signed arithmetic operations. Indirect Addressing: Address memory locations using the
(c) INT 3 8. Relative Addressing Mode (Used in branching contents of a register, often DPTR.
- Breakpoint interrupt (type 3). instructions) 5. External Memory:
- Mainly used by debuggers to temporarily halt - Address is calculated by adding a signed displacement Program Memory: External ROM can be accessed via the
execution. to the current instruction pointer (IP). program memory space.
- Hardcoded and has a dedicated opcode (CC). - Example: JMP SHORT LABEL Data Memory: External RAM can be accessed via the
data memory space.