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“Handling Multiple Devices” BCS302

HANDLING MULTIPLE DEVICES:

Handling multiple devices in computer organization involves managing the
communication and interaction between a computer system and various peripheral
devices. These peripheral devices could include input devices like keyboards and mice,
output devices like monitors and printers, and storage devices like hard drives and USB
flash drives.
At the hardware level, handling multiple devices typically involves the use of
interfaces such as USB, HDMI, Ethernet, SATA, PCIe, and others. Each interface has its
own protocol and standards for communication between the computer and the connected
devices. These interfaces are often integrated into the motherboard of a computer system,
providing the necessary physical connectors and controllers to interact with peripheral
devices.
Device drivers play a crucial role in handling multiple devices in a computer
system. Device drivers are software programs that enable the operating system to
communicate with and control specific hardware devices. They provide a standardized
interface for the operating system to access the functionality of peripheral devices,
abstracting away the details of the hardware and providing a consistent interface for
application software to interact with.
The operating system plays a central role in managing multiple devices in a
computer system. It is responsible for identifying and enumerating connected devices,
loading the appropriate device drivers, and providing system-wide services for device
management and communication. Modern operating systems often include sophisticated
device management frameworks that support plug-and-play functionality, allowing
devices to be hot-swapped and automatically configured without requiring manual
intervention.
In addition to device drivers and the operating system, application software may
also need to implement device-specific logic for interacting with peripheral devices. For
example, a graphics rendering application may need to interface with a graphics card to
offload rendering tasks, while a file transfer utility may need to interact with a storage
device to read and write data.
Overall, handling multiple devices in computer organization requires coordination
between hardware interfaces, device drivers, the operating system, and application
software to ensure seamless communication and interaction between the computer

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“Handling Multiple Devices” BCS302
system and its peripherals. This involves standardized protocols, robust device
management frameworks, and well-designed software interfaces to support a wide range
of devices and use cases.
Let us now consider the situation where a number of devices capable of initiating
interrupts are connected to the processor. Because these devices are operationally
independent, there is no definite order in which they will generate interrupts. For
example, device X may request an interrupt while an interrupt caused by device Y is
being serviced, or several devices may request interrupts at exactly the same time. This
gives rise to a number of questions:
1. How can the processor recognize the device requesting an interrupt?
2. Given that different devices are likely to require different interrupt -service routines,
how can the processor obtain the starting address of the appropriate routine in each
case? 3. Should a device be allowed to interrupt the processor while another interrupt is
being serviced?
4. How should two or more simultaneous interrupt requests be handled?
If two devices have activated the line at the same time, it must be possible to
break the tie and elect one of the two requests for service. When the interrupt-service
routine for the selected device has been completed, the second request can be serviced.

Polling

• Information needed to determine whether a device is requesting an interrupt is available

in its status-register.
• When a device raises an interrupt-request, it sets IRQ bit to 1 in its status-register
(Figure 4.3).
• KIRQ and DIRQ are the interrupt-request bits for keyboard & display.
• Simplest way to identify interrupting device is to have ISR poll all I/O devices
connected to bus.
• The first device encountered with its IRQ bit set is the device that should be serviced.

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“Handling Multiple Devices” BCS302
After servicing this device, next requests may be serviced.
• Main advantage: Simple & easy to implement. Main disadvantage: More time spent
polling IRQ bits of all devices (that may not be requesting any service).

Vectored interrupts:

To reduce the time involved in the polling process, a device requesting an interrupt may
identify itself directly to the processor. Then, the processor can immediately start
executing the corresponding interrupt-service routine. The term vectored interrupts refers
to all interrupt - handling schemes based on this approach.
A device requesting an interrupt can identify itself by sending a special code to
the processor over the bus. This enables the processor to identify individual devices even
if they share a single interrupt-request line. The code supplied by the device may
represent the starting address of the interrupt-service routine for that device. The code
length is typically in the range of 4 to 8 bits. The remainder of the address is supplied by
the processor based on the area in its memory where the addresses for interrupt-service
routines are located.
This arrangement implies that the interrupt-service routine for a given device must
always start at the same location. The programmer can gain some flexibility by storing in
this location an instruction that causes a branch to the appropriate routine. In many
computers, this is done automatically by the interrupt-handling mechanism. The location
pointed to by the interrupting device is used to store the starting address of the interrupt-
service routine. The processor reads this address, called the interrupt vector, and loads it
into the PC. The interrupt vector may also include a new value for the processor status
register.
In most computers, I/O devices send the interrupt-vector code over the data bus,
using the bus control signals to ensure that devices do not interfere with each other. When
a device sends an interrupt request, the processor may not be ready to receive the
interrupt-vector code immediately. For example, it must first complete the execution of
the current instruction, which may require the use of the bus. There may be further delays
if interrupts happen to be disabled at the time the request is raised. The interrupting
device must wait to put data on the bus only when the processor is ready to receive it.

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“Handling Multiple Devices” BCS302
When the processor is ready to receive the interrupt-vector code, it activates the interrupt-
acknowledge line, INTA. The I/O device responds by sending its interrupt- vector code
and turning off the INTR signal.

Interrupt nesting:
I/O devices should be organized in a priority structure. An interrupt request from a
highpriority device should be accepted while the processor is servicing another request
from a lowerpriority device. A multiple-level priority organization means that during
execution of an interruptservice routine, interrupt requests will be accepted from some
devices but not from others, depending upon the device's priority. To implement this
scheme, priority level can be assigned to the processor that can be changed by the
program.
The processor's priority is usually encoded in a few bits of the processor status
word. It can be changed by program instructions that write into the PS. These are
privileged instructions, which can be executed only while the processor is running in the
supervisor mode. The processor is in the supervisor mode only when executing operating
system routines. It switches to the user mode before beginning to execute application
programs. Thus, a user program cannot accidentally, or intentionally, change the priority
of the processor and disrupt the system's operation. An attempt to execute a privileged
instruction while in the user mode leads to a special type of interrupt called a privilege
exception.
A multiple-priority scheme can be implemented easily by using separate interrupt-
request and interrupt-acknowledge lines for each device, as shown in Figure 5.7. Each of
the interruptrequest lines is assigned a different priority level. Interrupt requests received
over these lines are sent to a priority arbitration circuit in the processor. A request is
accepted only if it has a higher priority level than that currently assigned to the processor

Figure 5.7 Implementation of interrupt priority using individual interrupt-request and

acknowledge lines.

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“Handling Multiple Devices” BCS302
Simultaneous request: When simultaneous interrupt requests are arrived from two
or more I/O devices to the processor, the processor must have some means of deciding
which request to service first.
Using a priority scheme such as that of Figure 5.7, the solution is straightforward.
The processor simply accepts the request having the highest priority. If several devices
share one interrupt-request line, as in Figure 5.6, some other mechanism is needed.
Polling the status registers of the I/O devices is the simplest such mechanism. In this
case, priority is determined by the order in which the devices are polled. When vectored
interrupts are used, we must ensure that only one device is selected to send its interrupt
vector code. A widely used scheme is to connect the devices to form a daisy chain, as
shown in Figure 5.8. The interruptrequest line INTR is common to all devices. The
interrupt-acknowledge line, INTA, is connected in a daisy-chain fashion, such that the
INTA signal propagates serially through the devices. When several devices raise an
interrupt request and the INTR line is activated, the processor responds by setting the
INTA line to 1. This signal is received by device 1. Device 1 passes the signal on to
device 2 only if it does not require any service. If device 1 has a pending request for
interrupt, it blocks the INTA signal and proceeds to put its identifying code on the data
lines. Therefore, in the daisy-chain arrangement, the device that is electrically closest to
the processor has the highest priority. The second device along the chain has second
highest priority, and so on.

HARDWARE METHOD – DAISY CHAINING

The daisy-chaining method involves connecting all the devices that can request an
interrupt in a serial manner. This configuration is governed by the priority of the devices.
The device with the highest priority is placed first followed by the second highest priority
device and so on. The given figure depicts this arrangement.
WORKING:
There is an interrupt request line which is common to all the devices and goes into
the CPU.
• When no interrupts are pending, the line is in HIGH state. But if any of the
devices raises an interrupt, it places the interrupt request line in the LOW state.
• The CPU acknowledges this interrupt request from the line and then enables the
interrupt acknowledge line in response to the request.
• This signal is received at the PI(Priority in) input of device 1.

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“Handling Multiple Devices” BCS302
• If the device has not requested the interrupt, it passes this signal to the next device
through its PO(priority out) output. (PI = 1 & PO = 1)
• However, if the device had requested the interrupt, (PI =1 & PO = 0) o The
device consumes the acknowledge signal and block its further use by placing 0 at
its PO(priority out) output.
o The device then proceeds to place its interrupt vector address(VAD) into
the data bus of CPU.
o The device puts its interrupt request signal in HIGH state to indicate its
interrupt has been taken care of.
• If a device gets 0 at its PI input, it generates 0 at the PO output to tell other
devices that acknowledge signal has been blocked. (PI = 0 & PO = 0) Hence, the
device having PI = 1 and PO = 0 is the highest priority device that is requesting
an interrupt. Therefore, by daisy chain arrangement we have ensured that the
highest priority interrupt gets serviced first and have established a hierarchy. The
farther a device is from the first device, the lower its priority. Priority

interrupts:
Advantages:
1. Priority interrupts allow for the efficient handling of high-priority tasks that
require immediate attention. This is especially important in real-time systems
where certain tasks must be completed within strict time constraints.
2. They are more efficient than software polling as the processor does not waste time
constantly checking for events that have not occurred.
3. Priority interrupts are also more deterministic, as the response time to an event
can be accurately predicted based on its priority level.
Disadvantages:
1. One potential disadvantage of priority interrupts is the possibility of lower
priority tasks being starved of resources if high-priority tasks are continuously
interrupting the processor.
2. If not implemented properly, priority interrupts can lead to priority inversion,
where a low-priority task holds a resource required by a higher-priority task,
causing a delay in the high-priority task’s execution.

Software polling:

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“Handling Multiple Devices” BCS302
Advantages:
1. Software polling is relatively simple to implement and does not require
specialized hardware.
2. It can be used to detect events that occur at irregular intervals, as the processor
can check for events whenever it is not performing other tasks.
Disadvantages:
1. Software polling is less efficient than priority interrupts as the processor must
constantly check for events even if none have occurred.
2. In real-time systems, software polling may not be suitable as it is difficult to
guarantee the response time to an event, especially if the processor is busy with
other tasks.

Daisy chaining:
Advantages:
1. Daisy chaining allows multiple devices to share a single interrupt line, reducing
the number of interrupt lines required.
2. It is relatively simple to implement and does not require specialized hardware.

Disadvantages:
1. Daisy chaining can result in increased response time as each device must wait for
the previous device to complete its interrupt handling before it can start its own.
2. It can also be difficult to implement and troubleshoot, especially if there are
multiple devices on the same interrupt line.

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