ULN2002A, ULN2003A, ULN2003AI

ULQ2003A, ULN2004A, ULQ2004A

SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

ULN200x, ULQ200x High-Voltage, High-Current Darlington Transistor Arrays

1 Features The ULx2004A devices have a 10.5kΩ series base
resistor to allow operation directly from CMOS
• 500mA-rated collector current (single output)
devices that use supply voltages of 6V to 15V. The
• High-voltage outputs: 50V
required input current of the ULx2004A device is
• Output clamp diodes
below that of the ULx2003A devices, and the required
• Inputs compatible with various types of logic
voltage is less than that required by the ULN2002A
• Relay-driver applications
device.
2 Applications Package Information
• Relay Drivers PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
• Stepper and DC Brushed Motor Drivers ULN200xAD SOIC (16) 9.90mm × 3.91mm
• Lamp Drivers ULN200xAN PDIP (16) 19.30mm × 6.35mm
• Display Drivers (LED and Gas Discharge) ULN200xANS SOP (16) 10.30mm × 5.30mm
• Line Drivers
ULN200xAPW TSSOP (16) 5.00mm × 4.40mm
• Logic Buffers
ULN2003ADYY SOT (16) 4.20mm × 2.00mm
3 Description
(1) For all available packages, see the orderable addendum at
The ULx200xA devices are high-voltage, high-current the end of the data sheet.
Darlington transistor arrays. Each consists of seven (2) The package size (length × width) is a nominal value and
includes pins, where applicable.
NPN Darlington pairs that feature high-voltage outputs
with common-cathode clamp diodes for switching 9
COM
inductive loads. 1 16
1B 1C
The collector-current rating of a single Darlington pair
is 500mA. The Darlington pairs can be paralleled 2 15
2B 2C
for higher current capability. Applications include
relay drivers, hammer drivers, lamp drivers, display
3 14
drivers (LED and gas discharge), line drivers, and 3B 3C
logic buffers. For 100V (otherwise interchangeable)
versions of the ULx2003A devices, see the SLRS023 4 13
4B 4C
data sheet for the SN75468 and SN75469 devices.
The ULN2002A device is designed specifically for use 5 12
5B 5C
with 14V to 25V PMOS devices. Each input of this
device has a Zener diode and resistor in series to 6 11
control the input current to a safe limit. The ULx2003A 6B 6C
devices have a 2.7kΩ series base resistor for each
7 10
Darlington pair for operation directly with TTL or 5V 7B 7C
CMOS devices.
Simplified Block Diagram

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

Table of Contents
1 Features............................................................................1 6 Parameter Measurement Information.......................... 12
2 Applications..................................................................... 1 7 Detailed Description......................................................14
3 Description.......................................................................1 7.1 Overview................................................................... 14
4 Pin Configuration and Functions...................................3 7.2 Functional Block Diagrams....................................... 14
5 Specifications.................................................................. 4 7.3 Feature Description...................................................15
5.1 Absolute Maximum Ratings........................................ 4 7.4 Device Functional Modes..........................................15
5.2 ESD Ratings............................................................... 4 8 Application and Implementation.................................. 16
5.3 Recommended Operating Conditions.........................4 8.1 Application Information............................................. 16
5.4 Thermal Information....................................................4 8.2 Typical Application.................................................... 16
5.5 Electrical Characteristics: ULN2002A......................... 5 8.3 System Examples..................................................... 19
5.6 Electrical Characteristics: ULN2003A and 8.4 Power Supply Recommendations.............................19
ULN2004A.....................................................................5 8.5 Layout....................................................................... 19
5.7 Electrical Characteristics: ULN2003AI........................ 6 9 Device and Documentation Support............................21
5.8 Electrical Characteristics: ULN2003AI........................ 6 9.1 Documentation Support............................................ 21
5.9 Electrical Characteristics: ULQ2003A and 9.2 Related Links............................................................ 21
ULQ2004A.....................................................................8 9.3 Receiving Notification of Documentation Updates....21
5.10 Switching Characteristics: ULN2002A, 9.4 Support Resources................................................... 21
ULN2003A, ULN2004A................................................. 8 9.5 Trademarks............................................................... 21
5.11 Switching Characteristics: ULN2003AI..................... 8 9.6 Electrostatic Discharge Caution................................21
5.12 Switching Characteristics: ULN2003AI..................... 9 9.7 Glossary....................................................................21
5.13 Switching Characteristics: ULQ2003A, 10 Revision History.......................................................... 21
ULQ2004A.....................................................................9 11 Mechanical, Packaging, and Orderable
5.14 Typical Characteristics............................................ 10 Information.................................................................... 22

2 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

4 Pin Configuration and Functions

1B 1 16 1C
2B 2 15 2C
3B 3 14 3C
4B 4 13 4C
5B 5 12 5C
6B 6 11 6C
7B 7 10 7C
E 8 9 COM

Figure 4-1. D, N, NS, and PW Package 16-Pin SOIC, PDIP, SO, and TSSOP Top View

Table 4-1. Pin Functions

PIN
I/O(1) DESCRIPTION
NAME NO.
1B 1
2B 2
3B 3
4B 4 I Channel 1 through 7 Darlington base input
5B 5
6B 6
7B 7
1C 16
2C 15
3C 14
4C 13 O Channel 1 through 7 Darlington collector output
5C 12
6C 11
7C 10
COM 9 — Common cathode node for flyback diodes (required for inductive loads)
E 8 — Common emitter shared by all channels (typically tied to ground)

(1) I = Input, O = Output

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 3

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

5 Specifications
5.1 Absolute Maximum Ratings
at 25°C free-air temperature (unless otherwise noted)(1)
MIN MAX UNIT
VCC Collector-emitter voltage 50 V
Clamp diode reverse voltage(2) 50 V
VI Input voltage(2) 30 V
Peak collector current, See Figure 5-4 and Figure 5-5 500 mA
IOK Output clamp current 500 mA
Total emitter-terminal current –2.5 A
ULN200xA –40 70
ULN200xAI –40 105
TA Operating free-air temperature range ULQ200xA –40 85 °C
ULQ200xAT –40 105
ULN2004ADR –40 105
TJ Operating virtual junction temperature 150 °C
Lead temperature for 1.6 mm (1/16 inch) from case for 10 seconds 260 °C
Tstg Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.

5.2 ESD Ratings

VALUE UNIT

Electrostatic Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000

V(ESD) V
discharge Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Collector-emitter voltage (non-V devices) 0 50 V
TJ Junction temperature –40 125 °C

5.4 Thermal Information

ULx200x
D N NS PW DYY
THERMAL METRIC(1) UNIT
(SOIC) (PDIP) (SO) (TSSOP) (SOT)
16 PINS 16 PINS 16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 88.6 66.7 95.0 114.1 123.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 50.1 54.2 53.3 50.3 59.6 °C/W
RθJB Junction-to-board thermal resistance 49.8 46.7 57.2 59.3 56.5 °C/W
ψJT Junction-to-top characterization parameter 12.4 33.7 19.6 9.7 3.2 °C/W

4 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

5.4 Thermal Information (continued)

ULx200x
D N NS PW DYY
THERMAL METRIC(1) UNIT
(SOIC) (PDIP) (SO) (TSSOP) (SOT)
16 PINS 16 PINS 16 PINS 16 PINS 16 PINS
ψJB Junction-to-board characterization parameter 49.3 46.4 56.8 58.9 56.0 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.

5.5 Electrical Characteristics: ULN2002A

TA = 25°C
ULN2002A
PARAMETER TEST FIGURE TEST CONDITIONS UNIT
MIN TYP MAX
VI(on) ON-state input voltage Figure 6-6 VCE = 2 V, IC = 300 mA 13 V
High-level output voltage after
VOH Figure 6-10 VS = 50 V, IO = 300 mA VS – 20 mV
switching
II = 250 μA, IC = 100 mA 0.9 1.1
Collector-emitter saturation
VCE(sat) Figure 6-4 II = 350 μA, IC = 200 mA 1 1.3 V
voltage
II = 500 μA, IC = 350 mA 1.2 1.6
VF Clamp forward voltage Figure 6-7 IF = 350 mA 1.7 2 V
Figure 6-1 VCE = 50 V, II = 0 50
ICEX Collector cutoff current VCE = 50 V, II = 0 100 μA
Figure 6-2
TA = 70°C VI = 6 V 500
II(off) OFF-state input current Figure 6-2 VCE = 50 V, IC = 500 μA 50 65 μA
II Input current Figure 6-3 VI = 17 V 0.82 1.25 mA
VR = 50 V TA = 70°C 100
IR Clamp reverse current Figure 6-6 μA
VR = 50 V 50
Ci Input capacitance VI = 0, f = 1 MHz 25 pF

5.6 Electrical Characteristics: ULN2003A and ULN2004A

TA = 25°C
TEST ULN2003A ULN2004A
PARAMETER TEST CONDITIONS UNIT
FIGURE MIN TYP MAX MIN TYP MAX
IC = 125 mA 5
IC = 200 mA 2.4 6

ON-state input IC = 250 mA 2.7

VI(on) Figure 6-6 VCE = 2 V V
voltage IC = 275 mA 7
IC = 300 mA 3
IC = 350 mA 8
High-level output
VOH voltage after Figure 6-10 VS = 50 V, IO = 300 mA VS – 20 VS – 20 mV
switching
II = 250 μA, IC = 100 mA 0.9 1.1 0.9 1.1
Collector-emitter
VCE(sat) Figure 6-5 II = 350 μA, IC = 200 mA 1 1.3 1 1.3 V
saturation voltage
II = 500 μA, IC = 350 mA 1.2 1.6 1.2 1.6
Figure 6-1 VCE = 50 V, II = 0 50 50
Collector cutoff
ICEX VCE = 50 V, II = 0 100 100 μA
current Figure 6-2
TA = 70°C VI = 1 V 500

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

5.6 Electrical Characteristics: ULN2003A and ULN2004A (continued)

TA = 25°C
TEST ULN2003A ULN2004A
PARAMETER TEST CONDITIONS UNIT
FIGURE MIN TYP MAX MIN TYP MAX
Clamp forward IF = 350 mA
VF Figure 6-8 1.7 2 1.7 2 V
voltage
Off-state input VCE = 50 V,
II(off) Figure 6-3 IC = 500 μA 50 65 50 65 μA
current TA = 70°C,
VI = 3.85 V 0.93 1.35
II Input current Figure 6-4 VI = 5 V 0.35 0.5 mA
VI = 12 V 1 1.45

Clamp reverse VR = 50 V 50 50
IR Figure 6-7 μA
current VR = 50 V TA = 70°C 100 100
Ci Input capacitance VI = 0, f = 1 MHz 15 25 15 25 pF

5.7 Electrical Characteristics: ULN2003AI

TA = 25°C
TEST ULN2003AI
PARAMETER TEST FIGURE UNIT
CONDITIONS MIN TYP MAX
IC = 200 mA 2.4
VI(on) ON-state input voltage Figure 6-6 VCE = 2 V IC = 250 mA 2.7 V
IC = 300 mA 3
High-level output voltage after
VOH Figure 6-10 VS = 50 V, IO = 300 mA VS – 50 mV
switching
II = 250 μA, IC = 100 mA 0.9 1.1
VCE(sat) Collector-emitter saturation voltage Figure 6-5 II = 350 μA, IC = 200 mA 1 1.3 V
II = 500 μA, IC = 350 mA 1.2 1.6
ICEX Collector cutoff current Figure 6-1 VCE = 50 V, II = 0 50 μA
VF Clamp forward voltage Figure 6-8 IF = 350 mA 1.7 2 V
II(off) OFF-state input current Figure 6-3 VCE = 50 V, IC = 500 μA 50 65 μA
II Input current Figure 6-4 VI = 3.85 V 0.93 1.35 mA
IR Clamp reverse current Figure 6-7 VR = 50 V 50 μA
Ci Input capacitance VI = 0, f = 1 MHz 15 25 pF

5.8 Electrical Characteristics: ULN2003AI

TA = –40°C to 105°C
ULN2003AI
PARAMETER TEST FIGURE TEST CONDITIONS UNIT
MIN TYP MAX
IC = 200 mA 2.7
VI(on) ON-state input voltage Figure 6-6 VCE = 2 V IC = 250 mA 2.9 V
IC = 300 mA 3
High-level output voltage after
VOH Figure 6-10 VS = 50 V, IO = 300 mA VS – 50 mV
switching
II = 250 μA, IC = 100 mA 0.9 1.2
VCE(sat) Collector-emitter saturation voltage Figure 6-5 II = 350 μA, IC = 200 mA 1 1.4 V
II = 500 μA, IC = 350 mA 1.2 1.7
ICEX Collector cutoff current Figure 6-1 VCE = 50 V, II = 0 100 μA

6 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

5.8 Electrical Characteristics: ULN2003AI (continued)

TA = –40°C to 105°C
ULN2003AI
PARAMETER TEST FIGURE TEST CONDITIONS UNIT
MIN TYP MAX
VF Clamp forward voltage Figure 6-8 IF = 350 mA 1.7 2.2 V
II(off) OFF-state input current Figure 6-3 VCE = 50 V, IC = 500 μA 30 65 μA
II Input current Figure 6-4 VI = 3.85 V 0.93 1.35 mA
IR Clamp reverse current Figure 6-7 VR = 50 V 100 μA
Ci Input capacitance VI = 0, f = 1 MHz 15 25 pF

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

5.9 Electrical Characteristics: ULQ2003A and ULQ2004A

over recommended operating conditions (unless otherwise noted)
TEST ULQ2003A ULQ2004A
PARAMETER TEST CONDITIONS UNIT
FIGURE MIN TYP MAX MIN TYP MAX
IC = 125 mA 5
IC = 200 mA 2.7 6

ON-state input IC = 250 mA 2.9

VI(on) Figure 6-6 VCE = 2 V V
voltage IC = 275 mA 7
IC = 300 mA 3
IC = 350 mA 8
High-level output
VOH voltage after Figure 6-10 VS = 50 V, IO = 300 mA VS – 50 VS – 50 mV
switching
II = 250 μA, IC = 100 mA 0.9 1.2 0.9 1.1
Collector-emitter
VCE(sat) Figure 6-5 II = 350 μA, IC = 200 mA 1 1.4 1 1.3 V
saturation voltage
II = 500 μA, IC = 350 mA 1.2 1.7 1.2 1.6
Figure 6-1 VCE = 50 V, II = 0 100 50
Collector cutoff
ICEX VCE = 50 V, II = 0 100 μA
current Figure 6-2 T = 70°C
A VI = 1 V 500
Clamp forward
VF Figure 6-8 IF = 350 mA 1.7 2.3 1.7 2 V
voltage
OFF-state input VCE = 50 V,
II(off) Figure 6-3 IC = 500 μA 65 50 65 μA
current TA = 70°C,
VI = 3.85 V 0.93 1.35
II Input current Figure 6-4 VI = 5 V 0.35 0.5 mA
VI = 12 V 1 1.45

Clamp reverse VR = 50 V TA = 25°C 100 50

IR Figure 6-7 μA
current VR = 50 V 100 100
Ci Input capacitance VI = 0, f = 1 MHz 15 25 15 25 pF

5.10 Switching Characteristics: ULN2002A, ULN2003A, ULN2004A

TA = 25°C
ULN2002A, ULN2003A,
PARAMETER TEST CONDITIONS ULN2004A UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 6-9 0.25 1 μs
tPHL Propagation delay time, high- to low-level output See Figure 6-9 0.25 1 μs

5.11 Switching Characteristics: ULN2003AI

TA = 25°C
ULN2003AI
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 6-9 0.25 1 μs
tPHL Propagation delay time, high- to low-level output See Figure 6-9 0.25 1 μs

8 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

5.12 Switching Characteristics: ULN2003AI

TA = –40°C to 105°C
ULN2003AI
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 6-9 1 10 μs
tPHL Propagation delay time, high- to low-level output See Figure 6-9 1 10 μs

5.13 Switching Characteristics: ULQ2003A, ULQ2004A

over recommended operating conditions (unless otherwise noted)
ULQ2003A, ULQ2004A
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 6-9 1 10 μs
tPHL Propagation delay time, high- to low-level output See Figure 6-9 1 10 μs

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

5.14 Typical Characteristics

VCE(sat)- Collector-Emitter Saturation Voltage - V

VCE(sat)- Collector-Emitter Saturation Voltage - V

10 1.8
II= 250μA II= 250μA
9
II= 350μA 1.6 II= 350μA
8 II= 500μA
II= 500μA
7 1.4
6 1.2
5
4 1
3 0.8
2
0.6
1
0 0.4
0 50 100 150 200 250 300 350 400 450 500 0 100 200 300 400 500 600 700 800
IC- Collector Current - mA IC(tot)- Total Collector Current - mA
Figure 5-1. Collector-Emitter Saturation Voltage vs Collector Figure 5-2. Collector-Emitter Saturation Voltage vs Total
Current (One Darlington) Collector Current (Two Darlingtons in Parallel)

440 0.6

IC- Maximum Collector Current - A

N=1
N=2
400
IC- Collector Current - mA

0.5 N=3
N=4
360 N=5
0.4 N=6
320 N=7

280 0.3
240
0.2
200
VS=8V 0.1
160 VS=10V
120 0
90 100 110 120 130 140 150 0 10 20 30 40 50 60 70 80 90 100
II- Input Current - μA Duty Cycle - %
Figure 5-3. Collector Current vs Input Current Figure 5-4. D Package Maximum Collector Current vs Duty
Cycle (TA = 70°C)

0.6 1400
IC- Maximum Collector Current - A

N=1
N=2 −40°C
0.5 N=3
N=4
1200 25°C
105°C
Input Current - μA

N=5

0.4 N=6
N=7 1000

0.3 800

0.2 600
0.1
400
0
200
0 20 40 60 80 100
Duty Cycle - %
2 2.4 2.8 3.2 3.6 4 4.4 4.8 5.2
Input Voltage - V
Figure 5-5. DYY Package Maximum Collector Current vs Duty
Figure 5-6. Maximum and Typical Input Current vs Input Voltage
Cycle (TA = 70°C)

10 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

5.14 Typical Characteristics (continued)

2 520
−40°C
Maximum VCE(sat)Voltage - V

1.8 500
25°C
480

Output Current - mA
1.6 105°C
460
1.4
440
1.2
420
1
400
0.8 380 −40°C
25°C
0.6 360 105°C
0.4 340
0 100 200 300 400 500 250 300 350 400 450 500 550 600 650
Output Current - mA Input Current - µA
Figure 5-7. Maximum and Typical Saturated VCE vs Output Figure 5-8. Minimum Output Current vs Input Current
Current

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 11

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

6 Parameter Measurement Information

Open VCE Open VCE

ICEX ICEX
Open VI

Figure 6-1. ICEX Test Circuit Figure 6-2. ICEX Test Circuit
Open VCE Open

II(off) IC II(on)
VI Open

Figure 6-4. II Test Circuit

Figure 6-3. II(off) Test Circuit

Open Open

IC
hFE =
II

II VCE IC VI(on) VCE IC

II is fixed for measuring VCE(sat), variable for measuring hFE. Figure 6-6. VI(on) Test Circuit
Figure 6-5. hFE, VCE(sat) Test Circuit

VR

IR VF IF
Open

Open
Figure 6-8. VF Test Circuit

Figure 6-7. IR Test Circuit

12 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

200 W

Figure 6-9. Propagation Delay-Time Waveforms

≤5 ns ≤10 ns
VIH
Input 90% 90% (see Note C)
1.5 V 1.5 V
10% 10%
40 µs 0V

VOH
Output

VOL
VOLTAGE WAVEFORMS

The pulse generator has the following characteristics: PRR =

12.5 kHz, ZO = 50 Ω.
CL includes probe and jig capacitance.
For testing the ULN2003A device, ULN2003AI device, and
ULQ2003A devices, VIH = 3 V; for the ULN2002A device, VIH =
13 V; for the ULN2004A and the ULQ2004A devices, VIH = 8 V.

Figure 6-10. Latch-Up Test Circuit and Voltage

Waveforms

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 13

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

7 Detailed Description
7.1 Overview
This standard device has proven ubiquity and versatility across a wide range of applications. This is due to
integration of 7 Darlington transistors of the device that are capable of sinking up to 500 mA and wide GPIO
range capability.
The ULN2003A device comprises seven high-voltage, high-current NPN Darlington transistor pairs. All units
feature a common emitter and open collector outputs. To maximize their effectiveness, these units contain
suppression diodes for inductive loads. The ULN2003A device has a series base resistor to each Darlington pair,
thus allowing operation directly with TTL or CMOS operating at supply voltages of 5 V or 3.3 V. The ULN2003A
device offers solutions to a great many interface needs, including solenoids, relays, lamps, small motors, and
LEDs. Applications requiring sink currents beyond the capability of a single output may be accommodated by
paralleling the outputs.
This device can operate over a wide temperature range (–40°C to 105°C).
7.2 Functional Block Diagrams
All resistor values shown are nominal. The collector-emitter diode is a parasitic structure and should not be
used to conduct current. If the collectors go below GND, an external Schottky diode should be added to clamp
negative undershoots.

COM

Output C
7V 10.5 NŸ
Input B

7.2 NŸ 3 NŸ E

Figure 7-1. ULN2002A Block Diagram

COM COM

RB Output C RB Output C
2.7 NŸ 10.5 NŸ
Input B Input B

7.2 NŸ 3 NŸ E 7.2 NŸ 3 NŸ E

Figure 7-2. ULN2003A, ULQ2003A and ULN2003AI Figure 7-3. ULN2004A and LQ2004A Block Diagram
Block Diagram

14 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

7.3 Feature Description

Each channel of the ULN2003A device consists of Darlington connected NPN transistors. This connection
creates the effect of a single transistor with a very high-current gain (β2). This can be as high as 10,000 A/A
at certain currents. The very high β allows for high-output current drive with a very low input current, essentially
equating to operation with low GPIO voltages.
The GPIO voltage is converted to base current through the 2.7-kΩ resistor connected between the input and
base of the predriver Darlington NPN. The 7.2-kΩ and 3-kΩ resistors connected between the base and emitter of
each respective NPN act as pulldowns and suppress the amount of leakage that may occur from the input.
The diodes connected between the output and COM pin is used to suppress the kick-back voltage from an
inductive load that is excited when the NPN drivers are turned off (stop sinking) and the stored energy in the
coils causes a reverse current to flow into the coil supply through the kick-back diode.
In normal operation the diodes on base and collector pins to emitter will be reversed biased. If these diodes are
forward biased, internal parasitic NPN transistors will draw (a nearly equal) current from other (nearby) device
pins.
7.4 Device Functional Modes
7.4.1 Inductive Load Drive
When the COM pin is tied to the coil supply voltage, ULN2003A device is able to drive inductive loads and
suppress the kick-back voltage through the internal free-wheeling diodes.
7.4.2 Resistive Load Drive
When driving a resistive load, a pullup resistor is needed in order for ULN2003A device to sink current and for
there to be a logic high level. The COM pin can be left floating for these applications.

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 15

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

8 Application and Implementation

Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.

8.1 Application Information

Typically, the ULN2003A device drives a high-voltage or high-current (or both) peripheral from an MCU or logic
device that cannot tolerate these conditions. This design is a common application of ULN2003A device, driving
inductive loads. This includes motors, solenoids and relays. Figure 8-1 shows a model for each load type.
8.2 Typical Application

3.3-V Logic ULN2003A

IN1 OUT1

IN2 OUT2

3.3-V Logic IN3 OUT3

IN4 OUT4

VSUP

3.3-V Logic IN5 OUT5

IN6 OUT6

IN7 OUT7

GND COM VSUP

Figure 8-1. ULN2003A Device as Inductive Load Driver

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 8-1 as the input parameters.
Table 8-1. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
GPIO voltage 3.3 V or 5 V
Coil supply voltage 12 V to 48 V
Number of channels 7
Output current (RCOIL) 20 mA to 300 mA per channel
Duty cycle 100%

16 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

8.2.2 Detailed Design Procedure

When using ULN2003A device in a coil driving application, determine the following:
• Input voltage range
• Temperature range
• Output and drive current
• Power dissipation
8.2.2.1 Drive Current
The coil voltage (VSUP), coil resistance (RCOIL), and low-level output voltage (VCE(SAT) or VOL) determine the coil
current.

ICOIL = (VSUP – VCE(SAT)) / RCOIL (1)

8.2.2.2 Low-Level Output Voltage
The low-level output voltage (VOL) is the same as VCE(SAT) and can be determined by, Figure 5-1, Figure 5-2, or
Figure 5-7.
8.2.2.3 Power Dissipation and Temperature
The number of coils driven is dependent on the coil current and on-chip power dissipation. The number of coils
driven can be determined by Figure 5-4 or Figure 5-5.
For a more accurate determination of number of coils possible, use the below equation to calculate ULN2003A
device on-chip power dissipation PD:

N
PD = å VOLi ´ ILi
i=1 (2)

where
• N is the number of channels active together
• VOLi is the OUTi pin voltage for the load current ILi. This is the same as VCE(SAT)
To ensure reliability of ULN2003A device and the system, the on-chip power dissipation must be lower that or
equal to the maximum allowable power dissipation (PD(MAX)) dictated by below equation Equation 3.

TJ MAX TA
PD MAX
TJA (3)

where
• TJ(max) is the target maximum junction temperature
• TA is the operating ambient temperature
• RθJA is the package junction to ambient thermal resistance
Limit the die junction temperature of the ULN2003A device to less than 125°C. The IC junction temperature is
directly proportional to the on-chip power dissipation.

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 17

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

8.2.3 Application Curves

The characterization data shown in Figure 8-2 and Figure 8-3 were generated using the ULN2003A device
driving an OMRON G5NB relay and under the following conditions: VIN = 5 V, VSUP= 12 V, and RCOIL= 2.8 kΩ.

13 14
12
11 12
10
9 10
Output voltage - V

Output voltage - V
8
8
7
6
6
5
4 4
3
2 2
1
0 0
-0.004 0 0.004 0.008 0.012 0.016 -0.004 0 0.004 0.008 0.012 0.016
Time (s) D001
Time (s) D001

Figure 8-2. Output Response With Activation of Figure 8-3. Output Response With De-activation of
Coil (Turnon) Coil (Turnoff)

18 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

8.3 System Examples

VSS ULN2002A V
VCC ULQ2003A V

1 16
1 16
2 15
2 15
3 14
3 14
4 13
4 13
5 12
5 12
6 11
6 11
7 10
P-MOS 7 10
Output 8 9
8 9

Lam
TTL Test
Output
Figure 8-4. P-MOS to Load
Figure 8-5. TTL to Load
ULN2004A
VDD ULQ2004A V VCC ULQ2003A V

1 16 1 16

2 15 2 15

3 14 3 14
RP
4 13 4 13

5 12 5 12

6 11 6 11

7 10 7 10

8 9 8 9
CMOS
Output
TTL
Output
Figure 8-6. Buffer for Higher Current Loads Figure 8-7. Use of Pullup Resistors to Increase
Drive Current

8.4 Power Supply Recommendations

This device does not need a power supply. However, the COM pin is typically tied to the system power supply.
When this is the case, it is very important to ensure that the output voltage does not heavily exceed the COM
pin voltage. This discrepancy heavily forward biases the fly-back diodes and causes a large current to flow into
COM, potentially damaging the on-chip metal or over-heating the device.
8.5 Layout
8.5.1 Layout Guidelines
Thin traces can be used on the input due to the low-current logic that is typically used to drive ULN2003A device.
Take care to separate the input channels as much as possible, as to eliminate crosstalk. TI recommends thick
traces for the output to drive whatever high currents that may be needed. Wire thickness can be determined by
the current density of the trace material and desired drive current.

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 19

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

Because all of the channels currents return to a common emitter, it is best to size that trace width to be very
wide. Some applications require up to 2.5 A.
8.5.2 Layout Example

1B 1 16 1C
2B 2 15 2C
3B 3 14 3C
4B 4 13 4C
5B 5 12 5C
6B 6 11 6C
7B 7 10 7C
E 8 9 VCOM
GND

Figure 8-8. Package Layout

20 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027T – DECEMBER 1976 – REVISED MARCH 2025

9 Device and Documentation Support

9.1 Documentation Support
9.1.1 Related Documentation
For related documentation, see the following:
SN7546x Darlington Transistor Arrays, SLRS023
9.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 9-1. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
ULN2002A Click here Click here Click here Click here Click here
ULN2003A Click here Click here Click here Click here Click here
ULN2003AI Click here Click here Click here Click here Click here
ULN2004A Click here Click here Click here Click here Click here
ULQ2003A Click here Click here Click here Click here Click here
ULQ2004A Click here Click here Click here Click here Click here

9.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.
9.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
9.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
9.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

9.7 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

10 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision S (June 2024) to Revision T (March 2025) Page
• Added ULN2004ADR MIN = –40°C and MAX = 105°C for TA in the Absolute Maximum Ratings table............ 4

Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027T – DECEMBER 1976 – REVISED MARCH 2025 www.ti.com

• Changed ICEX test condition From: VI = 6V To: VI = 1V in the Electrical Characteristics: ULN2003A and
ULN2004A table................................................................................................................................................. 5

Changes from Revision R (February 2024) to Revision S (June 2024) Page

• Added DYY package throughout the data sheet................................................................................................ 1

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.

22 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A

 PACKAGE OPTION ADDENDUM

www.ti.com 23-May-2025

PACKAGING INFORMATION

Orderable part number Status Material type Package | Pins Package qty | Carrier RoHS Lead finish/ MSL rating/ Op temp (°C) Part marking
(1) (2) (3) Ball material Peak reflow (6)
(4) (5)

ULN2002AN Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -20 to 70 ULN2002AN
ULN2002AN.A Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 70 ULN2002AN
ULN2002ANE4 Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -20 to 70 ULN2002AN
ULN2003ADR Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ADR.A Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ADYYR Active Production SOT-23-THIN 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 UN2003A
(DYY) | 16
ULN2003ADYYR.A Active Production SOT-23-THIN 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 UN2003A
(DYY) | 16
ULN2003AIDR Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIDR.A Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIN Obsolete Production PDIP (N) | 16 - - Call TI Call TI -40 to 105 ULN2003AIN
ULN2003AINSR Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AINSR.A Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIPW Obsolete Production TSSOP (PW) | 16 - - Call TI Call TI -40 to 105 UN2003AI
ULN2003AIPWR Active Production TSSOP (PW) | 16 2000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 105 (U2003AI, UN2003AI
)
ULN2003AIPWR.A Active Production TSSOP (PW) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 105 (U2003AI, UN2003AI
)
ULN2003AN Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU | SN N/A for Pkg Type -40 to 70 ULN2003AN
ULN2003AN.A Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 70 ULN2003AN
ULN2003ANS Obsolete Production SOP (NS) | 16 - - Call TI Call TI -40 to 70 ULN2003A
ULN2003ANSR Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ANSR.A Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ANSRE4 Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ANSRG4 Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003APW Obsolete Production TSSOP (PW) | 16 - - Call TI Call TI -40 to 70 UN2003A
ULN2003APWR Active Production TSSOP (PW) | 16 2000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 70 UN2003A
ULN2003APWR.A Active Production TSSOP (PW) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 UN2003A
ULN2003APWRG4 Obsolete Production TSSOP (PW) | 16 - - Call TI Call TI -40 to 70 UN2003A

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 23-May-2025

Orderable part number Status Material type Package | Pins Package qty | Carrier RoHS Lead finish/ MSL rating/ Op temp (°C) Part marking
(1) (2) (3) Ball material Peak reflow (6)
(4) (5)

ULN2004AD Obsolete Production SOIC (D) | 16 - - Call TI Call TI -20 to 70 ULN2004A

ULN2004ADR Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004ADR.A Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2004A
ULN2004ADRG4 Obsolete Production SOIC (D) | 16 - - Call TI Call TI -20 to 70 ULN2004A
ULN2004ADYYR Active Production SOT-23-THIN 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 UN2004A
(DYY) | 16
ULN2004ADYYR.A Active Production SOT-23-THIN 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 UN2004A
(DYY) | 16
ULN2004AN Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -20 to 70 ULN2004AN
ULN2004AN.A Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 70 ULN2004AN
ULN2004ANE4 Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -20 to 70 ULN2004AN
ULN2004ANSR Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004ANSR.A Active Production SOP (NS) | 16 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2004A
ULQ2003AD Obsolete Production SOIC (D) | 16 - - Call TI Call TI -40 to 85 ULQ2003A
ULQ2003ADG4 Obsolete Production SOIC (D) | 16 - - Call TI Call TI - ULQ2003A
ULQ2003ADR.A Obsolete Production SOIC (D) | 16 - - Call TI Call TI -40 to 85 ULQ2003A
ULQ2003AN Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 ULQ2003A
ULQ2003AN.A Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 ULQ2003A
ULQ2004AD Active Production SOIC (D) | 16 40 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004AD.A Active Production SOIC (D) | 16 40 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004ADG4 Active Production SOIC (D) | 16 40 | TUBE Yes NIPDAU Level-1-260C-UNLIM - ULQ2004A
ULQ2004ADG4.A Active Production SOIC (D) | 16 40 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004ADR Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004ADR.A Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004ADRG4 Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM - ULQ2004A
ULQ2004ADRG4.A Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004AN Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 ULQ2004AN
ULQ2004AN.A Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 ULQ2004AN

(1)
Status: For more details on status, see our product life cycle.

Addendum-Page 2
 PACKAGE OPTION ADDENDUM

www.ti.com 23-May-2025

(2)
Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance,
reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional
waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.

(3)
RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition.

(4)
Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum
column width.

(5)
MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown.
Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board.

(6)
Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part.

Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two
combined represent the entire part marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and
makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative
and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers
and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF ULQ2003A, ULQ2004A :

• Automotive : ULQ2003A-Q1, ULQ2004A-Q1

NOTE: Qualified Version Definitions:

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

Addendum-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-May-2025

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
ULN2003ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADYYR SOT-23- DYY 16 3000 330.0 12.4 4.8 3.6 1.6 8.0 12.0 Q3
THIN
ULN2003AIDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003AIDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003AIDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003AINSR SOP NS 16 2000 330.0 16.4 8.45 10.55 2.5 12.0 16.2 Q1
ULN2003AINSR SOP NS 16 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.0 Q1
ULN2003AIPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2003AIPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2003ANSR SOP NS 16 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.0 Q1
ULN2003ANSR SOP NS 16 2000 330.0 16.4 8.45 10.55 2.5 12.0 16.2 Q1
ULN2003APWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-May-2025

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1

Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
ULN2003APWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2004ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2004ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2004ADYYR SOT-23- DYY 16 3000 330.0 12.4 4.8 3.6 1.6 8.0 12.0 Q3
THIN
ULN2004ANSR SOP NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-May-2025

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
ULN2003ADR SOIC D 16 2500 353.0 353.0 32.0
ULN2003ADR SOIC D 16 2500 356.0 356.0 35.0
ULN2003ADR SOIC D 16 2500 340.5 336.1 32.0
ULN2003ADR SOIC D 16 2500 353.0 353.0 32.0
ULN2003ADYYR SOT-23-THIN DYY 16 3000 336.6 336.6 31.8
ULN2003AIDR SOIC D 16 2500 353.0 353.0 32.0
ULN2003AIDR SOIC D 16 2500 340.5 336.1 32.0
ULN2003AIDR SOIC D 16 2500 353.0 353.0 32.0
ULN2003AINSR SOP NS 16 2000 353.0 353.0 32.0
ULN2003AINSR SOP NS 16 2000 356.0 356.0 35.0
ULN2003AIPWR TSSOP PW 16 2000 353.0 353.0 32.0
ULN2003AIPWR TSSOP PW 16 2000 356.0 356.0 35.0
ULN2003ANSR SOP NS 16 2000 356.0 356.0 35.0
ULN2003ANSR SOP NS 16 2000 353.0 353.0 32.0
ULN2003APWR TSSOP PW 16 2000 356.0 356.0 35.0
ULN2003APWR TSSOP PW 16 2000 353.0 353.0 32.0
ULN2004ADR SOIC D 16 2500 353.0 353.0 32.0
ULN2004ADR SOIC D 16 2500 340.5 336.1 32.0

Pack Materials-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-May-2025

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
ULN2004ADYYR SOT-23-THIN DYY 16 3000 336.6 336.6 31.8
ULN2004ANSR SOP NS 16 2000 356.0 356.0 35.0

Pack Materials-Page 4
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-May-2025

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
ULN2002AN N PDIP 16 25 506 13.97 11230 4.32
ULN2002AN.A N PDIP 16 25 506 13.97 11230 4.32
ULN2002ANE4 N PDIP 16 25 506 13.97 11230 4.32
ULN2003AN N PDIP 16 25 506 13.97 11230 4.32
ULN2003AN N PDIP 16 25 506.1 9 600 5.4
ULN2003AN N PDIP 16 25 506 13.97 11230 4.32
ULN2003AN.A N PDIP 16 25 506 13.97 11230 4.32
ULN2003AN.A N PDIP 16 25 506.1 9 600 5.4
ULN2003AN.A N PDIP 16 25 506 13.97 11230 4.32
ULN2004AN N PDIP 16 25 506 13.97 11230 4.32
ULN2004AN N PDIP 16 25 506 13.97 11230 4.32
ULN2004AN.A N PDIP 16 25 506 13.97 11230 4.32
ULN2004AN.A N PDIP 16 25 506 13.97 11230 4.32
ULN2004ANE4 N PDIP 16 25 506 13.97 11230 4.32
ULN2004ANE4 N PDIP 16 25 506 13.97 11230 4.32
ULQ2003AN N PDIP 16 25 506 13.97 11230 4.32
ULQ2003AN N PDIP 16 25 506 13.97 11230 4.32
ULQ2003AN.A N PDIP 16 25 506 13.97 11230 4.32
ULQ2003AN.A N PDIP 16 25 506 13.97 11230 4.32
ULQ2004AD D SOIC 16 40 507 8 3940 4.32
ULQ2004AD.A D SOIC 16 40 507 8 3940 4.32
ULQ2004ADG4 D SOIC 16 40 507 8 3940 4.32
ULQ2004ADG4.A D SOIC 16 40 507 8 3940 4.32
ULQ2004AN N PDIP 16 25 506 13.97 11230 4.32
ULQ2004AN.A N PDIP 16 25 506 13.97 11230 4.32

Pack Materials-Page 5
 PACKAGE OUTLINE
DYY0016A SOT-23-THIN - 1.1 mm max height
PLASTIC SMALL OUTLINE

3.36 C
3.16 SEATING PLANE

A PIN 1 INDEX
AREA 0.1 C
14X 0.5

1 16

4.3 2X
4.1
NOTE 3 3.5

4X 0° - 15°
8
9

2.1 16X 0.3

0.11
1.1 MAX
B 1.9
0.1 C A B

4X 4° - 15°

0.2 TYP
0.08

SEE DETAIL A

0.25
GAUGE PLANE

0°- 8°
0.63 0.1
0.33 0.0
DETAIL A
TYP

4224642/D 07/2024

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed
0.15 per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.50 per side.
5. Reference JEDEC Registration MO-345, Variation AA

www.ti.com
 EXAMPLE BOARD LAYOUT
DYY0016A SOT-23-THIN - 1.1 mm max height
PLASTIC SMALL OUTLINE

16X (1.05)
SYMM

1 16

16X (0.3)

SYMM

14X (0.5)

8 9

(R0.05) TYP
(3)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 20X

SOLDER MASK METAL UNDER

OPENING SOLDER MASK SOLDER MASK
METAL OPENING

NON- SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)

SOLDER MASK DETAILS

4224642/D 07/2024

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
DYY0016A SOT-23-THIN - 1.1 mm max height
PLASTIC SMALL OUTLINE

16X (1.05)
SYMM

1 16

16X (0.3)

SYMM

14X (0.5)

8 9

(R0.05) TYP
(3)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE: 20X

4224642/D 07/2024

NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
 PACKAGE OUTLINE
NS0016A SCALE 1.500
SOP - 2.00 mm max height
SOP

8.2 SEATING PLANE

TYP
7.4
A PIN 1 ID 0.1 C
AREA
14X 1.27
16
1

10.4 2X
10.0 8.89
NOTE 3

8
9
0.51
16X
5.4 0.35
B 0.25 C A B 2.00 MAX
5.2
NOTE 4

0.15 TYP

SEE DETAIL A
0.25 0.3
GAGE PLANE 0.1

0 - 10
1.05
0.55 DETAIL A
TYPICAL
(1.25)

4220735/A 12/2021

NOTES:

1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.

www.ti.com
 EXAMPLE BOARD LAYOUT
NS0016A SOP - 2.00 mm max height
SOP

16X (1.85) SEE

SYMM DETAILS

1 16

16X (0.6)

SYMM

14X (1.27)

8 9

(R0.05) TYP

(7)

LAND PATTERN EXAMPLE

SCALE:7X

SOLDER MASK SOLDER MASK METAL

METAL OPENING OPENING

0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4220735/A 12/2021

NOTES: (continued)

5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
NS0016A SOP - 2.00 mm max height
SOP

16X (1.85) SYMM

1 16

16X (0.6)

SYMM

14X (1.27)

8 9

(R0.05) TYP (7)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:7X

4220735/A 12/2021

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.

www.ti.com
 PACKAGE OUTLINE
PW0016A SCALE 2.500
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

SEATING
PLANE
6.6 C
TYP
A 6.2
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1

2X
5.1 4.55
4.9
NOTE 3

8
9
0.30
4.5 16X 1.2 MAX
B 0.19
4.3
NOTE 4 0.1 C A B

(0.15) TYP
SEE DETAIL A

0.25
GAGE PLANE
0.15
0.05

0.75
0.50
0 -8
DETAIL A
A 20

TYPICAL

4220204/A 02/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.

www.ti.com
 EXAMPLE BOARD LAYOUT
PW0016A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

16X (1.5) SYMM

(R0.05) TYP
1
16X (0.45) 16

SYMM

14X (0.65)

8 9

(5.8)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 10X

SOLDER MASK METAL UNDER SOLDER MASK

METAL SOLDER MASK OPENING
OPENING

EXPOSED METAL EXPOSED METAL

0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND

NON-SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED) SOLDER MASK DETAILS
15.000

4220204/A 02/2017
NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
PW0016A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

16X (1.5) SYMM

(R0.05) TYP
1
16X (0.45) 16

SYMM

14X (0.65)

8 9

(5.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE: 10X

4220204/A 02/2017
NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
 IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2025, Texas Instruments Incorporated