INSTRUCTION SET OF 8051 MICROCONTROLLER OF

GROUP 6
Introduction to 8051 Microcontroller Instruction Set
Writing a Program for any Microcontroller consists of giving commands to the Microcontroller in
a particular order in which they must be executed in order to perform a specific task. The
commands to the Microcontroller are known as a Microcontroller’s Instruction Set. Just as our
sentences are made of words, a Microcontroller’s (for that matter, any computer) program is made
of Instructions. Instructions written in a program tell the Microcontroller which operation to carry
out.

Instructions are the binary commands used by a processor for the execution of any operation.
The instruction set of the 8051 microcontroller is a collection of commands that the
microcontroller can execute.

As the 8051 family of Microcontrollers are 8-bit processors, the 8051 Microcontroller Instruction
Set is optimized for 8-bit control applications. As a typical 8-bit processor, the 8051
Microcontroller instructions have 8-bit Opcodes. As a result, the 8051 Microcontroller instruction
set can have up to 28 = 256 Instructions.

A Brief Look at 8051 Microcontroller Instructions and Groups

The following table shows the 8051 Instruction Groups and Instructions in each group. There are
49 Instruction Mnemonics in the 8051 Microcontroller Instruction Set and these 49 Mnemonics
are divided into five groups.
DATA ARITHMETIC LOGICA BOOLEA PROGRAM
TRANSFER L N BRANCHING

MOV ADD ANL CLR LJMP

MOVC ADDC ORL SETB AJMP

MOVX SUBB XRL MOV SJMP

PUSH INC CLR JC JZ

POP DEC CPL JNC JNZ

XCH MUL RL JB CJNE

XCHD DIV RLC JNB DJNZ

DA A RR JBC NOP

RRC ANL LCALL

SWAP ORL ACALL

CPL RET

RETI
Addressing Modes
What is an Addressing Mode?
An Addressing Mode is a way to locate a target Data, which is also called as Operand. The 8051
Family of Microcontrollers allows five types of Addressing Modes for addressing the Operands.
They are:
 Immediate Addressing: The operand is a constant value specified directly in the
instruction. The value does not change during execution.
For example,
MOV A, #25H; Move immediate value 25H into Accumulator
MOV R1, #0F2H; Load R1 with immediate value 0F2H

 Register Addressing: The operand is stored in a register and is directly accessed.

Faster execution since data is in CPU registers.
For example,
MOV A, R0; Copy value of R0 into Accumulator
ADD A, R2; Add value of R2 to A

 Direct Addressing: The operand is stored at a specific memory address.

The instruction directly specifies the memory location.
For example,
MOV A, 30H; Move value from RAM location 30H into A
MOV 40H, A; Store value of A into RAM location 40H

 Register – Indirect Addressing: A register (R0 or R1) holds the memory address of the
operand. Allows dynamic memory access.
For example,
MOV A, @R0; Move value from memory location pointed by R0 into A
MOV @R1, A; Store value of A at memory location pointed by R1

 Indexed Addressing: Used for accessing code memory (ROM)

The effective address is computed as (DPTR or PC) + A
For example,
MOVC A, @A+DPTR; Load A with a byte from ROM at (DPTR + A)

The structure of the 8051 Microcontroller Instruction.

An 8051 Instruction consists of an Opcode (short of Operation – Code) followed by Operand(s) of
size Zero Byte, One Byte or Two Bytes.
The Op-Code part of the instruction contains the Mnemonic, which specifies the type of operation
to be performed. All Mnemonics or the Opcode part of the instruction are of One Byte size.
Coming to the Operand part of the instruction, it defines the data being processed by the
instructions.

The operand can be any of the following:

 No Operand; These instructions don't require any operand as the operation is
implicitly applied to registers like the Accumulator (A) or specific bits (e.g., CLR
A)
 Data value; The operand is an immediate value (fixed value)
  I/O Port; Operands are Input/Output ports or Special Function Registers (SFRs)
 Memory Location; The operand is a direct address in memory (e.g. RAM address).
 CPU register; the operand is a register (e.g., Accumulator, R0-R7)

There can multiple operands and the format of instruction is as follows:

MNEMONIC DESTINATION OPERAND, SOURCE OPERAND

A simple instruction consists of just the opcode. Other instructions may include one or more
operands. Instruction can be one-byte instruction, which contains only opcode, or two-byte
instructions, where the second byte is the operand or three-byte instructions, where the operand
makes up the second and third byte.

Types of Instructions in 8051 Microcontroller Instruction Set

Based on the operation they perform, all the instructions in the 8051 Microcontroller Instruction
Set are divided into five groups. They are:
 Data Transfer Instructions
 Arithmetic Instructions
 Logical Instructions
 Boolean or Bit Manipulation Instructions
 Program Branching Instructions

1) Data Transfer Instructions

The Data Transfer Instructions are associated with transfer of data between registers or external
program memory or external data memory. The Mnemonics associated with Data Transfer are
given below.
i MOV
ii MOVC
iii MOVX
iv PUSH
v POP
vi XCH
vii XCHD

i MOV
Syntax: MOV destination, source

MOV copies the value of source into destination. The value of source is not affected. Both
destination and source must be in Internal RAM.

ii MOVC
Function: Move Code Byte to Accumulator
Syntax: MOVC A, @A+register

MOVC moves a byte from Code Memory into the Accumulator. The Code Memory address from
which the byte will be moved is calculated by summing the value of the Accumulator with either
DPTR or the Program Counter (PC). In the case of the Program Counter, PC is first incremented
by 1 before being summed with the Accumulator.
 iii MOVX
Function: Move Data To/From External Memory (XRAM)
Syntax: MOVX operand1, operand2

MOVX moves a byte to or from External Memory into or from the Accumulator.

If operand1 is @DPTR, the Accumulator is moved to the 16-bit External Memory address
indicated by DPTR. This instruction uses both P0 (port 0) and P2 (port 2) to output the 16-bit
address and data. If operand2 is DPTR then the byte is moved from External Memory into the
Accumulator.

If operand1 is @R0 or @R1, the Accumulator is moved to the 8-bit External Memory address
indicated by the specified Register. This instruction uses only P0 (port 0) to output the 8-bit
address and data. P2 (port 2) is not affected. If operand2 is @R0 or @R1 then the byte is moved
from External Memory into the Accumulator.

iv XCH
Function: Exchange Bytes
Syntax: XCH A, register

Exchanges the value of the Accumulator with the value contained in register.
Ex: XCH A, R1

v XCHD
Exchanges the lower nibble (4 bits) of the accumulator with the lower nibble of the specified
location.
Example: XCHD A, @Ri swaps the lower nibbles of A and the memory location pointed by Ri.

vi PUSH
Function: Push Value onto Stack
Syntax: PUSH

PUSH "pushes" the value of the specified IRAM ADDRESS (the on-chip memory inside the 8051
microcontroller that is used for data storage and stack operations) onto the stack. PUSH first
increments the value of the Stack Pointer by 1, then takes the value stored in IRAM ADDR and
stores it in Internal RAM at the location pointed to by the incremented Stack Pointer.

vii POP
Function: Pop Value from Stack
Syntax: POP

POP "pops" the last value placed on the stack into the iram addre specified. In other words, POP
will load iram addr with the value of the Internal RAM address pointed to by the current Stack
Pointer. The stack pointer is then decremented by 1.
2) Arithmetic Instructions
Using Arithmetic Instructions, you can perform addition, subtraction, multiplication and division.
The arithmetic instructions also include increment by one, decrement by one and a special
instruction called Decimal Adjust Accumulator. The Mnemonics associated with the Arithmetic
Instructions of the 8051 Microcontroller Instruction Set are:
 ADD
 ADDC
 SUBB
 INC
 DEC
 MUL
 DIV
 DA A

i ADD, ADDC
Function: Add Accumulator, Add Accumulator with Carry

ADD and ADDC both add the value operand to the value of the Accumulator, leaving the
resulting value in the Accumulator. The value operand is not affected. ADD and ADDC function
identically except that ADDC adds the value of operand as well as the value of the Carry flag
whereas ADD does not add the Carry flag to the result.

ii SUBB
Function: Subtract from Accumulator With Borrow

SUBB subtract the value of operand from the value of the Accumulator, leaving the resulting
value in the Accumulator. The value operand is not affected.
The Carry Bit (C) is set if a borrow was required for bit 7, otherwise it is cleared. In other words,
if the unsigned value being subtracted is greater than the Accumulator the Carry Flag is set.

iii MUL
Function: Multiply Accumulator by B
Syntax: MUL AB

Multiples the unsigned value of the Accumulator by the unsigned value of the "B" register. The
least significant byte of the result is placed in the Accumulator and the most-significant-byte is
placed in the "B" register.

The Carry Flag (C) is always cleared.

iv DIV
Function: Divide Accumulator by B
Syntax: DIV AB
Divides the unsigned value of the Accumulator by the unsigned value of the "B" register. The
resulting quotient is placed in the Accumulator and the remainder is placed in the "B" register.
The Carry flag (C) is always cleared.

v INC
Function: Increment Register
Syntax: INC register

INC increments the value of register by 1. If the initial value of register is 255 (0xFF Hex),
incrementing the value will cause it to reset to 0. Note: The Carry Flag is NOT set when the value
"rolls over" from 255 to 0.

In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is incremented. If
the initial value of DPTR is 65535 (0xFFFF Hex), incrementing the value will cause it to reset to
0. Again, the Carry Flag is NOT set when the value of DPTR "rolls over" from 65535 to 0.

vi DEC
Function: Decrement Register
Syntax: DEC register

DEC decrements the value of register by 1. If the initial value of register is 0, decrementing the
value will cause it to reset to 255 (0xFF Hex). Note: The Carry Flag is NOT set when the value
"rolls over" from 0 to 255.

vii DAA(decimal adjust accumulator: Adjusts the value of the accumulator for Binary-Coded
Decimal (BCD) representation after an addition operation.

3) Logical Instructions
The next group of instructions are the Logical Instructions, which perform logical operations like
AND, OR, XOR, NOT, Rotate, Clear and Swap. Logical Instruction are performed on Bytes of
data on a bit-by-bit basis. Mnemonics associated with Logical Instructions are as follows:
• ANL
• ORL
• XRL
• CLR
• CPL
• RL
• RLC
• RR
• RRC
• SWAP

i. ORL
Function: Bitwise OR
Syntax: ORL operand1, operand2

ORL does a bitwise "OR" operation between operand1 and operand2, leaving the resulting value
in operand1. The value of operand2 is not affected. A logical "OR" compares the bits of each
operand and sets the corresponding bit in the resulting byte if the bit was set in either of the
original operands, otherwise the resulting bit is cleared.

ii. ANL
Function: Bitwise AND
Syntax: ANL operand1, operand2

ANL does a bitwise "AND" operation between operand1 and operand2, leaving the resulting
value in operand1. The value of operand2 is not affected. A logical "AND" compares the bits of
each operand and sets the corresponding bit in the resulting byte only if the bit was set in both of
the original operands, otherwise the resulting bit is cleared.

iii. XRL
Function: Bitwise Exclusive OR
Syntax: XRL operand1, operand2
XRL does a bitwise "EXCLUSIVE OR" operation between operand1 and operand2, leaving the
resulting value in operand1. The value of operand2 is not affected. A logical "EXCLUSIVE OR"
compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit
was set in either (but not both) of the original operands, otherwise the bit is cleared.

iv CPL
Function: Complement Register
Syntax: CPL operand
CPL complements operand, leaving the result in operand. If operand is a single bit, then the state
of the bit will be reversed. If operand is the Accumulator, then all the bits in the Accumulator
will be reversed. This can be thought of as "Accumulator Logical Exclusive OR 255" or as "255-
Accumulator." If the operand refers to a bit of an output Port, the value that will be
complemented is based on the last value written to that bit, not the last value read from it.

v CLR
Function: Clear Register
Syntax: CLR register

CLR clears (sets to 0) all the bit(s) of the indicated register. If the register is a bit (including the
carry bit), only the specified bit is affected. Clearing the Accumulator sets the Accumulator's
value to 0.

vi RL
Function: Rotate Accumulator Left
Syntax: RL A
Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the Accumulator is
loaded into bit 0.

vii RR
Function: Rotate Accumulator Right
Syntax: RR A
Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the Accumulator is
loaded into bit 7.

viii RLC
Function: Rotate Accumulator Left Through Carry
Syntax: RLC A
Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the Accumulator is
loaded into the Carry Flag, and the original Carry Flag is loaded into bit 0 of the Accumulator.
This function can be used to quickly multiply a byte by 2.

ix RRC
Function: Rotate Accumulator Right Through Carry
Syntax: RRC A

Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the Accumulator is
loaded into the Carry Flag, and the original Carry Flag is loaded into bit 7. This function can be
used to quickly divide a byte by 2.

x SWAP
Function: Swap Accumulator Nibbles
Syntax: SWAP A

SWAP swaps bits 0-3 of the Accumulator with bits 4-7 of the Accumulator. This instruction is
identical to executing "RR A" or "RL A" four times.

4) Boolean or Bit Manipulation Instructions

Boolean or Bit Manipulation Instructions deal with bit variables.
The Mnemonics corresponding to the Boolean or Bit Manipulation instructions are:
CLR, SETB, MOV, JC, JNC, JB, JNB, JBC, ANL, ORL, CPL

i. JB
Function: Jump if Bit Set
Syntax: JB bit addr, reladdr

JB branches to the address indicated by reladdr if the bit indicated by bit addr is set. If the bit is
not set program execution continues with the instruction following the JB instruction.

ii. JNB
Function: Jump if Bit Not Set
Syntax: JNB bit addr, reladdr

JNB will branch to the address indicated by reladdress if the indicated bit is not set. If the bit is
set program execution continues with the instruction following the JNB instruction.

iii. JBC
Function: Jump if Bit Set and Clear Bit
Syntax: JB bit addr, reladdr

JBC will branch to the address indicated by reladdr if the bit indicated by bit addr is set. Before
branching to reladdr the instruction will clear the indicated bit. If the bit is not set program
execution continues with the instruction following the JBC instruction.
5) Program Branching Instructions
These instructions control the flow of program logic. The mnemonics of the Program Branching
Instructions are as follows.
LJMP, AJMP, SJMP, JZ, JNZ, CJNE, DJNZ, NOP, LCALL, ACALL, RET, RETI, JMP

i. JMP
Function: Jump to Data Pointer + Accumulator
Syntax: JMP @A+DPTR

JMP jumps unconditionally to the address represented by the sum of the value of DPTR and the
value of the Accumulator.

ii. JC
Function: Jump if Carry Set
Syntax: JC reladdr

JC will branch to the address indicated by reladdr if the Carry Bit is set. If the Carry Bit is not set
program execution continues with the instruction following the JC instruction.

iii. JNC
Function: Jump if Carry Not Set
Syntax: JNC reladdr

JNC branches to the address indicated by reladdr if the carry bit is not set. If the carry bit is set
program execution continues with the instruction following the JNB instruction.

iv. Operation: DJNZ

Function: Decrement and Jump if Not Zero
Syntax: DJNZ register, reladdr

DJNZ decrements the value of register by 1. If the initial value of register is 0, decrementing the
value will cause it to reset to 255 (0xFF Hex). If the new value of register is not 0 the program
will branch to the address indicated by relative addr. If the new value of register is 0 program
flow continues with the instruction following the DJNZ instruction.

v. CJNE
Function: Compare and Jump If Not Equal
Syntax: CJNE operand1, operand2, reladdr

CJNE compares the value of operand1 and operand2 and branches to the indicated relative
address if operand1 and operand2 are not equal. If the two operands are equal program flow
continues with the instruction following the CJNE instruction.

vi. JZ
Function: Jump if Accumulator Zero
Syntax: JNZ reladdr
JZ branches to the address indicated by reladdr if the Accumulator contains the value 0. If the
value of the Accumulator is non-zero program execution continues with the instruction following
the JNZ instruction.

vii. JNZ
Function: Jump if Accumulator Not Zero
Syntax: JNZ reladdr

JNZ will branch to the address indicated by reladdr if the Accumulator contains any value except
0. If the value of the Accumulator is zero program execution continues with the instruction
following the JNZ instruction.

viii. SJMP
Function: Short Jump
Syntax: SJMP reladdr

SJMP jumps unconditionally to the address specified reladdr. Reladdr must be within -128 or
+127 bytes of the instruction that follows the SJMP instruction.

ix. LJMP
Function: Long Jump
Syntax: LJMP code addr

LJMP jumps unconditionally to the specified code addr.

x. AJMP
Function: Absolute Jump Within 2K Block
Syntax: AJMP code address

AJMP unconditionally jumps to the indicated code address. The new value for the Program
Counter is calculated by replacing the least-significant-byte of the Program Counter with the
second byte of the AJMP instruction, and replacing bits 0-2 of the most-significant-byte of the
Program Counter with 3 bits that indicate the page of the byte following the AJMP instruction.
Bits 3-7 of the most-significant-byte of the Program Counter remain unchaged.
Since only 11 bits of the Program Counter are affected by AJMP, jumps may only be made to
code located within the same 2k block as the first byte that follows AJMP.

xi. LCALL
Function: Long Call
Syntax: LCALL code addr

LCALL calls a program subroutine. LCALL increments the program counter by 3 (to point to the
instruction following LCALL) and pushes that value onto the stack (low byte first, high byte
second). The Program Counter is then set to the 16bit value which follows the LCALL opcode,
causing program execution to continue at that address.

xii. ACALL
Function: Absolute Call Within 2K Block
Syntax: ACALL code address
ACALL unconditionally calls a subroutine at the indicated code address. ACALL pushes the
address of the instruction that follows ACALL onto the stack, least-significant-byte first, most-
significant-byte second. The Program Counter is then updated so that program execution
continues at the indicated address.
The new value for the Program Counter is calculated by replacing the least significant-byte of the
Program Counter with the second byte of the ACALL instruction, and replacing bits 0-2 of the
most-significant-byte of the Program Counter with 3 bits that indicate the page. Bits 3-7 of the
most-significant-byte of the Program Counter remain unchanged.
Since only 11 bits of the Program Counter are affected by ACALL, calls may only be made to
routines located within the same 2k block as the first byte that follows ACALL.

xiii. RET
Function: Return From Subroutine
Syntax: RET

RET is used to return from a subroutine previously called by LCALL or ACALL. Program
execution continues at the address that is calculated by popping the topmost 2 bytes off the stack.
The most-significant-byte is popped off the stack first, followed by the least-significant-byte.

RETI
Function: Return From Interrupt
Syntax: RETI

RETI is used to return from an interrupt service routine. RETI first enables interrupts of equal
and lower priorities to the interrupt that is terminating. Program execution continues at the
address that is calculated by popping the topmost 2 bytes off the stack. The most-significant-byte
is popped off the stack first, followed by the least-significant-byte.
RETI functions identically to RET if it is executed outside of an interrupt service routine.