Green PAM8106

10W Stereo Class-D Audio Power Amplifier With NCPL & SSM

Description Pin Assignments

The PAM8106 is a 10W/CH stereo class-D audio amplifier with
Spread-Spectrum modulation, which offers high-quality low THD+N,

PGND R

PVCCR

ROUTN

PGN DR
ROUT P

PVCCR
BSRN

BSRP
low EMI, and high PSRR.

PAM8106 runs off of a 4.5V to 15V supply with high efficiency up to 32 31 30 29 28 27 26 25

NC 1 24 NC
92% to eliminate the heat-sink. With advanced EMI suppression by
Spread-Spectrum Modulation (SSM) technology, PAM8106 requires RINN 2 23 SD

only inexpensive ferrite bead filters for audio outputs while meeting RINP 3 22 AVCC

EMC requirements for overall system cost reduction. 21

MUT E 4
PAM8106 VCLAMP

20
PAM8106 integrates Non-Clipping Power Limit (NCPL) technology
AVDD 5
XXXYWWLL AGND

LINP 6 19 V2P5
which adjusts the gain and eliminate the output signal clip due to the
LINN 7 18 PL
over-level input signal. PAM8106 also offers low THD+N and protects
17 SSMCTL
the speaker from damage. NC 8 NC

9 10 11 12 13 14 15 16
PAM8106 is fully protected against faults with short circuit protection

PGNDL

PV C C L

LOUT N

PGND L
BSLN

PVCCL
BSLP

LOUTP
and thermal shutdown as well as undervoltage and DC input
protection.

The PAM8106 is available in a W-QFN5050-32 (Standard) package.

Features Applications
 4.5V to 15V Operation  Flat Monitor & LCD TVs
 10W x2 into a 8Ω speaker with 12V Supply  Multi-Media Speaker System
 4Ω Impedance Driving Capability  DVD Players, Game Machines
 Built-In Non-Clipping Power Limit (NCPL)  Boom Box & Consumer Electronics Related Application
 High SNR, High PSRR,  Music Instruments
 Over 92% Efficiency
 Low Noise, Low THD+N
 Low Quiescent Current
 Pop Noise Suppression
 Spread Spectrum Modulation (SSM)
 OCP, OTP, OVP, UVLO, Short-Circuit and DC input Protection
 Lead-Free Finish; RoHS Compliant (Notes 1 & 2)
 Halogen and Antimony Free. “Green” Device (Note 3)

Notes: 1. EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. All applicable RoHS exemptions applied.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.

PAM8106 1 of 13 March 2018

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1 2 3 4 5 6

Typical Applications Circuit

ROUTN ROUTP
D D
C4 C7
V CC V CC

V CC C2 C9
FB1 FB2
C1 C3 C8

C5 C6

32

31

30

29

28

27

26

25
U1

R OUT-P
R OUT-N

B STN
PGNDR

PVC CR

B STP

PVC CR

PGNDR
A u d i o i n p u t R-
C11 R1 1
NC NC
24
A u d i o i n p u t R+
C12 R2 2
R IN N SD
23 SD
V CC
C
3 22 R4 C
R IN P A VC C
Mu te 4 21 C18 C19
M U TE V CL M P

A VD D
5
A VD D
PAM8106 A GN D
20

6 19
LIN P V 2 P5
C14 7 18
C17
LIN N PL
C16
A u d i o i n p u t L+ 8 17
C10 R3 NC SS M CT L

LOUT-N

LOUT-P
PGNDL

PVC CL

PVC CL

PGNDL
B STN

B STP
A u d i o i n p u t L-
C20 R5 C15 R11
R10

9
10

11

12

13

14

15

16
A VD D

C24 C25 SS M CT L

B B
C22 FB3 FB4 C28

C21 C27
V CC C23 C26 V CC

LOUTN LOUTP

Pin Descriptions
A A

Pin Number Package Name Function Ti t le

1, 8, 24 NC No Connect, floating or connect to GND on PCB Si ze N u m b er R ev i s io n

B

2 RINN Negative differential audio input for right channel. D ate:

Fi l e:
1 0 -M ar-2 0 1 7 Sh eet o f
E: \ PAM \ 产品分类\ PA M 8 1 06 \p cb \ QF N PADM
raw
80n0 6
BAy :A 1 0 0 7. dd b
1
3 RINP 2
Positive differential audio input for right channel.
3 4 5 6

4 MUTE A logic-high on this pin disables the outputs and a logic low enables the outputs.
5 AVDD 5V Analog Supply (internally generated)
6 LINP Positive differential audio input for left channel.
7 LINN Negative differential audio input for left channel.
9, 16 PGNDL Power ground for left channel H-bridge.
10, 15 PVCCL Power supply for left channel H-bridge, not connected to PVCCR or AVCC.
11 LOUTN Class-D H-bridge negative output for left channel.
12 BSLN Bootstrap I/O for left channel, negative high-side FET.
13 BSLP Bootstrap I/O for left channel, positive high-side FET.
14 LOUTP Class-D H-bridge positive output for left channel.
SSM ON/OFF Control. A Logic-Low enable SSM feature and a Logic-High
disable SSM feature. (Logic-High level complies to AVDD).
17 SSMCTL
SSM mode will be turned ON if this pin is left floating after power-up, due to pull-
up resistor embedded.
18 PL Reference voltage for power-limit function.
19 V2P5 2.5V Reference for analog cells.
20 AGND Analog Ground
21 VCLAMP Internally generated voltage supply for bootstrap capacitors.
22 AVCC High-voltage analog power supply (4.5V to 15V)
Shutdown signal for IC (low= shutdown, high = operational). Compliance to
23 SD AVCC.
25, 32 PGNDR Power ground for right channel H-bridge.
26, 31 PVCCR Power supply for right channel H-bridge, not connected to PVCCL or AVCC.
27 ROUTP Class-D H-bridge positive output for right channel.
28 BSRP Bootstrap I/O for right channel, positive high-side FET.
29 BSRN Bootstrap I/O for right channel, negative high-side FET.
30 ROUTN Class-D H-bridge negative output for right channel.
Connect to ground. Thermal pad should be soldered down on all applications to
33 Thermal Pad
secure the device properly to the printed wiring board.
PAM8106 2 of 13 March 2018
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 PAM8106

Functional Block Diagram

Feedback
System
(x10)

Feedback
System
(x10)

Notes: Gain: Ri = 15k, Rf = 60k; MAX Setting

Power Limit Function: Set by RI and RF

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 PAM8106

Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)

These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. All
voltages are with respect to ground.

Symbol Parameter Rating Unit

PVCC/AVCC Supply Voltage -0.3 to +18 V
VI Input voltages for RINN, RINP, LINN, LINP, MUTE, PL (GND-0.3) to 5.5 V
SD Input voltage for SD (GND-0.3) to AVCC V
TJ Junction Temperature Range -40 to +150 °C
TSTG Storage Temperature -65 to +150 °C
Maximum soldering Temperature Range - Lead Temperature 1, 6mm
TSDR 260 (5sec) °C
(1/16inch)

Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)

Symbol Parameter Rating Unit
PVCC/AVCC Supply Voltage 4.5 to 15 V
Input voltages for RINN, RINP, LINN, LINP (GND-0.3) to 5.5 V
VI
Input voltages for RINN-RINP, LINN-LINP 0 to 2 VRMS
SD High-Level Input voltage for SD 3 to AVCC
V
Low-Level Input voltage for SD 0 to 0.5
High-Level Input voltage for MUTE 3 to 5.5
MUTE V
Low-Level Input voltage for MUTE 0 to 0.5
TA Operating Free-Air Temperature range -40 to +85 °C
TJ Operating Junction Temperature range -40 to +150 °C

Thermal Information
Symbol Parameter Package Maximum Unit
θJC Thermal Resistance (Junction to Case) W-QFN5050-32 (Standard) 5.0 °C/W
θJA Thermal Resistance (Junction to Ambient) W-QFN5050-32 (Standard) 33 °C/W
* The exposed PAD must be soldered to a thermal land on the PCB.
* Measured data by PAM test jig setup condition.

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Electrical Characteristics (@TA = +25°C, VCC = 12V, RL =8Ω, MAX Gain, unless otherwise specified.)

Symbol Parameter Conditions Min Typ Max Units

AVCC Supply Voltage — 4.5 — 15 V
THD+N = 0.12%, f = 1kHz, RL = 8Ω — 6 —
PO Continuous Output Power THD+N = 1%, f = 1kHz, RL = 8Ω — 8.4 — W
THD+N = 10%, f = 1kHz, RL = 8Ω — 10.4 —
THD+N Total Harmonic Distortion plus Noise PO = 5W, f = 1kHz, RL = 8Ω — 0.05 — %
IDD Quiescent Current (No Load) — 15 30 mA
Supply Quiescent Current in Shutdown
ISD Shutdown = 0V — 15 25 µA
Mode
IMUTE Mute Current (No Load) — 11 — mA
High Side — 210 —
IO = 0.5A
RDS(ON) Drain-Source On-State Resistance Low Side — 210 — mΩ
TJ = +25°C
Total — 420 —
ƞ Efficiency Po=10W — 92 — %
1VPP Ripple, f = 1kHz,
PSRR Power Supply Ripple Rejection Ratio — -70 — dB
Inputs AC-Coupled to Ground
TON Turn-on Time SD from “L” to “H” — 25 — ms
fOSC Oscillator frequency — — 300 — kHz
20Hz to 22kHz, A-Weighting, SSM OFF,
VN Output Integrated Noise — 170 — µVrms
Gain = 32dB
CS Crosstalk PO = 3W, RL = 8Ω, f = 1kHz — -90 — dB
Maximum Output at THD+N < 0.5%,
SNR Signal to Noise Ratio — 95 — dB
f = 1kHz
GV Closed Loop Gain — — 32 — dB
Output Offset Voltage
|VOS| INN and INP Connected Together — — 50 mV
(measured differentially)
V2P5 2.5V Bias Voltage No Load — 2.5 — V
AVDD Internal Analog Supply Voltage VCC = 6V to 15V — 5.2 5.7 V
VIH Input High Level — 3 — — V
VIL Input Low Level — — — 0.5 V
OTS Over-Temperature Shutdown — — 160 — °C
OTH Thermal Hysteresis — — 45 — °C

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Typical Performance Characteristics

(VCC = 12, RL = 8Ω, GV = 32dB, TA = +25°C, VCC = 15V, RL =8Ω, unless otherwise specified.)

1. THD+N vs Power (Vcc=12V) 2. THD+N vs Power (Vcc=15V)

20 20

10 10

5 5
f=1KHz
f=10KHz
2 2
f=10KHz
1 1

0.5 0.5
% %
f=1KHz
0.2 0.2

0.1 0.1

0.05 0.05

0.02
f=100Hz 0.02
f=100Hz
0.01 0.01
1m 2m 5m 10m 20m 50m 100m 200m 500m 1 2 5 10 1m 2m 5m 10m 20m 50m 100m 200m 500m 1 2 5 10 20
W W

3. THD+N vs Frequency (Vcc=12V) 4. THD+N vs Frequency (Vcc=15V)

10 10

5 5

2 2

1 1

0.5 Po=2W 0.5 Po=8W

0.2
Po=3W 0.2
Po=5W
% %

0.1 0.1

0.05 0.05

0.02 0.02

0.01 0.01

0.005
Po=0.8W 0.005
Po=3W
0.003
20 50
f=100Hz
100 200 500 1k 2k 5k 10k 20k
0.003
20 50 100 200 500 1k 2k 5k 10k 20k
Hz Hz

5. Frequency Response(Vcc=12V,Gv=32dB,Rl=8Ω) 6. Crosstalk(Vcc=12V,Rl=8Ω)

+40 +0
T T T T T T
+37.5
-10
+35
-20
+32.5

+30 -30

+27.5
-40
+25

d
B
+22.5
Cin=1uF
-50
L to R
g +20 d
-60
B
A +17.5

+15 Cin=0.47uF -70

+12.5 -80 R to L
+10

+7.5
Cin=0.1uF -90

-100
+5

+2.5 -110

+0 -120
20 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k
Hz Hz

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7. PSRR(Vcc=12V,Gv=32dB,Rl=8Ω) PSRR(Vcc=15V,Gv=32dB,Rl=8Ω)
+0 +0

-5 -5

-10 -10

-15 -15

-20 -20

-25 -25

-30 -30

-35 -35

d d
-40 -40
B B
-45 -45

-50 -50

-55 -55

-60 -60

-65 -65

-70 -70

-75 -75

-80 -80
20 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k
Hz Hz

8. Noise Floor(Vcc=12V,Gv=32dB,Rl=8Ω) Noise Floor(Vcc=15V,Gv=32dB,Rl=8Ω)

+0

+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
-50
d
d B -60
B -60 r
r -70
-70 A
A
-80
-80

-90
-90

-100
-100

-110
-110

-120 -120

-130 -130
20 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k
Hz Hz

9. Efficiency vs Output Power(Vcc=12V) Efficiency vs Output Power(Vcc=15V)

11. PL voltage vs output Power 12. Quiescent Current vs Supply Voltage

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Application Information
Test Setup for Performance Testing

PAM8106 Demo Board

Notes: 4. The AP AUX-0025 low pass filter is necessary for class-D amplifier measurement with AP analyzer.
5. Two 22μH inductors are used in series with load resistor to emulate the small speaker for efficiency measurement.

MUTE Operation
The MUTE pin is an input for controlling the output state of the PAM8106. A Logic-High on this pin disables the outputs and Logic-Low enables
the outputs. This pin may be used as a quick disable or enable of the outputs without a volume fade.

Shutdown Operation
The PAM8106 employs a shutdown operation mode to reduce supply current to the absolute minimum level during periods of non-use to save
power. The SD input terminal should be held high during normal operation when the amplifier is in use. Pulling SD low causes the outputs to
mute and the amplifier to enter a low-current state. SD should never be left unconnected to prevent the amplifier from unpredictable operation.

For the best power-off pop performance, the amplifier should be set in shutdown mode prior to removing the power supply voltage.

Internal 2.5V Bias Generator Capacitor Selection

The internal 2.5V bias generator (V2P5) provides the internal bias for the preamplifier stage. The external input capacitors and this internal
reference allow the inputs to be biased within the optimal common-mode range of the input preamplifiers.

The selection of the capacitor value on the V2P5 terminal is critical for achieving the best device performance. During startup or recovery from
shutdown state, the V2P5 capacitor determines the rate at which the amplifier starts up. When the voltage on the V2P5 capacitor equals 0.75 x
V2P5, or 75% of its final value, the device turns on and the Class-D outputs start switching. The startup time is not critical for the best de-pop
performance since any heard pop sound is the result of the Class-D output switching-on other than that of the startup time. However, at least a
0.47μF capacitor is recommended for the V2P5 capacitor.

Another function of the V2P5 capacitor is to filter high frequency noise on the internal 2.5V bias generator.

Power Supply Decoupling, CS

The PAM8106 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic
distortion (THD) as low as possible. Power supply decoupling also prevents ringing oscillations caused by long lead between the amplifier and
the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power
supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series resistance (ESR) ceramic
capacitor, typically X7R type 1μF, is recommended, placing as close as possible to the device’s V CC lead. To filter lower frequency noises, a
large aluminum electrolytic capacitor of 10μF or greater is recommended, placing near the audio power amplifier. The 10μF capacitor also
serves as a local storage capacitor for supplying current during large signal transients on the amplifier outputs.

BSN and BSP Capacitors

The full H-bridge output stages use NMOS transistors only. They therefore require bootstrap capacitors for the high side of each output to turn
on correctly. An at least 220nF ceramic capacitor, rated for at least 25V, must be connected from each output to its corresponding bootstrap
input. Specifically, one 220nF capacitor must be connected from xOUTP to xBSP, and another 220nF capacitor from xOUTN to xBSN. It is
recommended to use 1μF BST capacitor to replace 220nF or lower than 100Hz applications.

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Application Information (Continued)

VCLAMP Capacitors
To ensure that the maximum gate-to-source voltage for the NMOS output transistors not exceeded, an internal regulators are used to clamp the
gate voltage. A 1μF capacitors must be connected from VCLAMP to ground and must be rated for at least 25V. The voltages at the VCLAMP
terminals vary with VCC and may not be used to power any other circuitry.

Internal Regulated 5-V Supply (AVDD)

The AVDD terminal is the output of an internally generated 5V supply, used for the oscillator, amplifier, power limit circuitry and logic control
circuitry. It requires a 0.1μF to 1μF capacitor, placed very close to the pin to ground to keep the regulator stable. The regulator may not be used
to power any external circuitry.

Differential Input Power Limit

The differential input stage of the amplifier eliminates noises that appear on the two input lines of the channel. To use the PAM8106 with a
differential source, connect the positive lead of the audio source to the INP input and the negative lead from the audio source to the INN input.
To use the PAM8106 with a single-ended source, AC ground the INP input through a capacitor equal in value to the input capacitor on INN and
apply the audio source to the INN input. In a single-ended input application, the INP input should be AC grounded at the audio source other than
at the device input for best noise performance.

Using Low-ESR Capacitors

Low-ESR capacitors are recommended throughout this application section. A real (with respect to ideal) capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The
lower the equivalent value of this resistance the more the real capacitor behaves as an ideal capacitor.

Short-Circuit Protection
The PAM8106 has short circuit protection circuitry on the outputs to prevent damage to the device when output-to-output shorts, output-to-GND
shorts, or output-to-VCC shorts occur. Once a short-circuit is detected on the outputs, the output drive is immediately disabled. This is a latched
fault and must be reset by cycling the voltage on the SD pin to a logic low and back to the logic high state for normal operation. This will clear the
short-circuit flag and allow for normal operation if the short was removed. If the short was not removed, the protection circuitry will again activate.

Thermal Protection
Thermal protection on the PAM8106 prevents damage to the device when the internal die temperature exceeds 160°C. There is a ±15 degree
tolerance on this trip point from device to device. Once the die temperature exceeds the set thermal point, the device enters into the shutdown
state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 50°C.
The device begins normal operation at this point without external system intervention.

Spread Spectrum Modulation

The PAM8106 has built in Spread spectrum modulation control of the oscillator frequency to improve EMI performance, while removing the need
to use expensive inductance in the audio output path. The spread spectrum feature can be enabled by setting a Logic-Low to SSMCTL pin, or
disabled by setting a Logic-High to SSMCTL pin.

Power Limit
The voltage at PL pin can used to limit the power to levels below that which is possible based on the supply rail. Add a resistor from PL to ground
to set the voltage at the PLIMIT pin. An external reference may also be used if tighter tolerance is required. Also add a 1µF capacitor from PL pin
to ground. The PLIMIT circuit sets a limit on the output peak-to-peak voltage. The gain of Class-D amplifier will automatic reduced if the output
power higher than setting value to make output power less than limited value and also provide good sound quality.

The output power setting by the resistor value (R10, R11) of PL pin is described as below.

System test set up: VCC = 12V, RLOAD = 8Ω, sine wave 1Khz, AVdd=5.2V

PAM8106 9 of 13 March 2018

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 PAM8106

R11 (Ω) R10 (Ω) PL (V) PL (W)

10K 3K 1.2026 1.873
10K 3.6K 1.3819 2.515
10K 4.3K 1.5704 3.281
10K 5.6K 1.877 4.738
10K 6.8K 2.1087 6.07
10K 8.2K 2.3453 7.554
10K 9.1K 2.4884 8.562

Power Up/Down Sequence

The PAM8106 employs a shutdown operation mode to reduce supply current to the absolute minimum level during periods of non-use to save
power. The SD input terminal should be held high during normal operation when the amplifier is in use. Pulling SD low causes the outputs to
mute and the amplifier to enter a low-current state. SD should never be left unconnected to prevent the amplifier from unpredictable operation.
Suggest PL starting voltage is greater than 4.5V.

Power down Power on

Power-down and Start-up sequences as recommended.

PAM8106 10 of 13 March 2018

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 PAM8106

Ordering Information

PAM8106 X X X

Package Type Pin Configuration Shipping Package

T: QFN5x5-32L V : 32 pin R: Tape & Reel

Part Number Part Marking Package Type Standard Package

PAM8106 W-QFN5050-32
PAM8106TVR 3,000 Units/Tape & Reel
XXXYWWLL (Standard)

Marking Information
PGND R

PVCCR

ROUTN

PGN DR
ROUT P

PVCCR
BSRN

BSRP

32 31 30 29 28 27 26 25
NC 1 24 NC

RINN 2 23 SD

RINP 22 AVCC
3 XXX : Internal Code
21 Y : Year (0 ~9)
MUT E 4
PAM8106 VCLAMP
WW : Week (01 ~53)
20
AVDD 5
XXXYWWLL AGND
LL : Internal Code
LINP 6 19 V2P5

LINN 7 18 PL

NC 8 17 SSMCTL
NC

9 10 11 12 13 14 15 16
PGNDL

PV C C L

LOUT N

PGND L
BSLN

PVCCL
BSLP

LOUTP

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 PAM8106

Package Outline Dimensions

Please see http://www.diodes.com/package-outlines.html for the latest version.

W-QFN5050-32 (Standard)

D D2
Pin #1 ID
C 0.3x45°

W-QFN5050-32
(Standard)
Dim Min Max Typ
Pin#1 DOT A 0.55 0.80 0.75
A1 0.00 0.05 --
E E2
A3 0.203 REF
b 0.20 0.30 0.25
D 4.95 5.05 5.00
D2 3.65 3.75 3.70
E 4.95 5.05 5.00
L E2 3.65 3.75 3.70
e 0.50 BSC
e b e1 3.50 REF
e1 L 0.35 0.45 0.40
All Dimensions in mm
A3
A
Seating Plane
A1

Suggested Pad Layout

Please see http://www.diodes.com/package-outlines.html for the latest version.

W-QFN5050-32 (Standard)

X3
X2
C G1 Value
Dimensions
(in mm)
C 0.500
G1 0.150
X1
G2 0.150
X 0.350
X1 3.800
Y3 Y2 X2 3.850
X3 5.300
Y1 Y 0.600
G2 Y1 3.800
Y2 3.850
Y3 5.300
Y

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 PAM8106

IMPORTANT NOTICE

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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

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This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.

LIFE SUPPORT

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.

Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.

Copyright © 2018, Diodes Incorporated

www.diodes.com

PAM8106 13 of 13 March 2018

Document number: DS40457 Rev. 1 - 2 www.diodes.com © Diodes Incorporated