4 Series Diode Configurations with DC Inputs 59 2.

5 Parallel and Series-Parallel Configurations

64 2.6 AND/OR Gates 67 2.7 Sinusoidal Inputs; Half-Wave Rectification 69 2.8 Full-Wave
Rectification 72 2.9 Clippers 76 2.10 Clampers 83 2.11 Zener Diodes 87 2.12 Voltage-Multiplier
Circuits 94 2.13 PSpice Windows 97 3 BIPOLAR JUNCTION TRANSISTORS 112 3.1 Introduction
112 3.2 Transistor Construction 113 3.3 Transistor Operation 113 3.4 Common-Base
Configuration 115 3.5 Transistor Amplifying Action 119 3.6 Common-Emitter Configuration 120
3.7 Common-Collector Configuration 127 3.8 Limits of Operation 128 3.9 Transistor Specification
Sheet 130 3.10 Transistor Testing 134 3.11 Transistor Casing and Terminal Identification 136 3.12
PSpice Windows 138 4 DC BIASING—BJTS 143 4.1 Introduction 143 4.2 Operating Point 144 4.3
Fixed-Bias Circuit 146 4.4 Emitter-Stabilized Bias Circuit 153 4.5 Voltage-Divider Bias 157 4.6 DC
Bias with Voltage Feedback 165 4.7 Miscellaneous Bias Configurations 168 4.8 Design
Operations 174 4.9 Transistor Switching Networks 180 4.10 Troubleshooting Techniques 185
4.11 PNP Transistors 188 4.12 Bias Stabilization 190 4.13 PSpice Windows 199 5 FIELD-EFFECT
TRANSISTORS 211 5.1 Introduction 211 5.2 Construction and Characteristics of JFETs 212 5.3
Transfer Characteristics 219 vi Contents 5.4 Specification Sheets (JFETs) 223 5.5 Instrumentation
226 5.6 Important Relationships 227 5.7 Depletion-Type MOSFET 228 5.8 Enhancement-Type
MOSFET 234 5.9 MOSFET Handling 242 5.10 VMOS 243 5.11 CMOS 244 5.12 Summary Table
246 5.13 PSpice Windows 247 6 FET BIASING 253 6.1 Introduction 253 6.2 Fixed-Bias
Configuration 254 6.3 Self-Bias Configuration 258 6.4 Voltage-Divider Biasing 264 6.5 Depletion-
Type MOSFETs 270 6.6 Enhancement-Type MOSFETs 274 6.7 Summary Table 280 6.8
Combination Networks 282 6.9 Design 285 6.10 Troubleshooting 287 6.11 P-Channel FETs 288
6.12 Universal JFET Bias Curve 291 6.13 PSpice Windows 294 7 BJT TRANSISTOR MODELING 305
7.1 Introduction 305 7.2 Amplification in the AC Domain 305 7.3 BJT Transistor Modeling 306
7.4 The Important Parameters: Zi, Zo, A v, A i 308 7.5 The r e Transistor Model 314 7.6 The
Hybrid Equivalent Model 321 7.7 Graphical Determination of the h-parameters 327 7.8
Variations of Transistor Parameters 331 8 BJT SMALL-SIGNAL ANALYSIS 338 8.1 Introduction 338
8.3 Common-Emitter Fixed-Bias Configuration 338 8.3 Voltage-Divider Bias 342 8.4 CE Emitter-
Bias Configuration 345 8.3 Emitter-Follower Configuration 352 8.6 Common-Base Configuration
358 Contents vii 8.7 Collector Feedback Configuration 360 8.8 Collector DC Feedback
Configuration 366 8.9 Approximate Hybrid Equivalent Circuit 369 8.10 Complete Hybrid
Equivalent Model 375 8.11 Summary Table 382 8.12 Troubleshooting 382 8.13 PSpice Windows
385 9 FET SMALL-SIGNAL ANALYSIS 401 9.1 Introduction 401 9.2 FET Small-Signal Model 402 9.3
JFET Fixed-Bias Configuration 410 9.4 JFET Self-Bias Configuration 412 9.5 JFET Voltage-Divider
Configuration 418 9.6 JFET Source-Follower (Common-Drain) Configuration 419 9.7 JFET
Common-Gate Configuration 422 9.8 Depletion-Type MOSFETs 426 9.9 Enhancement-Type
MOSFETs 428 9.10 E-MOSFET Drain-Feedback Configuration 429 9.11 E-MOSFET Voltage-Divider
Configuration 432 9.12 Designing FET Amplifier Networks 433 9.13 Summary Table 436 9.14
Troubleshooting 439 9.15 PSpice Windows 439 10SYSTEMS APPROACH— EFFECTS OF Rs AND RL
452 10.1 Introduction 452 10.2 Two-Port Systems 452 10.3 Effect of a Load Impedance (RL) 454
10.4 Effect of a Source Impedance (Rs) 459 10.5 Combined Effect of Rs and RL 461 10.6 BJT CE
Networks 463 10.7 BJT Emitter-Follower Networks 468 10.8 BJT CB Networks 471 10.9 FET
Networks 473 10.10 Summary Table 476 10.11 Cascaded Systems 480 10.12 PSpice Windows
481 11 BJT AND JFET FREQUENCY RESPONSE 493 11.1 Introduction 493 11.2 Logarithms 493
11.3 Decibels 497 viii Contents 11.4 General Frequency Considerations 500 11.5 Low-Frequency
Analysis—Bode Plot 503 11.6 Low-Frequency Response—BJT Amplifier 508 11.7 Low-Frequency
Response—FET Amplifier 516 11.8 Miller Effect Capacitance 520 11.9 High-Frequency
Response—BJT Amplifier 523 11.10 High-Frequency Response—FET Amplifier 530 11.11
Multistage Frequency Effects 534 11.12 Square-Wave Testing 536 11.13 PSpice Windows 538 12
COMPOUND CONFIGURATIONS 544 12.1 Introduction 544 12.2 Cascade Connection 544 12.3
Cascode Connection 549 12.4 Darlington Connection 550 12.5 Feedback Pair 555 12.6 CMOS
Circuit 559 12.7 Current Source Circuits 561 12.8 Current Mirror Circuits 563 12.9 Differential
Amplifier Circuit 566 12.10 BIFET, BIMOS, and CMOS Differential Amplifier Circuits 574 12.11
PSpice Windows 575 13 DISCRETE AND IC MANUFACTURING TECHNIQUES 588 13.1 Introduction
588 13.2 Semiconductor Materials, Si, Ge, and GaAs 588 13.3 Discrete Diodes 590 13.4
Transistor Fabrication 592 13.5 Integrated Circuits 593 13.6 Monolithic Integrated Circuit 595
13.7 The Production Cycle 597 13.8 Thin-Film and Thick-Film Integrated Circuits 607 13.9 Hybrid
Integrated Circuits 608 14 OPERATIONAL AMPLIFIERS 609 14.1 Introduction 609 14.2 Differential
and Common-Mode Operation 611 14.3 Op-Amp Basics 615 14.4 Practical Op-Amp Circuits 619
14.5 Op-Amp Specifications—DC Offset Parameters 625 14.6 Op-Amp Specifications—
Frequency Parameters 628 14.7 Op-Amp Unit Specifications 632 14.8 PSpice Windows 638
Contents ix 15 OP-AMP APPLICATIONS 648 15.1 Constant-Gain Multiplier 648 15.2 Voltage
Summing 652 15.3 Voltage Buffer 655 15.4 Controller Sources 656 15.5 Instrumentation Circuits
658 15.6 Active Filters 662 15.7 PSpice Windows 666 16 POWER AMPLIFIERS 679 16.1
Introduction—Definitions and Amplifier Types 679 16.2 Series-Fed Class A Amplifier 681 16.3
Transformer-Coupled Class A Amplifier 686 16.4 Class B Amplifier Operation 693 16.5 Class B
Amplifier Circuits 697 16.6 Amplifier Distortion 704 16.7 Power Transistor Heat Sinking 708 16.8
Class C and Class D Amplifiers 712 16.9 PSpice Windows 714 17 LINEAR-DIGITAL ICs 721 17.1
Introduction 721 17.2 Comparator Unit Operation 721 17.3 Digital-Analog Converters 728 17.4
Timer IC Unit Operation 732 17.5 Voltage-Controlled Oscillator 735 17.6 Phase-Locked Loop 738
17.7 Interfacing Circuitry 742 17.8 PSpice Windows 745 18 FEEDBACK AND OSCILLATOR
CIRCUITS 751 18.1 Feedback Concepts 751 18.2 Feedback Connection Types 752 18.3 Practical
Feedback Circuits 758 18.4 Feedback Amplifier—Phase and Frequency Considerations 765 18.5
Oscillator Operation 767 18.6 Phase-Shift Oscillator 769 18.7 Wien Bridge Oscillator 772 18.8
Tuned Oscillator Circuit 773 18.9 Crystal Oscillator 776 18.10 Unijunction Oscillator 780 x
Contents 19 POWER SUPPLIES (VOLTAGE REGULATORS) 783 19.1 Introduction 783 19.2 General
Filter Considerations 783 19.3 Capacitor Filter 786 19.4 RC Filter 789 19.5 Discrete Transistor
Voltage Regulation 792 19.6 IC Voltage Regulators 799 19.7 PSpice Windows 804 20 OTHER
TWO-TERMINAL DEVICES 810 20.1 Introduction 810 20.2 Schottky Barrier (Hot-Carrier) Diodes
810 20.3 Varactor (Varicap) Diodes 814 20.4 Power Diodes 818 20.5 Tunnel Diodes 819 20.6
Photodiodes 824 20.7 Photoconductive Cells 827 20.8 IR Emitters 829 20.9 Liquid-Crystal
Displays 831 20.10 Solar Cells 833 20.11 Thermistors 837 21pnpn AND OTHER DEVICES 842 21.1
Introduction 842 21.2 Silicon-Controlled Rectifier 842 21.3 Basic Silicon-Controlled Rectifier
Operation 842 21.4 SCR Characteristics and Ratings 845 21.5 SCR Construction and Terminal
Identification 847 21.6 SCR Applications 848 21.7 Silicon-Controlled Switch 852 21.8 Gate Turn-
Off Switch 854 21.9 Light-Activated SCR 855 21.10 Shockley Diode 858 21.11 DIAC 858 21.12
TRIAC 860 21.13 Unijunction Transistor 861 21.14 Phototransistors 871 21.15 Opto-Isolators 873
21.16 Programmable Unijunction Transist