1, Description

TM1638 is LED driver controller with key-scan interface, MCU digital interface, data latch, LED
high pressure driver, key-scan is integrated into a single chip. TM1638 main apply for fridge, air
condition and home theatre as high-seg display driver.

2. Feature

l Power CMOS technology

l Display mode 10seg 8grid
l Key-scan(8 3bit)
l Gray adjust circuit(duty ratio 8 level is adjustable)
l Serial connection (CLK STB DIO)
l Oscillation type: RC oscillation(450Hz+5%)
l Build-in power-on reset circui
l SOP28 package

3. Pin definition

1 28
K1 STB
2 27
K2 CLK
3 26
K3 DIO
4 25
VDD GND
5 24
SEG1/KS1 GRID1
6 23
SEG2/KS2 GRID2
7 22
SEG3/KS3 GRID3
8 21
SEG4/KS4 GRID4
9 20
SEG5/KS5 GRID5
10 19
SEG6/KS6 GRID6
11 18
SEG7/KS7 GND
12 17
SEG8/KS8 GRID7
13 16
SEG9 GRID8
14 15
SEG10 VDD

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4. Pin function definition

Data Input/output serial data during the rising of shift

DIO
input/output clock, from low.

Initialize serial interface during the falling/rising

edge, then receive instruction. The first byte as
STB Chip select instruction when STB is low, another disposal
would be closed during handle the instruction.
CLK would be ignored when STB is high.

CLK Clock input Output/input serial data at the rising edge

Key-scan data data inputted into the Pin would be latch after
K1 K3
input display cycle close.
SEG1/KS1~ output
Segment output, P pipe open-drain output
SEG8/KS8 segment
output
SEG9 SEG10 Segment output, p pipe open-drain output
segment

GRID1 GRID8 Output(grid) Grid output, N pipe open-drain output

VDD Logic power 5V±10%

GND Logic ground Connect ground system

Note: DIO output data is N pipe open-drain output, when read key demand connect 1K-10K rising
resistance. We promote 10K rising resistance. The read data is unsteady during DIO control N
pipe action at the falling edge of shift close. You could refer to below chart(6), the data is steady
during the rising edge.
VCC

10K

DIO

CT

GND

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5. Display register address and display mode
The register transmits data from outside device to TM1638 via serial interface, address
from00H-0FH total 16 byte units. And separately correspond with LED light of chip SGE and
GRID pin. As below chart:
Write LED display data from high to low of display address, from low to high of data byte.

Write LED display data from high to low of display address, from low to high of data byte. For
don’t used SEG output interface, please input 0 into correspond BIT address.

6. key-scan and key-scan data register

Key-scan frame is 8 3bit, as chart(3):
K1

K2

K3

KS1

KS2

KS3

KS4

KS5

KS6

KS7

KS8

Key-scan data stock address as chart(4), after send read key instruction, start to read key data
BYTE1-BYTE4, read data from low to output, when press pin of chipK and KS, the BIT of
correspond byte is 1.

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 Chart(4)

Note: 1, TM1638 read up to 4 byte, no more than 4.

2, read data byte just from BYTE1-BYTE4 in turn, cannot cut across byte to read. For
example: when press the key corresponds with K2 and KS8, if want to read this key’s data, must
read the 4th byte the 5th bit, then can get the data; when K1 and KS8, K2 and KS8, K3 and KS8
press in the same time, the B4,B5 and B6 of BYTE4’s data is 1.
3. Combination key just is same KS, different K pin. Same K and different KS cannot combine
together as key combination.

7. Instruction description

Instruction to set display mode and LED driver status.

Input DIO the 1st byte as an instruction at STB falling edge. After coding, get the highest byte of
B7,B6 to distinguish different instruction.

7.1 data instruction set

The instruction to set data writes and read, B1and B0 cannot be set 01 or 11.
MSB LSB
B7 B6 B5 B4 B3 B2 B1 B0 Function instruction
0 1 0 0 Data write Write data to register
0 1 1 0 mode set Read key-scan data
Not
0 1 0 Address add Auto address add
avaiable
0 1 1 mode set Fixed address
input 0
0 1 0 test mode Normal mode
0 1 1 set(inner use) Test mode

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7.2 Address instruction setting
MSB LSB
Display
B7 B6 B5 B4 B3 B2 B1 B0
address
1 1 0 0 0 0 00H
1 1 0 0 0 1 01H
1 1 0 0 1 0 02H
1 1 0 0 1 1 03H
1 1 0 1 0 0 04H
1 1 0 1 0 1 05H

Not
avaiable
input 0

The instruction is to set display register address

If address set 10H or higher, data would be ignored, till available address is set.
When power on, address default 00H.

7.3 display control

8. serial data transmit pattern:

Read and receive 1 bit should at the rising edge of shift clock.

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8.1 data receive (write data)

CLK 1 2 3 4 5 6 7 8

DIO B0 B1 B2 B3 B4 B5 B6 B7

STB
8.2 data read

CLK 1 2 `````` 8

DIO B0 B1 `````` B7 B0 B1 B2 B3

STB

Twait

Notice: When read data, set instruction from the 8th rising edge of clock to CLK falling edge to
read data that demand a waiting time Twait(min 1 S).

9. Display and key

(1) Display
1, Driver common cathode:
SEG1 1

SEG2 1
SEG1
SEG2
SEG3 1 A DPY
SEG3 B a

SEG4 GRID1 SEG4 C f g b GRID1

1 D
SEG5 Ee c
d
SEG5 F
1 G [LEDgn]
SEG6
SEG6 1
SEG7

SEG7 1
Chart(7)
Chart(7) is sketch map for common cathode digitron connection, if demand the nixie tube display”0”,

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2. Driver common anode nixie tube

GRID1 1

GRID2 1
GRID1
GRID2
GRID3 1 A DPY
GRID3 B a

GRID4 SEG1 GRID4 C f b

SEG1
g
1 D
GRID5 Ee c
d
GRID5 F
1 G [LEDgn]
GRID6
GRID6 1
GRID7

GRID7 1

chart(8) is sketch map for common anode digitron connection, if demand the nixie tube display”0”,

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 K1 STB
K2 CLK
vcc
K3 DIO
VDD GND
1 SEG1/KS1 GRID1
2
SEG2/KS2 GRID2
SEG3/KS3 GRID3
R1 R2 SEG4/KS4 GRID4
1k 1k SEG5/KS5 GRID5
SEG6/KS6 GRID6
SEG7/KS7 GND
SEG8/KS8 GRID7
SEG9 GRID8
SEG10 VDD

SEG1/KS1

SEG2/KS2

SEG3/KS3

SEGN/KSN

Tdisp=500us

K1 S1 S3 S5

K2 S2 S4

K3 S6

SGE1/KS1 SGE1/KS2 SGE1/KS3

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 SGE1/KS1
S1

SGE2/KS2
S2

D1 D2

1
K1
GRID1

SGE1/KS1
S1
D1 D2
1

1
S2

GRID1 GRID2 K1 K2

Ω too high will invalid key, too low cannot solve disturb problem.
SGE1/KS1
510 S1

SGE2/KS2
510 S2

D1 D2
1

K1
GRID1

SGE1/KS1
S1

SGE2/KS2
S2

D1 D2
1

K1
GRID1

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CLK

DIO Command1 Command2 Command3 Data1 Data2 ``````` Data n Command4

STB

CLK

DIO Command1 Command2 Command3 Data1 Command4 Data2 ``````` Command5

STB

10.3 Read key timing

CLK

DIO Command1 Data1 Data2 Data3 Data4

STB

Command1: set display mode

Data1-4: read key data

10.4 procedure design flow chart

procedure design flow chart for address auto-add1

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 42H

No

1BTYE

1 40H

MCU
0C0H

No

4BYTE
Yes

16BYTE
No
Yes
Yes

8FH

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 8FH

42H

No
44H
1BTYE

0C0H MCU

1BYTE
4BYTE
Yes

0C1H

1BYTE
No
Yes

……

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11. Application circuit
11.1 TM1638 driver common anode digit screen hardware circuit, as chart(16):
LED1 LED2 LED3 LED4
GR1 a DPY GR1 a DPY GR1 a DPY GR1 a DPY
GR2 b a GR2 b a GR2 b a GR2 b a
GR3 c f b GR3 c f b GR3 c f b GR3 c f b
GR4 d g SG1 GR4 d g SG4 GR4 d g SG7 GR4 d g SG10
GR5 e e c GR5 e e c GR5 e e c GR5 e e c
GR6 f d GR6 f d GR6 f d GR6 f d
GR7 g dp GR7 g dp GR7 g dp GR7 g dp
GR8 dp GR8 dp GR8 dp GR8 dp
LED7 LED8 LED9
GR1 a DPY GR1 a DPY GR1 a DPY
GR2 b a GR2 b a GR2 b a
GR3 c f b GR3 c f b GR3 c f b
GR4 d g SG2 GR4 d g SG5 GR4 d g SG8
GR5 e e c GR5 e e c GR5 e e c
GR6 f d GR6 f d GR6 f d
GR7 g dp GR7 g dp GR7 g dp
GR8 dp GR8 dp GR8 dp
LED13 LED14 LED15
GR1 a DPY GR1 a DPY GR1 a DPY
GR2 b a GR2 b a GR2 b a
GR3 c f b GR3 c f b GR3 c f b
GR4 d g SG3 GR4 d g SG6 GR4 d g SG9
GR5 e e c GR5 e e c GR5 e e c
GR6 f d GR6 f d GR6 f d
GR7 g dp GR7 g dp GR7 g dp
GR8 dp GR8 dp GR8 dp
SG1

SG2

SG3

SG4

SG5

SG6

SG7

SG8
S2 S5 S8 S11 S14 S17 S20 S23

K1
S3 S6 S9 S12 S15 S18 S21 S24

K2
S25 S26 S27 S28 S29 S30 S31 S32

K3
VCC
R3
VCC R2
10K R1
10K
IC? 10K
K1 STB
C1 K1 STB
K2 CLK
100uF C2 K2 CLK
VCC K3 C3 DIO
104 K3 DIO
C4
VDD GND
SG1 GR1 C5
SEG1/KS1 GRID1
SG2 GR2 101
SEG2/KS2 GRID2
SG3 GR3 101
SEG3/KS3 GRID3
SG4 GR4 101
SEG4/KS4 GRID4
SG5 GR5
: VDD, SG6
SEG5/KS5 GRID5
GR6
SEG6/KS6 GRID6
GND . SG7
SEG7/KS7 GND
SG8 GR7
SEG8/KS8 GRID7
SG9 GR8
SEG9 GRID8
SG10
SEG10 VDD
TM1638

Chart(16)

11.2 TM1638 Driver common cathode digit screen hardware circuit, as chart(17):

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 DVD
VCD dts
MP3 PBC DDD

g
h

1
2
3
4
5
6
7
8
a

e
f

GR1
GR2
GR3
GR4
GR5
GR6
GR7
GR8
SG1
SG2
SG3
SG4
SG5
SG6
SG7
SG8
VCC
R3
VCC R2
10K R1
10K
10K
K1 STB
C1 K1 STB
K2 CLK
100uF C2 K2 CLK
VCC K3 C3 DIO
104 K3 DIO
C4
VDD GND
SG1 GR1 C5
SEG1/KS1 GRID1
SG2 GR2 101
SEG2/KS2 GRID2
SG3 GR3 101
SEG3/KS3 GRID3
SG4 GR4 101
SEG4/KS4 GRID4
SG5 GR5
: VDD, SEG5/KS5 GRID5
SG6 GR6
SEG6/KS6 GRID6
GND . SG7
SEG7/KS7 GND
SG8 GR7
SEG8/KS8 GRID7
SG9 GR8
SEG9 GRID8
SG10
SEG10 VDD
TM1638
SG1

SG2

SG3

SG4

SG5

SG6

SG7

SG8
S2 S5 S8 S11 S14 S17 S20 S23

K1
S3 S6 S9 S12 S15 S18 S21 S24

K2
S25 S26 S27 S28 S29 S30 S31 S32

K3

Chart(17)

Notice:

12. Electric parameter

Limit parameter(Ta = 25 , Vss = 0 V

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Normal work range(Ta = -20 +70 Vss = 0 V

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Timing feature Ta = -20 +70 VDD = 4.5 5.5 V

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