Chapter 7: FET Biasing
Common FET Biasing Circuits
JFET Biasing Circuits Fixed Bias Self-Bias Self Voltage-Divider Bias VoltageD-Type MOSFET Biasing Circuits Self-Bias SelfSelf Voltage-Divider Bias VoltageVoltage E-Type MOSFET Biasing Circuits Feedback Configuration Feedback Voltage-Divider Bias VoltageVoltage
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Basic Current Relationships
For all FETs:
IG 0A
ID = IS
For JFETS and D-Type MOSFETs:
V I D = I DSS 1 GS VP
2
For E-Type MOSFETs:
I D = k ( VGS VT ) 2
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
FixedFixed-Bias Configuration
VDS = VDD I D R D VS = 0V VC = VDS V = VGS VGS = VGG
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
SelfSelf-Bias Configuration
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
SelfSelf-Bias Calculations
For the indicated loop, VGS = I D R S To solve this equation: Select an ID < IDSS and use the component value of RS to calculate VGS Plot the point identified by ID and VGS. Draw a line from the origin of the axis to this point. Plot the transfer curve using IDSS and VP (VP = VGSoff in specification sheets) and a few points such as ID = IDSS / 4 and ID = IDSS / 2 etc. The Q-point is located where the first line intersects the transfer curve. Use the value of ID at the Q-point (IDQ) to solve for the other voltages:
VDS = VDD I D ( R S + R D ) VS = I D R S VD = VDS + VS = VDD VRD
6
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
VoltageVoltage-Divider Bias
IG = 0 A ID responds to changes in VGS.
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
VoltageVoltage-Divider Bias Calculations
VG is equal to the voltage across divider resistor R2:
VG = R 2 VDD R1 + R 2
Using Kirchhoffs Law:
VGS = VG I D R S
The Q point is established by plotting a line that intersects the transfer curve.
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
VoltageVoltage-Divider Q-point QStep 1 Plot the line by plotting two points: VGS = VG, ID = 0 A VGS = 0 V, ID = VG / RS Step 2 Plot the transfer curve by plotting IDSS, VP and the calculated values of ID Step 3 The Q-point is located where the line intersects the transfer curve
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
VoltageVoltage-Divider Bias Calculations
QvoltageUsing the value of ID at the Q-point, solve for the other variables in the voltagedivider bias circuit:
VDS = VDD I D (R D + R S ) VD = VDD I D R D VS = I D R S
VDD I R1 = I R2 = R1 + R 2
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
10
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
D-Type MOSFET Bias Circuits
DepletionDepletion-type MOSFET bias circuits are similar to those used to bias JFETs. The only depletiondifference is that depletiontype MOSFETs can operate with positive values of VGS and with ID values that exceed IDSS.
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
11
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
SelfSelf-Bias
Step 1 Plot line for VGS = VG, ID = 0 A V ID = VG/RS, VGS = 0 V I Step 2 Plot the transfer curve using IDSS, VP and calculated values of ID Step 3 QThe Q-point is located where the line intersects the transfer curve. Use the ID at the Q-point to solve for the other variables in the voltage-divider bias circuit. These are the same steps used to analyze JFET self-bias circuits. self-
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
12
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
VoltageVoltage-Divider Bias
Step 1 Plot the line for VGS = VG, ID = 0 A V ID = VG/RS, VGS = 0 V I Step 2 Plot the transfer curve using IDSS, VP and calculated values of ID. Step 3 QThe Q-point is located where the line intersects the transfer curve is. Use the ID at Qthe Q-point to solve for the other variables voltagein the voltage-divider bias circuit. These are the same steps used to analyze JFET voltage-divider bias circuits. voltage-
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
13
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
E-Type MOSFET Bias Circuits
The transfer characteristic for ethe e-type MOSFET is very different from that of a simple dJFET or the d-type MOSFET.
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
14
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Feedback Bias Circuit
IG = 0 A VRG = 0 V VDS = VGS VGS = VDD IDRD
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
15
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Feedback Bias Q-Point QStep 1 Plot the line using VGS = VDD, ID = 0 A ID = VDD / RD , VGS = 0 V Step 2 Using values from the specification sheet, plot the transfer curve with VGSTh , ID = 0 A VGS(on), ID(on) Step 3 The Q-point is located where the line and the transfer curve intersect Step 4 Using the value of ID at the Q-point, solve for the other variables in the bias circuit
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
16
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
VoltageVoltage-Divider Biasing
Plot the line and the transfer curve to find the Q-point. Use these equations:
VG =
R 2 VDD R1 + R 2
VGS = VG I D R S VDS = VDD I D ( R S + R D )
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
17
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
VoltageVoltage-Divider Bias Q-Point QStep 1 Plot the line using VGS = VG = (R2VDD) / (R1 + R2), ID = 0 A V ID = VG/RS , VGS = 0 V I Step 2 Using values from the specification sheet, plot the transfer curve with VGSTh, ID = 0 A V VGS(on) , ID(on) V Step 3 QThe point where the line and the transfer curve intersect is the Qpoint. Step 4 QUsing the value of ID at the Q-point, solve for the other circuit values.
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
18
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
p-Channel FETs
For p-channel FETs the same calculations and graphs are used, except that the voltage polarities and current directions are reversed. The graphs are mirror images of the n-channel graphs.
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
19
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Applications
VoltageVoltage-controlled resistor JFET voltmeter Timer network Fiber optic circuitry MOSFET relay driver
Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
20
Copyright 2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
