Lecture
on
“Advanced Computer Architecture –TCS 704”
by
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
GRAPHIC ERA DEEMED TO BE UNIVERSITY – 248002
Problem-01:
Consider a direct mapped cache of size 16 KB
with block size 256 bytes. The size of main
memory is 128 KB. Find-
Number of bits in tag
Tag directory size
Solution-
Given-
Cache memory size = 16 KB
Block size = Frame size = Line size = 256
bytes
Main memory size = 128 KB
We consider that the memory is byte
addressable.
We have,
Size of main memory
= 128 KB
= 217 bytes
Thus, Number of bits in physical address = 17 bits
Number of Bits in Block Offset-
We have,
Block size
= 256 bytes
= 28 bytes
Thus, Number of bits in block offset = 8 bits
Number of Bits in Line Number-
Total number of lines in cache
= Cache size / Line size
= 16 KB / 256 bytes
= 214 bytes / 28 bytes
= 26 lines
Thus, Number of bits in line number = 6 bits
Number of Bits in Tag-
Number of bits in tag
= Number of bits in physical address – (Number
of bits in line number + Number of bits in block
offset)
= 17 bits – (6 bits + 8 bits)
= 17 bits – 14 bits
= 3 bits
Thus, Number of bits in tag = 3 bits
Tag Directory Size-
Tag directory size
= Number of tags x Tag size
= Number of lines in cache x Number of bits in
tag
=26 x 3 bits
= 192 bits
= 24 bytes
Thus, size of tag directory = 24 bytes
Problem-02:
Consider a direct mapped cache of size 512
KB with block size 1 KB. There are 7 bits in
the tag. Find-
Size of main memory
Tag directory size
Solution-
Given-
Cache memory size = 512 KB
Block size = Frame size = Line size = 1 KB
Number of bits in tag = 7 bits
We consider that the memory is byte addressable.
Number of Bits in Block Offset-
We have,
Block size
= 1 KB
= 210 bytes
Thus, Number of bits in block offset = 10 bits
Number of Bits in Line Number-
Total number of lines in cache
= Cache size / Line size
= 512 KB / 1 KB
= 29 lines
Thus, Number of bits in line number = 9 bits
Number of Bits in Physical Address-
Number of bits in physical address
= Number of bits in tag + Number of bits in line
number + Number of bits in block offset
= 7 bits + 9 bits + 10 bits
= 26 bits
Thus, Number of bits in physical address = 26 bits
Size of Main Memory-
We have,
Number of bits in physical address = 26 bits
Thus, Size of main memory
= 226 bytes
= 64 MB
Tag Directory Size-
Tag directory size
= Number of tags x Tag size
= Number of lines in cache x Number of bits in
tag
= 29 x 7 bits
= 3584 bits
= 448 bytes
Thus, size of tag directory = 448 bytes
Problem-03:
An 8 KB direct-mapped write back cache is organized
as multiple blocks, each of size 32 bytes. The
processor generates 32 bit addresses. The cache
controller maintains the tag information for each
cache block comprising of the following-
1 valid bit
1 modified bit
As many bits as the minimum needed to identify the
memory block mapped in the cache
What is the total size of memory needed at the cache
controller to store meta data (tags) for the cache?
1. 4864 bits
2. 6144 bits
3. 6656 bits
4. 5376 bits
Solution-
Given-
Cache memory size = 8 KB
Block size = Frame size = Line size = 32 bytes
Number of bits in physical address = 32 bits
Number of Bits in Block Offset-
We have,
Block size
= 32 bytes
= 25 bytes
Thus, Number of bits in block offset = 5 bits
Number of Bits in Line Number-
Total number of lines in cache
= Cache memory size / Line size
= 8 KB / 32 bytes
= 213 bytes / 25 bytes
= 28 lines
Thus, Number of bits in line number = 8 bits
Number Of Bits in Tag-
Number of bits in tag
= Number of bits in physical address – (Number
of bits in line number + Number of bits in block
offset)
=32 bits – (8 bits + 5 bits)
= 32 bits – 13 bits
= 19 bits
Thus, Number of bits in tag = 19 bits
Memory Size Needed At Cache Controller-
Size of memory needed at cache controller
= Number of lines in cache x (1 valid bit + 1
modified bit + 19 bits to identify block)
= 28 x 21 bits
= 5376 bits
