Computer

Computer: A computer is a combination of hardware and software resources which

integrate together and provides various functionalities to the user. Hardware are the physical
components of a computer like the processor, memory devices, monitor, keyboard etc. while
software is the set of programs or instructions that are required by the hardware resources to
function properly.
There are a few basic components that aids the working-cycle of a computer i.e. the Input-
Process- Output Cycle and these are called as the functional components of a computer. It
needs certain input, processes that input and produces the desired output. The input unit takes
the input, the central processing unit does the processing of data and the output unit produces
the output. The memory unit holds the data and instructions during the processing.
Digital Computer: A digital computer can be defined as a programmable machine which
reads the binary data passed as instructions, processes this binary data, and displays a
calculated digital output. Therefore, Digital computers are those that work on the digital data.
Details of Functional Components of a Digital Computer
 Input Unit :The input unit consists of input devices that are attached to the computer.
These devices take input and convert it into binary language that the computer understands.
Some of the common input devices are keyboard, mouse, joystick, scanner etc.
 Central Processing Unit (CPU) : Once the information is entered into the computer by the
input device, the processor processes it. The CPU is called the brain of the computer because
it is the control center of the computer. It first fetches instructions from memory and then
interprets them so as to know what is to be done. If required, data is fetched from memory or
input device. Thereafter CPU executes or performs the required computation and then either
stores the output or displays on the output device. The CPU has three main components
which are responsible for different functions – Arithmetic Logic Unit (ALU), Control Unit
(CU) and Memory registers
 Arithmetic and Logic Unit (ALU) : The ALU, as its name suggests performs
mathematical calculations and takes logical decisions. Arithmetic calculations include
addition, subtraction, multiplication and division. Logical decisions involve comparison of
two data items to see which one is larger or smaller or equal.
 Control Unit : The Control unit coordinates and controls the data flow in and out of CPU
and also controls all the operations of ALU, memory registers and also input/output units. It
is also responsible for carrying out all the instructions stored in the program. It decodes the
fetched instruction, interprets it and sends control signals to input/output devices until the
required operation is done properly by ALU and memory.
 Memory Registers : A register is a temporary unit of memory in the CPU. These are used
to store the data which is directly used by the processor. Registers can be of different
sizes(16 bit, 32 bit, 64 bit and so on) and each register inside the CPU has a specific function
like storing data, storing an instruction, storing address of a location in memory etc. The
user registers can be used by an assembly language programmer for storing operands,
intermediate results etc. Accumulator (ACC) is the main register in the ALU and contains
one of the operands of an operation to be performed in the ALU.
 Memory : Memory attached to the CPU is used for storage of data and instructions and is
called internal memory The internal memory is divided into many storage locations, each of
which can store data or instructions. Each memory location is of the same size and has an
address. With the help of the address, the computer can read any memory location easily
without having to search the entire memory. when a program is executed, it’s data is copied
to the internal memory and is stored in the memory till the end of the execution. The internal
memory is also called the Primary memory or Main memory. This memory is also called as
RAM, i.e. Random Access Memory. The time of access of data is independent of its location
in memory, therefore this memory is also called Random Access memory (RAM).
 Output Unit : The output unit consists of output devices that are attached with the
computer. It converts the binary data coming from CPU to human understandable form. The
common output devices are monitor, printer, plotter etc.

Interconnection between Functional Components

A computer consists of input unit that takes input, a CPU that processes the input and an output
unit that produces output. All these devices communicate with each other through a common
bus.
1) A bus is a transmission path, made of a set of conducting wires over which data or
information in the form of electric signals, is passed from one component to another in a
computer.
2) The bus can be of three types – Address bus, Data bus and Control Bus.
Following figure shows the connection of various functional components:

3) The address bus carries the address location of the data or instruction.
4) The data bus carries data from one component to another and the control bus carries the
control signals.
5) The system bus is the common communication path that carries signals to/from CPU, main
memory and input/output devices.
6) The input/output devices communicate with the system bus through the controller circuit
which helps in managing various input/output devices attached to the compute r.

Basic Operational Concepts

o The primary function of a computer system is to execute a program, sequence of
instructions. These instructions are stored in computer memory.
 o These instructions are executed to process data which are already loaded in the computer
memory through some input devices.
o After processing the data, the result is either stored in the memory for further reference,
or it is sent to the outside world through some output port.
o To perform the execution of an instruction, in addition to the arithmetic logic unit, and
control unit, the processor contains a number of registers used for temporary storage of
data and some special function registers.
o The special function registers include program counters (PC), instruction registers (IR),
memory address registers (MAR) and memory and memory data registers (MDR).
o The Program counter is one of the most critical registers in CPU.
o The Program counter monitors the execution of instructions. It keeps track on which
instruction is being executed and what the next instruction will be.
o The instruction register IR is used to hold the instruction that is currently being executed.
o The contents of IR are available to the control unit, which generate the timing signals that
control, the various processing elements involved in executing the instruction.
o The two registers MAR and MDR are used to handle the data transfer between the main
memory and the processor.
o The MAR holds the address of the main memory to or from which data is to be
transferred.
o The MDR contains the data to be written into or read from the addressed word of the
main memory.

Bus Structure
The bus in the computer is the shared transmission medium. This means multiple components or
devices use the same bus structure to transmit the information signals to each other a time only
one pair of devices can use this bus to communicate with each other successfully.

A bus is a subsystem that is used to connect computer components and transfer data
between them. For example, an internal bus connects computer internals to the motherboard. A
“bus topology” or design can also be used in other ways to describe digital connections. A bus
may be parallel or serial.

There are three types of bus lines: Data bus, Address bus, and Control bus. Communication
over each bus line is performed in cooperation with another. The data bus is a signal line for
exchanging the data between the CPU and the memory, and between the CPU and I/O, and
handles the data stored in the specified location.

A bus may be parallel or serial. Parallel buses transmit data across multiple wires. Serial buses
transmit data in bit-serial format.
Bus (hardware structure)-
A bus was originally an electrical parallel structure with conductors connected with identical or
similar CPU pins, such as a 32-bit bus with 32 wires and 32 pins. The earliest buses, often
termed electrical power buses or bus bars, were wire collections that connected peripheral
devices and memory, with one bus designated for peripheral devices and another bus for
memory. Each bus included separate instructions and distinct protocols and timing.
Parallel bus standards include advanced technology attachment (ATA) or small computer system
interface (SCSI) for printer or hard drive devices. Serial bus standards include universal serial
bus (USB), FireWire or serial ATA with a daisy-chain topology or hub design for devices,
keyboards or modem devices.
Computer bus types are as follows:
(1) System Bus: A parallel bus that simultaneously transfers data in 8-, 16-, or 32-bit
channels and is the primary pathway between the CPU and memory.
(2) Internal Bus: Connects a local device, like internal CPU memory.
(3) External Bus: Connects peripheral devices to the motherboard, such as scanners or
disk drives.
(4) Expansion Bus: Allows expansion boards to access the CPU and RAM.
(5) Frontside Bus: Main computer bus that determines data transfer rate speed and is
the primary data transfer path between the CPU, RAM and other motherboard devices.
(6)Backside Bus: Transfers secondary cache (L2 cache) data at faster speeds, allowing
more efficient CPU operations.
The bus can be discussed based on different engineering models. For example, there is the
parallel bus and the serial bus, as mentioned above, and the different types of buses that you
would encounter on the motherboard of a computer, for example, a system bus, address bus or
input-output bus.
We can also talk about buses in the form of data transfer rates. Here the “bus speed” or rate may
be listed in megahertz, or in megabytes per second. For example, 100 MHz is said to correspond
to perhaps 6400 MB per second in some architectures.
In general, the kinds of speed achieved by modern processors include bus speeds of typically
under 10,000 MB or 10 GB per second.
Then there’s also the designation of a bus specific to where it is located on the circuit board. The
front-side bus is typically considered the fastest bus on the motherboard.

Addressing Modes:

The operation field of an instruction specifies the operation to be performed.And this operation
must be performed on some data.So each instruction need to specify data on which the
operation is to be performed.But the operand(data) may be in accumulator, general purpose
register or at some specified memory location.So, appropriate location (address) of data is need
to be specified, and in computer, there are various ways of specifying the address of data.These
various ways of specifying the address of data are known as “Addressing Modes”

So Addressing Modes can be defined as-

“The technique for specifying the address of the operands “

And in computer the address of operand i.e., the address where operand is actually found is
known as
“Effective Address”.

Now, in addition to this, the two most prominent reason of why addressing modes are so
important are:

1. First, the way the operand data are chosen during program execution is
dependent on the addressing mode of the instruction.
2. Second, the address field(or fields) in a typical instruction format are relatively
small and sometimes we would like to be able to reference a large range of locations,
so here to achieve this objective i.e., to fit this large range of location in address field,
a variety of addressing techniques has been employed. As they reduce the number of
field in the addressing field of the instruction.

Thus, Addressing Modes are very vital in Instruction Set Architecture(ISA).Now, before
discussing various addressing modes, we will give here some notations that will use in
addressing mode .These are:

A= Contents of an address field in the instruction

R= Contents of an address field in the instruction that refers to a register

EA= Effective Address(Actual address) of location containing the referenced operand.

(X)= Contents of memory location x or register X.

Types Of Addressing Modes:

Various types of addressing modes are:

1. Implied and Immediate Addressing Modes

2. Direct or Indirect Addressing Modes
3. Register Addressing Modes
4. Register Indirect Addressing Mode
5. Auto-Increment and Auto-Decrement Addressing Modes
6. Displacement Based Addressing Modes
Now, we will explore to each one by one.

1.Implied and Immediate Addressing Modes:

 Although most Addressing modes need the address field of the instruction, but implied and
immediate addressing modes are the only addressing modes that need no address field at
all.Now we will discuss each of them in detail one by one.

Implied Addressing Mode:

Implied Addressing Mode also known as "Implicit" or "Inherent" addressing mode is the
addressing mode in which, no operand(register or memory location or data) is specified
in the instruction. As in this mode the operand are specified implicit in the definition of
instruction.
As an example: The instruction :
“Complement Accumulator” is an Implied Mode instruction because the operand in the
accumulator register is implied in the definition of instruction.In assembly language it is
written as:

CMA: Take complement of content of AC

Similarly, the instruction,

RLC: Rotate the content of Accumulator is an implied mode instruction.

Immediate Addressing Mode:

In Immediate Addressing Mode operand is specified in the instruction itself.In other words,
an immediate mode instruction has an operand field rather than an address field,
which contain actual operand to be used in conjunction with the operand specified in the
instruction.That is, in this mode, the format of instruction is:

As an example: The Instruction:

MVI 06 Move 06 to the accumulator

ADD 05 ADD 05 to the content of accumulator

In addition to this , this mode is very useful for initialising the register to a constant value.
2.Direct and Indirect Addressing Modes:

The instruction format for direct and indirect addressing mode is shown below:

It consists of 3-bit opcode, 12-bit address and a mode bit designated as( I).The mode bit (I)
is zero for Direct Address and 1 for Indirect Address. Now we will discuss about each
in detail one by one.
Direct Addressing Mode:

Direct Addressing Mode is also known as “Absolute Addressing Mode”.In this mode the
address of data(operand) is specified in the instruction itself.That is, in this type of
mode, the operand resides in memory and its address is given directly by the address
field of the instruction.

Means, in other words, in this mode, the address field contain the Effective Address of
operand
i.e., EA=A
As an example: Consider the instruction:
ADD A Means add contents of cell A to accumulator .

It Would look like as shown below:

 Here, we see that in it Memory Address=Operand.
Indirect Addressing Mode:

In this mode, the address field of instruction gives the memory address where on, the
operand is stored in memory.That is, in this mode, the address field of the instruction
gives the address where the “Effective Address” is stored in memory.
i.e., EA=(A)
Means, here, Control fetches the instruction from memory and then uses its address part to
access memory again to read Effective Address.
As an example: Consider the instruction:
ADD (A) Means adds the content of cell pointed to contents of A to Accumulator.

It look like as shown in figure below:

 Thus in it, AC <-- M[M[A]] [M=Memory]

i.e., (A)=1350=EA

3.Register Addressing Mode:

In Register Addressing Mode, the operands are in registers that reside within the CPU.That
is, in this mode, instruction specifies a register in CPU, which contain the operand.It is
like Direct Addressing Mode, the only difference is that the address field refers
to a register instead of memory location.

i.e., EA=R

It look like as:

 Example of such instructions are:
MOV AX, BX Move contents of Register BX to AX

ADD AX, BX Add the contents of register BX to AX

Here, AX, BX are used as register names which is of 16-bit register.
Thus, for a Register Addressing Mode, there is no need to compute the actual address as the
operand is in a register and to get operand there is no memory access involved.
4.Register Indirect Addressing Mode:

In Register Indirect Addressing Mode, the instruction specifies a register in CPU whose
contents give the operand in memory.In other words, the selected register contain the
address of operand rather than the operand itself.That is,

i.e., EA=(R)
Means, control fetches instruction from memory and then uses its address to access Register
and looks in Register(R) for effective address of operand in memory.
It look like as:
 Here, the parentheses are to be interpreted as meaning contents of.

Example of such instructions are:

MOV AL, [BX]

Code example in Register:
MOV BX, 1000H

MOV 1000H, operand

From above example, it is clear that, the instruction(MOV AL, [BX]) specifies a
register[BX], and in coding of register, we see that, when we move register
[BX], the register contain the address of operand(1000H) rather than address
itself.
5.Auto-increment and Auto-decrement Addressing Modes :

These are similar to Register indirect Addressing Mode except that the register is
incremented or decremented after(or before) its value is used to access memory.
These modes are required because when the address stored in register refers to a table of
data in memory, then it is necessary to increment or decrement the register after every
access to table so that next value is accessed from memory.Thus, these addressing
modes are common requirements in computer.
 Subroutine-
In computer programming, a function or subroutine is a sequence of program instructions that
performs a specific task, packaged as a unit. This unit can then be used in programs wherever
that particular task should be performed.

1. Subroutine:
A set of instructions that are used repeatedly in a program can be referred to as Subroutine.
Only one copy of this Instruction is stored in the memory. When a Subroutine is required it can
be called many times during the Execution of a particular program. A call Subroutine
Instruction calls the Subroutine. Care Should be taken while returning a Subroutine as
Subroutine can be called from a different place from the memory.
The content of the PC must be Saved by the call Subroutine Instruction to make a correct
return to the calling program.

Figure – Process of a subroutine in a program

The subroutine linkage method is a way in which computers call and return the Subroutine.
The simplest way of Subroutine linkage is saving the return address in a specific location, such
as a register which can be called a link register call Subroutine.
2. Subroutine Nesting :
Subroutine nesting is a common Programming practice In which one Subroutine calls another
Subroutine.
 Figure – Subroutine calling another subroutine
From the above figure, assume that when Subroutine 1 calls Subroutine 2 the return address of
Subroutine 2 should be saved somewhere. So if the link register stores the return address of
Subroutine 1 this will be (destroyed/overwritten) by the return address of Subroutine 2. As the
last Subroutine called is the first one to be returned ( Last in first out format). So stack data
structure is the most efficient way to store the return addresses of the Subroutines.

Figure – Return address of subroutine is stored in stack

memory

PARAMETER PASSING:-
SUBROUTINES IN COMPUTER ORGANIZATION PARAMETER PASSING:- When calling
a subroutine, a program must provide to the subroutine the parameters, that is, the operands or
their addresses, to be used in the computation. Later, the subroutine returns other parameters, in
this case, the results of the computation.
This exchange of information between a calling program and a subroutine is referred to as
parameter passing. Parameter passing may be accomplished in several ways.
The parameters may be placed in registers or in memory locations, where they can be accessed
by the subroutine.
Alternatively, the parameters may be placed on the processor stack used for saving the return
address. The purpose of the subroutines is to add a list of numbers.
Instead of passing the actual list entries, the calling program passes the address of the first
number in the list. This technique is called passing by reference.
The second parameter is passed by value, that is, the actual number of entries, n, is passed to the
subroutine.
Instruction Format-

A standard machine which can be directly decoded and executed by the CPU is called instruction
format. It is a sequence of bits in a machine instruction that defines the layout of the instruction.
The format of instruction provides specific information to the CPU regarding the information to
be performed.

Instruction Format in Computer Organization

In terms of its basic pieces, instruction format explains the internal structures (layout design) of
the bits of an instruction.
An opcode must be there in an Instruction format, and the address is reliant on the availability of
specific operands.
The addressing mode for each operand is indicated by the format, which can be implicit or
explicit.
The creation of an Instruction format is a difficult task. There are a variety of design concerns
that affect instructional design, following are some of them:
Instruction length: The length of the instructions is a fundamental concern in the format design.
The longer the command, the longer the time it will take to retrieve it.
The Memory size: If we have to address a wider memory range, additional bits in the address
field will be necessary.
Memory organization: If the system supports virtual memory, the memory range that the
instruction must address is larger than the actual memory.
Memory transfer length: Instruction length should be equal to or multiples of the data bus
length.
Based on the type of CPU structure, instruction formats are divided into five categories. Based
on the availability of ALU operands, the CPU has three categories, for instance Single
Accumulator organization, General register organization, Stack organization.
Zero Address Instruction Format :

The address field in the instruction is not there in a stack-based computer. ALU operands are
only used on stack data in this organization. This means that both ALU operations must be
present in the stack at all times. As the destination, the same stack is used. Only one end of the
stack, generally referred to as the top of the stack, can be useful for inserting and deleting data.
So there is no need for an address in this format because the TOS becomes the default location.

One Address Instruction Format :

For data manipulation, we use an inferred ACCUMULATOR register. One of the ALU operands
is always present in the accumulator in this arrangement. The destination is the same
accumulator as the source. In the register or memory, another ALU operand is present. Because
there is only one accumulator in the CPU, it becomes the default position.

Two Address Instruction Formats :

This is a regular occurrence in commercial computers. The instruction can provide two addresses
in this scenario. Unlike in the past, when the result of a single address instruction was there in the
accumulator, the result can now be present in numerous locations rather than just accumulators.
However this requires a larger number of bits to represent the address. Two Address Instruction
Format is the computable instruction format for the register to memory reference CPU.
Three Address Instruction Formats :
This has three address fields, each of which can be useful to indicate a register or memory
location. The size of the programs written is significantly less, but the number of bits each
instruction is increasing. These instructions make program construction considerably easier. But
this does not imply that programs will run faster because each micro operation (changing the
content of a register, loading an address into the address bus, etc.) will take a single cycle.

Four Address Instruction Format :

This format includes an opcode for each of the four address fields. Because PC is a necessary
register in the CPU design, it is there to store the address of the next instruction. As a result, the
four-instruction format is no longer in use.

Processor -
CPU is the brain of the computer. All types of data processing operations and all the important
functions of a computer are performed by the CPU. It helps input and output devices to
communicate with each other and perform their respective operations. It also stores data which
is input, intermediate results in between processing, and instructions.
Now, the CPU consists of 3 major units, which are:
1. Memory or Storage Unit
2. Control Unit
3. ALU(Arithmetic Logic Unit)
Let us now look at the block diagram of the computer:

Bus Architecture-

A bus is a common pathway through which information flows from one component to another.
This pathway is used for communication purpose and can be established between two or more
computer components. We are going to review different computer bus architectures that are used
in computers.

Different Types of Computer Buses Functions of Buses in Computers The functions of buses can
be summarized as below:
1. Data sharing - All types of buses found on a computer must be able to transfer data between
the computer peripherals connected to it.
2 . The data is transferred in in either serial or parallel, which allows the exchange of 1, 2, 4 or
even 8 bytes of data at a time. (A byte is a group of 8 bits). Buses are classified depending on
how many bits they can move at the same time, which means that we have 8-bit, 16-bit, 32-bit or
even 64-bit buses.

Bus Type Description

A unidirectional pathway –
Address bus
information can only flow one way

A bi-directional pathway –
Data bus
information can flow in two directions

Carries the control and timing signals

Control bus needed to coordinate the activities of
the entire computer

Advantages
Versatility:
New devices can be
added easily.
Peripherals can be moved
between computer.
Low Cost:
A single set of wires is
shared in multiple ways.

3. Addressing - A bus has address lines, which match those of the processor. This
allows data to be sent to or from specific memory locations.
4. 3. Power - A bus supplies power to various peripherals that are connected to it. 4.
Timing - The bus provides a system clock signal to synchronize the peripherals attached
to it with the rest of the system. The expansion bus facilitates the easy connection of
additional components and devices on a computer for example the addition of a TV
card or sound card.
5. Expansion Bus Types These are some of the common expansion bus types that
have ever been used in computers:  ISA - Industry Standard Architecture 
6. EISA - Extended Industry Standard Architecture 
7. MCA - Micro Channel Architecture
 8.  VESA - Video Electronics Standards Association 
9. PCI - Peripheral Component Interconnect 
10. PCMCIA - Personal Computer Memory Card Industry Association (Also called
PC bus) 
AGP - Accelerated Graphics Port 

Instruction Cycle
A program residing in the memory unit of a computer consists of a sequence of instructions.
These instructions are executed by the processor by going through a cycle for each instruction.
In a basic computer, each instruction cycle consists of the following phases:
1. Fetch instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.
 Control Unit
Control Unit is the part of the computer’s central processing unit (CPU), which directs the
operation of the processor. It is the responsibility of the Control Unit to tell the computer’s
memory, arithmetic/logic unit and input and output devices how to respond to the instructions
that have been sent to the processor. It fetches internal instructions of the programs from the
main memory to the processor instruction register, and based on this register contents, the
control unit generates a control signal that supervises the execution of these instructions.
A control unit works by receiving input information to which it converts into control signals,
which are then sent to the central processor. The computer’s processor then tells the attached
hardware what operations to perform. The functions that a control unit performs are dependent
on the type of CPU because the architecture of CPU varies from manufacturer to manufacturer.
Examples of devices that require a CU are:
 Control Processing Units(CPUs)
 Graphics Processing Units(GPUs)

Sequence Control
Sequence control refers to user actions and computer logic that initiate, interrupt, or
terminate transactions. Sequence control governs the transition from one transaction to the
next.

Steps involved in Control Process

 Establishing standards and methods or ways to measure performance.
 Measuring actual performance.
 Determining if the performance matches with the standard.
 Taking corrective action and re-evaluating the standard.

There is a five-step procedure for controlling processes that will help you set, measure and tweak
your business activities—whether that's production, packaging, delivery or another business
process.

In a computer, the control unit often steps through the instruction cycle successively. This
consists of fetching the instruction, fetching the operands, decoding the instruction,
executing the instruction, and then writing the results back to memory.

Hardwired Control
The Hardwired Control organization involves the control logic to be implemented with gates,
flip-flops, decoders, and other digital circuits.
The following image shows the block diagram of a Hardwired Control organization.
 o A Hard-wired Control consists of two decoders, a sequence counter,
and a number of logic gates.
o An instruction fetched from the memory unit is placed in the
instruction register (IR).
o The component of an instruction register includes; I bit, the operation
code, and bits 0 through 11.
o The operation code in bits 12 through 14 are coded with a 3 x 8
decoder.
o The outputs of the decoder are designated by the symbols D0 through
D7.
o The operation code at bit 15 is transferred to a flip-flop designated by
the symbol I.
o The operation codes from Bits 0 through 11 are applied to the control
logic gates.
o The Sequence counter (SC) can count in binary from 0 through 15.

Micro-programmed Control
The Microprogrammed Control organization is implemented by using the
programming approach.
In Microprogrammed Control, the micro-operations are performed by
executing a program consisting of micro-instructions.
The following image shows the block diagram of a Microprogrammed Control
organization.
 o The Control memory address register specifies the address of the
micro-instruction.
o The Control memory is assumed to be a ROM, within which all control
information is permanently stored.
o The control register holds the microinstruction fetched from the
memory.
o The micro-instruction contains a control word that specifies one or
more micro-operations for the data processor.
o While the micro-operations are being executed, the next address is
computed in the next address generator circuit and then transferred
into the control address register to read the next microinstruction.
o The next address generator is often referred to as a micro-program
sequencer, as it determines the address sequence that is read from
control memory.

Microinstruction format

A microinstruction format includes 20 bits in total. They are divided into four elements as
displayed in the figure. F1, F2, F3 are the micro-operation fields. They determine micro-
operations for the computer. CD is the condition for branching.

A microinstruction format includes 20 bits in total. They are divided into four elements as
displayed in the figure.
F1, F2, F3 are the micro-operation fields. They determine micro-operations for the computer.
CD is the condition for branching. They choose the status bit conditions.
BR is the branch field. It determines the type of branch.
AD is the address field. It includes the address field whose length is 7 bits.
The micro-operations are divided into three fields of three bits each. These three bits can define
seven different micro-operations. In total there are 21 operations as displayed in the table.
Symbols with their Binary Code for Microinstruction Fields
Name: Code Symbol

000 None NOP

001 AC ← AC + DR ADD

010 AC ← 0 CLRAC

F1
 Name: Code Symbol

011 AC ← shl AC SHL

100 AC ← shr AC SHR

101 PC ← PC + 1 INCPC

110 PC ← AR ARTPC

111 DR(0 − 10) ← PC Reserved

As shown in the table, each microinstruction can have only three micro-operations, one from
each field. If it uses less than three, it will result in more than one operation using the no
operation binary code.
Condition Field
A condition field includes 2 bits. They are encoded to define four status bit conditions. As stated
in the table, the first condition is always a 1, with CD = 0. The symbol that can indicate this
condition is ‘U’. The table displays the multiple condition fields and their summary in an easy
manner.
Condition Field Symbols and Descriptions
Condition Symb Comments
ol

00 Always = U Unconditional Branch

1

01 DR (15) I Indirect address bit

 Condition Symb Comments
ol

10 AC (15) S Sign bit of AC

11 AC = 0 Z Zero value in AC

As shown in the table, when condition 00 is connected with BR (branch) field, it results in an
unconditional branch operation. Then the execution is read from memory the indirect bit I is
accessible from bit 15 of DR. The status of the next bit is supported by the AC sign bit. If all the
bits in AC are 1, then it is indicated as Z (its binary variable whose value is 1). The symbols U,
I, S, and Z can indicate status bits while writing microprograms.
Branch Field
The BR (branch) field includes 2 bits. It can be used by connecting with the AD (address) field.
The reason for connecting with the AD field is to select the address for the next
microinstruction. The table illustrates the various branch fields and their functions.
Branch Field Symbols and Descriptions
B Symb Comments
R ol

00 JMP CAR ←AD if condition = 1

CAR←CAR + 1 if condition = 0

01 CALL CAR ←AD , SBR ← CAR +1, if

condition = 1

CAR←CAR + 1 if condition = 0

10 RET CAR ←SBR (Return from

subroutine)

11 MAP CAR(2-5) ←DR(11-14), CAR(0,1,6)

←0

Subroutine Register (SBR).

As shown in the table, when BR = 00, a JMP operation is implemented and
when BR = 01, a subroutine is called. The only difference between the two
instructions is that when the microinstruction is saved, the return address is
saved in the Subroutine Register (SBR).
These two operations are dependent on the CD field values. When the status
bit condition of the CD field is defined as 1, the address that is next in order
is transferred to CAR. Else, it gets incremented. If the instruction needs to
return from the subroutine, its BR field is determined as 10.
This results in the transfer of the return address from SBR to CAR. The
opcode bits of instruction can be mapped with an address for CAR if
the BR field is 11. They are present in DR (11 - 14) after instruction is read
from memory. The last two conditions in the BR fields are not dependent on
the CD and AD field values.