Transformer Protection
Transformer Protection
T Section 8
Differential protection
8.1.1 Identification
M15074-1 v5
SYMBOL-BB V1 EN-US
SYMBOL-BB V1 EN-US
The Transformer differential protection is provided with internal CT ratio matching, vector group
compensation and settable zero sequence current elimination.
The function can be provided with up to six three-phase sets of current inputs if enough HW is available.
All current inputs are provided with percentage bias restraint features, making the IED suitable for two-
or three-winding transformer in multi-breaker station arrangements.
Two-winding applications
two-winding power
transformer
xx05000048.vsd
IEC05000048 V1 EN-US
two-winding power
transformer with
unconnected delta
xx05000049.vsd tertiary winding
IEC05000049 V1 EN-US
two-winding power
transformer with two
circuit breakers and
xx05000050.vsd two CT-sets on one
IEC05000050 V1 EN-US
side
two-winding power
transformer with two
circuit breakers and
two CT-sets on both
sides
xx05000051.vsd
IEC05000051 V1 EN-US
Three-winding applications
Table continues on next page
three-winding power
transformer with
all three windings
connected
xx05000052.vsd
IEC05000052 V1 EN-US
three-winding power
transformer with two
circuit breakers and
two CT-sets on one
side
xx05000053.vsd
IEC05000053 V1 EN-US
Autotransformer with
two circuit breakers
and two CT-sets on
two out of three sides
xx05000057.vsd
IEC05000057 V1 EN-US
The setting facilities cover the application of the differential protection to all types of power transformers
and auto-transformers with or without load tap changer as well as shunt reactors and local feeders within
the station. An adaptive stabilizing feature is included for heavy through-fault currents. By introducing
the load tap changer position, the differential protection pick-up can be set to optimum sensitivity thus
covering internal faults with low fault current level.
Stabilization is included for inrush and overexcitation currents respectively, cross-blocking is also
available. Adaptive stabilization is also included for system recovery inrush and CT saturation during
external faults. A high set unrestrained differential current protection element is included for a very high
speed tripping at high internal fault currents.
Included is an sensitive differential protection element based on the theory of negative sequence current
component. This element offers the best possible coverage of power transformer windings turn to turn
faults.
SEMOD54397-4 v5
T2WPDIF
I3PW1CT1* TRIP
I3PW1CT2* TRIPRES
I3PW2CT1* TRIPUNRE
I3PW2CT2* TRNSUNR
TAPOLTC1 TRNSSENS
OLTC1AL START
BLOCK STL1
BLKRES STL2
BLKUNRES STL3
BLKNSUNR BLK2H
BLKNSSEN BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
BLKWAV
BLKWAVL1
BLKWAVL2
BLKWAVL3
IDALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
IEC06000249_2_en.vsd
IEC06000249 V2 EN-US
T3WPDIF
I3PW1CT1* TRIP
I3PW1CT2* TRIPRES
I3PW2CT1* TRIPUNRE
I3PW2CT2* TRNSUNR
I3PW3CT1* TRNSSENS
I3PW3CT2* START
TAPOLTC1 STL1
TAPOLTC2 STL2
OLTC1AL STL3
OLTC2AL BLK2H
BLOCK BLK2HL1
BLKRES BLK2HL2
BLKUNRES BLK2HL3
BLKNSUNR BLK5H
BLKNSSEN BLK5HL1
BLK5HL2
BLK5HL3
BLKWAV
BLKWAVL1
BLKWAVL2
BLKWAVL3
IDALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
IEC06000250_2_en.vsd
IEC06000250 V2 EN-US
8.1.4 Signals
PID-6758-INPUTSIGNALS v1
8.1.5 Settings
PID-6758-SETTINGS v1
The main CTs are normally supposed to be star connected. The main CTs can be earthed in anyway
(that is, either "ToObject" or "FromObject"). However internally the differential function will always
use reference directions towards the protected transformer as shown in Figure 42. Thus the IED will
always internally measure the currents on all sides of the power transformer with the same reference
direction towards the power transformer windings as shown in Figure 42. For more information see the
Application manual.
IW1 IW2
Z1S1 Z1S2
E1S1 E1S2
IW1 IW2
IED
en05000186.vsd
IEC05000186 V1 EN-US
Even in a healthy power transformer, the currents are generally not equal when they flow through it.
This is due to the ratio of the number of turns of the windings and the connection group of the protected
transformer. Therefore the differential protection must first correlate all currents to each other before any
calculation can be performed.
First, compensation for the protected transformer transformation ratio and connection group is made,
and only then are the currents compared phase-wise. This makes external auxiliary (interposing) current
transformers unnecessary. Conversion of all currents to the common reference side of the power
transformer is performed by pre-programmed coefficient matrices, which depends on the protected
power transformer transformation ratio and connection group. Once the power transformer vector group,
rated currents and voltages have been entered by the user, the differential protection is capable to
calculate off-line matrix coefficients required in order to perform the on-line current comparison by
means of a fixed equation.
For all differential functions it is the common trip that is used to initiate a trip of a breaker. The
separate trip signals from the different parts lacks the safety against maloperation. This will
in some cases result in a 6 ms time difference between, for example restrained trip is issued
and common trip is issued. The separate trip signals are only used for information purpose of
which part that has caused the trip.
To make a differential IED as sensitive and stable as possible, restrained differential characteristics have
been developed and is now adopted as the general practice in the protection of power transformers.
The protection should be provided with a proportional bias, which makes the protection operate for a
certain percentage differential current related to the current through the transformer. This stabilizes the
protection under through fault conditions while still permitting the system to have good basic sensitivity.
The following chapters explain how these quantities are derived.
The fundamental frequency differential current is a vectorial sum (sum of fundamental frequency
phasors) of the individual phase currents from the different sides of the protected power transformer.
Before any differential current can be calculated, the power transformer phase shift, and its
transformation ratio, must be accounted for. Conversion of all currents to a common reference is
performed in two steps:
• all current phasors are phase-shifted to (referred to) the phase-reference side, (whenever possible the
first HV winding with star connection)
• all currents magnitudes are always referred to the first winding of the power transformer (typically
transformer high-voltage side)
The two steps of conversion are made simultaneously on-line by the pre-programmed coefficient
matrices, as shown in equation 3 for a two-winding power transformer, and in equation 4 for a three-
winding power transformer.
These are the internal compensation within the differential function. The protected power
transformer data is always entered per its nameplate. The Differential function will correlate
nameplate data and select proper reference windings.
1 2 3
EQUATION1880 V1 EN-US (Equation 3)
where:
1. is the resulting Differential Currents
2. is the current contribution from the W1 side
3. is the current contribution from the W2 side
1 2 3 4
EQUATION1556 V2 EN-US (Equation 4)
where:
1. is the resulting Differential Currents
2. is the current contribution from the W1 side
3. is the current contribution from the W2 side
4. is the current contribution from the W3 side
1. The Power transformer winding connection type, such as star (Y/y) or delta (D/d)
2. The Transformer vector group such as Yd1, Dy11, YNautod5, Yy0d5 and so on, which introduce
phase displacement between individual windings currents in multiples of 30°.
3. The Settings for elimination of zero sequence currents for the individual windings.
When the end user enters all these parameters, transformer differential function automatically calculates
the matrix coefficients. During this calculations the following rules are used:
For the phase reference, the first winding with set star (Y) connection is always used. For example, if
the power transformer is a Yd1 power transformer, the HV winding (Y) is taken as the phase reference
winding. If the power transformer is a Dy1, then the LV winding (y) is taken for the phase reference.
If there is no star connected winding, such as in Dd0 type of power transformers, then the HV delta
winding (D) is automatically chosen as the phase reference winding.
The fundamental frequency differential currents are in general composed of currents of all sequences,
that is, the positive-, the negative-, and the zero-sequence currents. If the zero-sequence currents are
eliminated (see section "Optional Elimination of zero sequence currents"), then the differential currents
can consist only of the positive-, and the negative-sequence currents. When the zero-sequence current
is subtracted on one side of the power transformer, then it is subtracted from each individual phase
current.
As it can be seen from equation 3 and equation 4 the first entered winding (W1) is always taken for
ampere level reference (current magnitudes from all other sides are always transferred to W1 side). In
other words, within the differential protection function, all differential currents and bias current are always
expressed in HV side primary Amperes.
It can be shown that the values of the matrix A, B & C coefficients (see equation 3 and equation 4) can
be pre-calculated in advance depending on the relative phase shift between the reference winding and
other power transformer windings.
Table 94 summarizes the values of the matrices for all standard phase shifts between windings.
Matrix with Zero Sequence Matrix with Zero Sequence Reduction set to Off
Reduction set to On
Matrix for Reference Winding
é 2 -1 -1ù é1 0 0 ù
1 ê
× -1 2 -1ú ê0 1 0 ú
3 ê ú ê ú
êë -1 -1 2 úû êë0 0 1 úû
EQUATION1227 V1 EN-US (Equation 5) EQUATION1228 V1 EN-US (Equation 6)
Matrix for winding with 30° Not applicable. Matrix on the left used.
lagging é1 -1 0ù
1
×ê 0 1 -1ú
3 ê ú
êë -1 0 1 úû
EQUATION1229 V1 EN-US (Equation 7)
Matrix for winding with 60°
lagging é1 -2 1ù é 0 -1 0 ù
1 ê
× 1 1 -2 ú ê 0 0 -1ú
3 ê ú ê ú
ëê -2 1 1 ûú êë -1 0 0 úû
EQUATION1230 V1 EN-US (Equation 8) EQUATION1231 V1 EN-US (Equation 9)
Matrix for winding with 90° Not applicable. Matrix on the left used.
lagging é 0 -1 1 ù
1
× ê 1 0 -1ú
3 ê ú
êë -1 1 0 úû
EQUATION1232 V1 EN-US (Equation 10)
Matrix for winding with 120°
lagging é -1 -1 2 ù é0 0 1 ù
1 ê
× 2 -1 -1ú ê1 0 0 ú
3 ê ú ê ú
êë -1 2 -1úû êë0 1 0 úû
EQUATION1233 V1 EN-US (Equation 11) EQUATION1234 V1 EN-US (Equation 12)
Matrix for winding with 150° Not applicable. Matrix on the left used.
lagging é-1 0 1 ù
1
× ê 1 -1 0 ú
3 ê ú
ëê 0 1 -1ûú
EQUATION1235 V1 EN-US (Equation 13)
Matrix for winding which is in
opposite phase é -2 1 1ù é -1 0 0 ù
1 ê
× 1 -2 1 ú ê 0 -1 0 ú
3 ê ú ê ú
êë 1 1 -2 úû êë 0 0 -1úû
EQUATION1236 V1 EN-US (Equation 14) EQUATION1237 V1 EN-US (Equation 15)
Table continues on next page
Matrix with Zero Sequence Matrix with Zero Sequence Reduction set to Off
Reduction set to On
Matrix for winding with 150° Not applicable. Matrix on the left used.
leading é-1 1 0 ù
1 ê
× 0 -1 1 ú
3 ê ú
êë 1 0 -1úû
EQUATION1238 V1 EN-US (Equation 16)
Matrix for winding with 120°
leading é -1 2 -1ù é0 1 0 ù
1 ê
× -1 -1 2 ú ê0 0 1 ú
3 ê ú ê ú
êë 2 -1 -1úû êë1 0 0 úû
EQUATION1239 V1 EN-US (Equation 17) EQUATION1240 V1 EN-US (Equation 18)
Matrix for winding with 90° Not applicable. Matrix on the left used.
leading é 0 1 -1ù
1 ê
× -1 0 1 ú
3 ê ú
êë 1 -1 0 úû
EQUATION1241 V1 EN-US (Equation 19)
Matrix for winding with 60°
leading é1 1 -2 ù é 0 0 -1ù
1 ê ê -1 0 0 ú
× -2 1 1ú
3 ê ú ê ú
êë 1 -2 1 úû êë 0 -1 0 úû
EQUATION1242 V1 EN-US (Equation 20) EQUATION1243 V1 EN-US (Equation 21)
Matrix for winding with 30° Not applicable. Matrix on the left used.
leading é1 0 -1ù
1
× ê -1 1 0ú
3 ê ú
êë 0 -1 1 úû
EQUATION1244 V1 EN-US (Equation 22)
By using this table complete equation for calculation of fundamental frequency differential currents for
two winding power transformer with YNd5 vector group and enabled zero sequence current reduction on
HV side will be derived. From the given power transformer vector group the following is possible to be
concluded:
1. The HV star (Y) connected winding will be used as the reference winding and zero sequence
currents shall be subtracted on that side
2. The LV winding is lagging for 150°
With the help of table 94, the following matrix equation can be written for this power transformer:
where:
IDL1 is the fundamental frequency differential current in phase L1 (in W1 side primary
amperes)
IDL2 is the fundamental frequency differential current in phase L2 (in W1 side primary
amperes)
IDL3 is the fundamental frequency differential current in phase L3 (in W1 side primary
amperes)
IL1_W1 is the fundamental frequency phase current in phase L1 on the W1 side
Table continues on next page
As marked in equation 3 and equation 4, the first term on the right hand side of the equation, represents
the total contribution from the individual phase currents from the W1 side to the fundamental frequency
differential currents, compensated for eventual power transformer phase shift. The second term on the
right hand side of the equation, represents the total contribution from the individual phase currents
from the W2 side to the fundamental frequency differential currents, compensated for eventual power
transformer phase shift and transferred to the power transformer W1 side. The third term on the right
hand side of the equation, represents the total contribution from the individual phase currents from the
W3 side to the fundamental frequency differential currents, compensated for eventual power transformer
phase shift and transferred to the power transformer W1 side. These current contributions are important,
because they are used for calculation of common bias current.
The fundamental frequency differential currents are the "usual" differential currents, the magnitudes
which are applied in a phase-wise manner to the operate - restrain characteristic of the differential
protection. The magnitudes of the differential currents can be read as service values from the function
and they are available as outputs IDL1MAG, IDL2MAG, IDL3MAG from the differential protection
function block. Thus they can be connected to the disturbance recorder and automatically recorded
during any external or internal fault condition.
A load tap changer is a mechanical device, which is used to step-wise change number of turns within
one power transformer winding. Consequently the power transformer overall turns ratio is changed.
Typically the load tap changer is located within the HV winding (that is, winding 1, W1) of the power
transformer. By operating load tap changer, it is possible to step-wise regulate voltage on the LV side
of the power transformer. However at the same time the differential protection for power transformer
becomes unbalanced. Differential function in the IED has built-in feature to continuously monitor the load
tap changer position and dynamically compensate on-line for changes in power transformer turns ratio.
Differential currents are calculated as shown in equation and equation . By setting parameters, the
winding location of the OLTC is defined. Also, the voltage change of each step. Thus, if for example the
load tap changer is located within winding 1 the no-load voltage Vn_W1 will be treated as a function
of the actual load tap changer position in equation and equation . Thus for every load tap changer
position a corresponding value for Ur_W1 will be calculated and used in the above mentioned equations.
By doing this, complete on-line compensation for load tap changer movement is achieved. Differential
protection will be ideally balanced for every load tap changer position and no false differential current will
appear irrespective of actual load tap changer position.
Typically the minimum differential protection pickup for power transformer with load tap changer is set
between 30% to 40%. However with this load tap changer compensation feature it is possible to set the
differential protection in the IED more sensitive with a pickup value of 15% to 20%.
Load tap changer position is measured within the IED by Tap changer control and supervision,
(TCLYLTC). Within this function block, the load tap changer position value is continuously monitored
to insure its integrity.
When any error in the load tap changer position is detected an alarm is given. This signal shall be
connected to the OLTCxAL input of the differential function block. While OLTCxAL input has a logical
value of one the differential protection minimum pickup, originally defined by setting parameter IdMin,
will be increased by the set range of the load tap changer. Alternatively the differential current alarm
feature can be used to alarm for any problems in the whole load tap changer compensation chain.
• two-winding differential protection in the IED can on-line compensate for one load tap changer within
the protected power transformer
• three-winding differential protection in the IED can on-line compensate for up to two load tap changers
within the protected power transformer
Fundamental frequency differential current level is monitored all the time within the differential function.
As soon as all three fundamental frequency differential currents are above the set threshold defined
by setting parameter IDiffAlarm a delay on pickup timer is started. When the pre-set time, defined
by setting parameter tAlarmDelay, has expired the differential current alarm is generated and output
signal IDALARM is set to logical value one. This feature can be effectively used to provide alarm when
load tap changer position compensation is used and something in the whole compensation chain goes
wrong. This alarm can be as well used with some additional IED configuration logic to desensitize the
differential function.
The bias current is calculated as the highest current amongst all individual winding current contributions
to the total fundamental frequency differential currents, as shown in equation and equation . All
individual winding current contributions are already referred to the power transformer winding one
side (power transformer HV winding) and therefore they can be compared regarding their magnitudes.
There are six (or nine in the case of a three-winding transformer) contributions to the total fundamental
differential currents, which are the candidates for the common bias current. The highest individual
current contribution is taken as a common bias (restrain) current for all three phases. This "maximum
principle" makes the differential protection more secure, with less risk to operate for external faults and
in the same time brings more meaning to the breakpoint settings of the operate - restrain characteristic.
It shall be noted that if the zero-sequence currents are subtracted from the separate contributions to
the total differential current, then the zero-sequence component is automatically eliminated from the bias
current as well. This ensures that for secondary injection from just one power transformer side the bias
current is always equal to the highest differential current regardless of the fault type. During normal
through-load operation of the power transformer, the bias current is equal to the maximum load current
from two (three) -power transformer windings.
The magnitudes of the common bias (restrain) current expressed in HV side amperes can be read as
service value from the function. At the same time it is available as an output IBIAS from the differential
protection function block. It can be connected to the disturbance recorder and automatically recorded
during any external or internal fault condition.
For application with so called "T" configuration, that is, two restraint CT inputs from one side of the
protected power transformer, such as in the case of breaker-and-a-half schemes the primary CT ratings
can be much higher than the rating of the protected power transformer. In order to determine the bias
current for such T configuration, the two separate currents flowing in the T-side are scaled down to
the protected power transform level by means of additional settings. This is done in order to prevent
unwanted de-sensitizing of the overall differential protection. In addition to that, the resultant currents
(the sum of two currents) into the protected power transformer winding, which is not directly measured is
calculated, and included in the common bias calculation. The rest of the bias calculation procedure is the
same as in protection schemes without breaker-and-a-half arrangements.
To avoid unwanted trips for external earth-faults, the zero sequence currents should be subtracted on
the side of the protected power transformer, where the zero sequence currents can flow at external earth
-faults.
The zero sequence currents can be explicitly eliminated from the differential currents and common bias
current calculation by special, dedicated parameter settings, which are available for every individual
winding.
• the protected power transformer cannot transform the zero sequence currents to the other side.
• the zero sequence currents can only flow on one side of the protected power transformer.
In most cases, power transformers do not properly transform the zero sequence current to the other
side. A typical example is a power transformer of the star-delta type, for example YNd1. Transformers
of this type do not transform the zero sequence quantities, but zero sequence currents can flow in the
earthed star- connected winding. In such cases, an external earth-fault on the star-side causes zero
sequence current to flow on the star-side of the power transformer, but not on the other side. This results
in false differential currents - consisting exclusively of the zero sequence currents. If high enough, these
false differential currents can cause an unwanted disconnection of the healthy power transformer. They
must therefore be subtracted from the fundamental frequency differential currents if an unwanted trip is
to be avoided.
For delta windings this feature shall be enabled only if an earthing transformer exists within the
differential zone on the delta side of the protected power transformer.
Removing the zero sequence current from the differential currents decreases to some extent the
sensitivity of the differential protection for internal earth -faults. In order to counteract this effect to
some degree, the zero sequence current is subtracted not only from the three fundamental frequency
differential currents, but from the bias current as well.
The power transformer differential protection function uses two limits, to which actual magnitudes of the
three fundamental frequency differential currents are compared at each execution of the function.
The unrestrained (that is, non-stabilized, "instantaneous") part of the differential protection is used for
very high differential currents, where it should be beyond any doubt, that the fault is internal. This
settable limit is constant and not proportional to the bias current. Neither harmonic, nor any other
restrain is applied to this limit, which is therefore allowed to trip the power transformer instantaneously.
The restrained (stabilized) part of the differential protection compares the calculated fundamental
differential (operating) currents and the bias (restrain) current, by applying them to the operate - restrain
characteristic. Practically, the magnitudes of the individual fundamental frequency differential currents
are compared with an adaptive limit. This limit is adaptive because it is dependent on the bias (that is,
restrain) current magnitude. This limit is called the operate - restrain characteristic. It is represented by
a double-slope, double-breakpoint characteristic, as shown in figure 43. The restrained characteristic is
determined by the following 5 settings:
1. IdMin (Sensitivity in section 1, multiple of trans. HV side rated current set under the parameter
RatedCurrentW1)
2. EndSection1 (End of section 1, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)
3. EndSection2 (End of section 2, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)
4. SlopeSection2 (Slope in section 2, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)
5. SlopeSection3 (Slope in section 2, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)
For three-winding transformer, if the HV winding is not the one with highest power rating, the parameters
of operate-bias characteristic (Idmin, EndSection1 and EndSection2) will be adapted by multiplying a
scale factor Smax/S1 so that the winding with highest power rating is taken into account. Smax and S1
can be calculated from the rated voltage and current for each winding.
1. IdMin
2. EndSection1
3. EndSection2
4. SlopeSection2
5. SlopeSection3
operate current
[ times IBase ]
Operate
5
unconditionally
UnrestrainedLimit
4
Operate
3
conditionally
2
Section 1 Section 2 Section 3
SlopeSection3
1
IdMin
SlopeSection2 Restrain
0
0 1 2 3 4 5
en05000187-2.vsd
IEC05000187 V2 EN-US
Figure 43: Description of the restrained, and the unrestrained operate characteristics
where:
The operate - restrain characteristic is tailor-made and can be designed freely by the user after his
needs. The default characteristic is recommended to be used. It gives good results in a majority of
applications. The operate - restrain characteristic has in principle three sections with a section-wise
proportionality of the operate value to the bias (restrain) current. The reset ratio is in all parts of the
characteristic equal to 0.95.
Section 1: This is the most sensitive part on the characteristic. In section 1, normal currents flow
through the protected circuit and its current transformers, and risk for higher false differential currents
is relatively low. An un-compensated on-load tap-changer is a typical reason for existence of the false
differential currents in this section. The slope in section 1 is always zero percent.
Section 2: In section 2, a certain minor slope is introduced which is supposed to cope with false
differential currents proportional to higher than normal currents through the current transformers.
Section 3: The more pronounced slope in section 3 is designed to result in a higher tolerance to
substantial current transformer saturation at high through-fault currents, which may be expected in this
section.
The operate - restrain characteristic should be designed so that it can be expected that:
• for internal faults, the operate (differential) currents are always with a good margin above the operate -
restrain characteristic
• for external faults, the false (spurious) operate currents are with a good margin below the operate -
restrain characteristic
The differential protection can be temporarily desensitized by applying the adaptive DC biasing method.
When the external fault is detected, this adaptive DC biasing method will temporarily shift the operate-
bias characteristic by adding DC components to the operate level IdMin. The DC component is extracted
online form the instantaneous differential currents and the highest DC in all three phases is selected to
be added to IdMin. This feature improves the security of the differential function against the CT errors
during heavy external faults followed by CT saturation. The adaptive DC biasing will be reset if either of
the conditions below is fulfilled:
• The external fault signal disappears and no DC components exist in the phase currents.
• The differential currents become higher than the bias current.
Existence of relatively high negative sequence currents is in itself a proof of a disturbance on the
power system, possibly a fault in the protected power transformer. The negative-sequence currents are
a measurable indication of an abnormal condition, similar to the zero sequence current. One of the
several advantages of the negative sequence currents compared to the zero sequence currents is that
they provide coverage for phase-to-phase and power transformer turn-to-turn faults. Theoretically, the
negative sequence currents do not exist during symmetrical three-phase faults, however they do appear
during initial stage of such faults for a long enough time (in most cases) for the IED to make the proper
decision. Further, the negative sequence currents are not stopped at a power transformer by the Yd, or
Dy connection type. The negative sequence currents are always properly transformed to the other side
of any power transformer for any external disturbance. Finally, the negative sequence currents are not
affected by symmetrical through-load currents.
For power transformer differential protection applications, the negative sequence based differential
currents are calculated by using exactly the same matrix equations, which are used to calculate the
traditional phase-wise fundamental frequency differential currents. The same equation shall be fed
by the negative sequence currents from the two power transformer sides instead of individual phase
currents, as shown in matrix equation 25 for a case of two-winding, YNd5 power transformer.
1 2 3
where:
1. is the Negative Sequence Differential Currents
2. is the Negative Sequence current contribution from the W1 side
3. is the Negative Sequence current contribution from the W2 side
and where:
IDL1_NS is the negative sequence differential current in phase L1 (in
W1 side primary amperes)
IDL2_NS is the negative sequence differential current in phase L2 (in
W1 side primary amperes)
IDL3_NS is the negative sequence differential current in phase L3 (in
W1 side primary amperes)
INS_W1 is the negative sequence current on the W1 side in primary
amperes (phase L1 reference)
INS_W2 is the negative sequence current on the W2 side in primary
amperes (phase L1 reference)
Ur_W1 is the transformer rated phase-to-phase voltage on the W1
side (setting parameter)
Ur_W2 is the transformer rated phase-to-phase voltage on W2 side
(setting parameter)
j ×120
o 1 3
a=e =- + j×
2 2
EQUATION1248 V1 EN-US (Equation 26)
Because the negative sequence currents always form the symmetrical three phase current system on
each transformer side (that is, negative sequence currents in every phase will always have the same
magnitude and be phase displaced for 120 electrical degrees from each other), it is only necessary to
calculate the first negative sequence differential current that is, IDL1_NS.
As marked in equation 25, the first term on the right hand side of the equation, represents the total
contribution of the negative sequence current from the W1 side compensated for eventual power
transformer phase shift. The second term on the right hand side of the equation, represents the
total contribution of the negative sequence current from the W2 side compensated for eventual power
transformer phase shift and transferred to the power transformer W1 side. These negative sequence
current contributions are phasors, which are further used in directional comparisons, to characterize a
fault as internal or external. See section "Internal/external fault discriminator" for more information.
The magnitudes of the negative sequence differential current expressed in the HV side A can be
read as service values from the function. In the same time it is available as outputs IDNSMAG from
the differential protection function block. Thus, it can be connected to the disturbance recorder and
automatically recorded during any external or internal fault condition.
The internal/external fault discriminator is a very powerful and reliable supplementary criterion to the
traditional differential protection. It is recommended that this feature shall be always used (that is, On)
when protecting three-phase power transformers. The internal/external fault discriminator detects even
minor faults, with a high sensitivity and at high speed, and at the same time discriminates with a high
degree of dependability between internal and external faults.
The internal/external fault discriminator responds to the magnitudes and the relative phase angles of
the negative-sequence fault currents at the different windings of the protected power transformer. The
negative sequence fault currents must first be referred to the same phase reference side, and put to the
same magnitude reference. This is done by the matrix expression (see equation ).
Operation of the internal/external fault discriminator is based on the relative position of the two phasors
representing the winding one (W1) and winding two (W2) negative sequence current contributions,
respectively, defined by expression shown in equation . It performs a directional comparison between
these two phasors. First, the LV side phasor is referred to the HV side (W1 side): both the magnitude,
and the phase position are referred to the HV (W1 side). Then the relative phase displacement between
the two negative sequence current phasors is calculated. In case of three-winding power transformers,
a little more complex algorithm is applied, with two directional tests. The overall directional characteristic
of the internal/external fault discriminator is shown in figure 44, where the directional characteristic is
defined by two setting parameters:
1. IMinNegSeq
2. NegSeqROA
90 deg
120 deg
If one or the Internal/external
other of fault boundary
currents is too
low, then no
measurement
NegSeqROA
is done, and
(Relay
120 degrees
Operate
is mapped
Angle)
IMinNegSeq
External Internal
fault fault
region region
In order to perform directional comparison of the two phasors their magnitudes must be high enough
so that one can be sure that they are due to a fault. On the other hand, in order to guarantee a good
sensitivity of the internal/external fault discriminator, the value of this minimum limit must not be too high.
Therefore this limit value, called IminNegSeq, is settable in the range of 0.02 to 0.20 times the IBase
of the power transformer winding one. The default value is 0.04. Note that, in order to enhance stability
at higher fault currents, the relatively very low threshold value IminNegSeq is dynamically increased at
currents higher than normal currents: if the bias current is higher than 110% of IBase ,then 10% of the
bias current is added to the IminNegSeq. Only if the magnitudes of both negative sequence current
contributions are above the actual limit, the relative position between these two phasors is checked.
If either of the negative sequence current contributions, which should be compared, is too small (less
than the set value for IminNegSeq), no directional comparison is made in order to avoid the possibility
to produce a wrong decision. This magnitude check guarantees stability of the algorithm, when the
power transformer is energized. The setting NegSeqROA represents the Relay Operate Angle, which
determines the boundary between the internal and external fault regions. It can be selected in a range
from ±30 degrees to ±90 degrees, with a step of 0.1 degree. The default value is ±60 degrees. The
default setting ±60 degree favours security in comparison to dependability.
If the above condition concerning magnitudes is fulfilled, the internal/external fault discriminator
compares the relative phase angle between the negative sequence current contributions from W1 and
W2 sides of the power transformer using the following two rules:
• If the negative sequence current contributions from the W1 and the W2 sides are in phase, the fault is
internal (that is, both phasors are within protected zone)
• If the negative sequence currents contributions from W1 and W2 sides are 180 degrees out of phase,
the fault is external (that is, W1 phasors is outside protected zone)
For example, for any unsymmetrical external fault, ideally the respective negative sequence current
contributions from the W1 and W2 power transformer sides will be exactly 180 degrees apart
and equal in magnitude, regardless the power transformer turns ratio and phase displacement. An
example is shown in figure 45, which shows trajectories of the two separate phasors representing
the negative sequence current contributions from the HV and LV sides of an Yd5 power transformer
(after compensation of the transformer turns ratio and phase displacement) by using equation ) for an
unsymmetrical external fault. Observe that the relative phase angle between these two phasors is 180
electrical degrees at any point in time. No current transformer saturation was assumed for this case.
"steady state"
for HV side 90
neg. seq. phasor
60
150 30
10
ms
180 0
0.1 kA
0.2 kA
0.3 kA
10 0.4 kA
ms
210 330
"steady state"
240 for LV side
270 neg. seq. phasor
en05000189.vsd
IEC05000189 V1 EN-US
Figure 45: Trajectories of Negative Sequence Current Contributions from HV and LV sides of Yd5 power transformer during
external fault
Under external fault conditions, the relative angle is theoretically equal to 180 degrees. During internal
faults, the angle shall ideally be 0 degrees, but due to possible different negative sequence source
impedance angles on the W1 and W2 sides of the protected power transformer, it may differ somewhat
from the ideal zero value. However, during heavy faults, CT saturation might cause the measured phase
angle to differ from 180 degrees for an external, and from 0 degrees for an internal fault. See figure 46
for an example of a heavy internal fault with transient CT saturation.
Dire ctiona l Compa ris on Crite rion: Inte rna l fa ult a s s e e n from the HV s ide
90
e xcurs ion
120 60
from 0 de gre e s
35 ms due to CT
s a tura tion
150 30
de finite ly
a n inte rna l
fa ult
180 0
trip c o mmand
in 12 ms
e xte rna l
fa ult Inte rna l fa ult
0.5 kA de cla re d 7 ms
re gion
210 330 a fte r inte rna l
fa ult occure d
1.0 kA
240 300
1.5 kA
270
HV s ide contribution to the tota l ne ga tive s e que nce diffe re ntia l curre nt in kA
Dire ctiona l limit (within the re gion de limite d by ± 60 de gre e s is inte rna l fa ult)
en05000190.vsd
IEC05000190 V1 EN-US
Figure 46: Operation of the internal/external fault discriminator for internal fault with CT saturation
It shall be noted that additional security measures are implemented in the internal/external fault
discriminator algorithm in order to guarantee proper operation with heavily saturated current
transformers. The trustworthy information on whether a fault is internal or external is typically obtained in
about 10ms after the fault inception, depending on the setting IminNegSeq, and the magnitudes of the
fault currents. During heavy faults, approximately 5ms time to full saturation of the main CT is sufficient
in order to produce a correct discrimination between internal and external faults.
Two sub functions, which are based on the internal/external fault discriminator with the ability to trip a
faulty power transformer, are parts of the traditional power transformer differential protection.
The unrestrained negative sequence protection is activated if one or more start signals have been set
by the traditional differential protection algorithm. This happens because one or more of the fundamental
frequency differential currents entered the operate region on the operate - restrain characteristic. So, this
protection is not independent of the traditional restrained differential protection - it is activated after the
first start signal has been placed.
If the same fault has been positively recognized as internal, then the unrestrained negative sequence
differential protection places its own trip request.
Any block signals by the harmonic and/or waveform criteria, which can block the traditional differential
protection are overridden, and the differential protection operates quickly without any further delay.
This logic guarantees a fast disconnection of a faulty power transformer for any internal fault.
If the same fault has been classified as external, then generally, but not unconditionally, a trip command
is prevented. If a fault is classified as external, further analysis of the fault conditions is initiated. If
all the instantaneous differential currents in phases where start signals have been issued are free of
harmonic pollution, then a (minor) internal fault, simultaneous with a predominant external fault can be
suspected. This conclusion can be drawn because at external faults, major false differential currents
can only exist when one or more current transformers saturate. In this case, the false instantaneous
differential currents are polluted by higher harmonic components, the 2nd, the 5th etc.
The sensitive, negative sequence current based turn-to-turn fault protection detects the low level faults,
which are not detected by the traditional differential protection until they develop into more severe
faults, including power transformer iron core. The sensitive protection is independent from the traditional
differential protection and is a very good complement to it. The essential part of this sensitive protection
is the internal/external fault discriminator. In order to be activated, the sensitive protection requires no
start signal from the traditional power transformer biased differential protection. If magnitudes of HV and
LV negative sequence current contributions are above the set limit for IminNegSeq, then their relative
positions are determined. If the disturbance is characterized as an internal fault, then a separate trip
request will be placed. Any decision on the way to the final trip request must be confirmed several times
in succession in order to cope with eventual CT transients. This causes a short additional operating time
delay due to this security count. For very low level turn-to-turn faults the overall response time of this
protection is about 30ms.
The instantaneous differential currents are calculated from the instantaneous values of the input currents
in order to perform the harmonic analysis and waveform analysis upon each one of them (see section
"Harmonic and waveform block criteria" for more information).
The instantaneous differential currents are calculated using the same matrix expression as shown in
equation and equation . The same matrices A, B and C are used for these calculations. The only
difference is that the matrix algorithm is fed by instantaneous values of currents, that is, samples.
The two block criteria are the harmonic restrain and the waveform restrain. These two criteria have the
power to block a trip command by the traditional differential protection, which produces start signals by
applying the differential currents, and the bias current, to the operate - restrain characteristic.
The harmonic restrain is the classical restrain method traditionally used with power transformer
differential protections. The goal is to prevent an unwanted trip command due to magnetizing inrush
currents at switching operations, or due to magnetizing currents at over-voltages.
The magnetizing currents of a power transformer flow only on one side of the power transformer and
are therefore always the cause of false differential currents. The harmonic analysis (the 2nd and the 5th
harmonic) is applied to the instantaneous differential currents. Typical instantaneous differential currents
during power transformer energizing are shown in figure 47. The harmonic analysis is only applied in
those phases where start signals have been set. For example, if the content of the 2nd harmonic in the
instantaneous differential current of phase L1 is above the setting I2/I1Ratio, then a block signal is set
for that phase, which can be read as BLK2HL1 output of the differential protection.
After the transformer has been energized (the energizing period has elapsed and the inrush currents
have disappeared), the 2nd harmonic blocking is conditionally activated if NegSeqDiffEn is set to On.
When the fault cannot be identified as internal or external, the 2nd harmonic blocking signal is activated
only if the differential current is smaller than the bias current. If the differential current becomes equal to
or higher than the bias current, the differential function will be released regardless of the 2 nd harmonic
blocking signal.
The 2nd harmonic analysis always supervises the restrained differential criterion if
NegSeqDiffEn is set to Off.
The waveform restrain criterion is a good complement to the harmonic analysis. The waveform restrain
is a pattern recognition algorithm, which looks for intervals within each fundamental power system
cycle with low instantaneous differential current. This interval is often called current gap in protection
literature. However, within differential function this criterion actually searches for long-lasting intervals
with low rate-of-change in instantaneous differential current, which are typical for the power transformer
inrush currents. Block signals BLKWAVLx are set in those phases where such behavior is detected.
The algorithm does not require any end user settings. The waveform algorithm is automatically adapted
dependent only on the power transformer rated data.
IEC05000343 V1 EN-US
Figure 47: Inrush currents to a transformer as seen by a protective IED. Typical is a high amount of the 2 nd harmonic, and
intervals of low current, and low rate-of-change of current within each period.
The basic definition of the cross-blocking is that one of the three phases can block operation (that
is, tripping) of the other two phases due to the harmonic pollution of the differential current in that
phase (that is, waveform, 2nd or 5th harmonic content). In differential algorithm the user can control the
cross-blocking between the phases via the setting parameter CrossBlockEn=On.
When parameter CrossBlockEn=On cross blocking between phases is introduced. There is no time
settings involved, but the phase with the operating point above the set bias characteristic (in the
operate region) will be able to cross-block the other two phases if it is itself blocked by any of the
previously explained restrained criteria. As soon as the operating point for this phase is below the set
bias characteristic (that is, in the restrain region) cross blocking from that phase will be inhibited. In this
way cross-blocking of a temporary nature is achieved. It should be noted that this is the default setting
value for this parameter.
When parameter CrossBlockEn=Off, any cross blocking between phases will be disabled. It is
recommended to use the value Off with caution in order to avoid the unwanted tripping during initial
energizing of the power transformer.
The transformer differential function has a built-in, advanced switch onto fault feature. This feature
can be enabled or disabled by a setting parameter SOTFMode. When enabled this feature ensures
quick differential protection tripping in cases where a transformer is energized with an internal fault
(for example, forgotten earthing on transformer LV side). Operation of this feature is based on the
fact that a current gap (term current gap is explained under waveblock feature above) will exist within
the first power system cycle when healthy power transformer is energized. If this is not the case the
waveblock criterion will reset quickly. This quick reset of the waveblock criterion will temporarily disable
the second harmonic blocking feature of the differential protection function. This consequently ensures
fast operation of the transformer differential function for a switch onto a fault condition. It shall be noted
that this feature is only active during initial power transformer energizing, under the first 4 cycles, 80 ms
for 50Hz and 66.7 ms for 60Hz. When the switch onto fault feature is disabled by the setting parameter
SOTFMode, the waveblock and second harmonic blocking features work in parallel and are completely
independent from each other.
A sudden inadvertently opened CT circuit may cause an unexpected and unwanted operation of the
Transformer differential protection under normal load conditions. Damage of secondary equipment may
occur due to high voltage from open CT circuit outputs. It is always an advantage, from the point of view
of security and reliability, to have the open CT detection function to block the transformer differential
protection function in case of an open CT condition, and produce an alarm signal to the operational
personnel to quickly correct the open CT condition.
The built-in open CT feature can be enabled or disabled by the setting parameter OpenCTEnable (Off/
On). When enabled, this feature tries to prevent mal-operation when a loaded main CT connected to
Transformer differential protection is by mistake open circuited on the secondary side. Note that this
feature can only detect interruption of one CT phase current at a time. If two or even all three-phase
currents of one set of CTs are accidentally interrupted at precisely the same time, this feature cannot
operate. Transformer differential protection generates a trip signal if the false differential current is
sufficiently high. An open CT circuit is typically detected in 12–14 ms, and if the load in the protected
circuit is relatively high, about the nominal load, the unwanted trip cannot always be prevented. Still, the
information about what was the cause of the open CT secondary circuit, is vital.
The principle applied to detect an open CT is a simple pattern recognition method, similar to the
waveform check used by the Power transformer differential protection in order to detect the magnetizing
inrush condition. The open CT detection principle is based on the fact that for an open CT, the current
in the phase with the open CT suddenly drops to zero (that is, as seen by the protection), while the
currents of the other two phases continue as before.
The open CT function is supposed to detect an open CT under normal conditions, that is, with the
protected multi-terminal circuit under normal load (10...110% of the rated load). If the load currents are
very low or zero, the open CT condition cannot be detected. In addition to load condition requirement,
Open CT function also checks the differential current on faulty phase. If the differential current is lower
than 50% of IdMin, the open CT condition cannot be detected. Therefore, the Open CT algorithm only
detects an open CT if the load on the power transformer is 10...110% of rated load and the differential
current is higher than 50% of IdMin on that phase. The search for an open CT starts 60 seconds (50
seconds in 60 Hz systems) after the transformer is energized. The Open CT detection feature can also
be explicitly deactivated by setting: OpenCTEnable = 0 ( Off).
If an open CT is detected and the output OPENCT set to 1, then all the differential functions are
blocked, except the unrestrained (instantaneous) differential. An alarm signal is also produced after
a settable delay (tOCTAlarmDelay) to report to operational personnel for quick remedy actions once
the open CT is detected. When the open CT condition is removed (that is, the previously open CT is
reconnected), the functions remain blocked for a specified interval of time, which is also defined by a
setting (tOCTResetDelay). This is to prevent an eventual mal-operation after the reconnection of the
previously open CT secondary circuit.
The open CT algorithm provides detailed information about the location of the defective CT secondary
circuit. The algorithm clearly indicates the IED side, CT input and phase in which an open CT condition
has been detected. These indications are provided via the following outputs from the Transformer
differential protection function:
1. Output OPENCT provides instant information to indicate that an open CT circuit has been detected.
2. Output OPENCTAL provides a time-delayed alarm that the open CT circuit has been detected. Time
delay is defined by the parameter tOCTAlarmDelay.
3. Integer output OPENCTIN provides information on the local HMI regarding which open CT circuit
has been detected (1=CT input No 1; 2=CT input No 2).
4. Integer output OPENCTPH provides information on the local HMI regarding in which phase an open
CT circuit has been detected (1=Phase L1; 2= Phase L2; 3= Phase L3).
Once the open CT condition is declared, the algorithm stops to search for further open CT circuits. It
waits until the first open CT circuit has been corrected. Note that once the open CT condition has been
detected, it can be reset automatically within the differential function. It is not possible to externally reset
an open CT condition. To reset the open CT circuit alarm automatically, the following conditions must be
fulfilled:
If an open CT has been detected in a separate group of three CTs, the algorithm is reset either when the
missing current returns to the normal value, or when all three currents become zero. After the reset, the
open CT detection algorithm starts again to search for open CT circuits within the protected zone.
The simplified internal logics, for transformer differential protection are shown in the following figures.
IDL2
individual windings
Open CT logic on W2 side
phase current
IDL1MAG
Fundamental frequency (phasor
based) Diff current, phase L1 &
ratio
IDL2MAG
Fundamental frequency (phasor
based) Diff current, phase L2 &
phase current contributions from
individual windings
IDL3MAG
Fundamental frequency (phasor
based) Diff current, phase L3 &
phase current contributions from
individual windings
MAX IBIAS
en06000554-3-en.vsd
IEC06000544 V3 EN-US
Figure 48: Treatment of measured currents within IED for transformer differential function
Figure 48 shows how internal treatment of measured currents is done in case of a two-winding
transformer.
The following currents are inputs used in the power transformer differential protection function. They
must all be expressed in power system (primary) A.
1. Instantaneous values of currents (samples) from the HV, and LV sides for two-winding power
transformers, and from the HV, the first LV, and the second LV side for three-winding power
transformers.
2. Currents from all power transformer sides expressed as fundamental frequency phasors with their
real and imaginary parts. These currents are calculated within the protection function by the
fundamental frequency Fourier filters.
3. Negative sequence currents from all power transformer sides expressed as phasors. These currents
are calculated within the protection function by the symmetrical components module.
1. Calculates three fundamental frequency differential currents and one common bias current. The
zero-sequence component can optionally be eliminated from each of the three fundamental
frequency differential currents and at the same time from the common bias current.
2. Calculates three instantaneous differential currents. They are used for harmonic, and waveform
analysis. Instantaneous differential currents are useful for post-fault analysis using disturbance
recording
3. Calculates negative-sequence differential current. Contributions to it from both (all three) power
transformer sides are used by the internal/external fault discriminator to detect and classify a fault as
internal or external.
BLKUNRES
IdUnre a TRIPUNREL1
b>a AND
b
IDL1MAG
IBIAS STL1
AND
BLOCK
BLKRES
TRIPRESL1
AND
OR 1
IDL1
to fault logic
2nd BLK2HL1
Switch on
Harmonic
Wave BLKWAVL1
block
5th BLK5HL1
Harmonic
Cross Block
Cross Block to L2 or L3
from L2 or L3 AND
OR
AND
OpCrossBlock=On
en06000545.vsd
IEC06000545 V1 EN-US
Figure 49: Transformer differential protection simplified logic diagram for Phase L1
Internal/ extFault
Neg.Seq. Diff External intFault
Current Fault
Contributions discrimin ≈60-80 ms
ator TRNSSENS
t
OpNegSeqDiff=On
2s
IBIAS t AND
a
150 % a>b S
b blk2h
R
a
110 % a≤ b
b
OpenCT
STL1
AND
STL2
OR
STL3
IEC05000167-TIFF V3 EN-US
Figure 50: Transformer differential protection simplified logic diagram for external/internal fault discriminator
TRIPRESL1
TRIPRESL2 TRIPRES
OR
TRIPRESL3
TRIPUNREL1
TRIPUNREL2 TRIPUNRE
OR
TRIPUNREL3
TRIP
TRNSSENS OR
TRNSUNR
en05000278.vsd
IEC05000278 V1 EN-US
STL1
STL2 START
OR
STL3
BLK2HL1
BLK2HL2 BLK2H
OR
BLK2HL3
blk2h
BLK5HL1
BLK5HL2 BLK5H
OR
BLK5HL3
BLKWAVL1
BLKWAVL2 BLKWAV
OR
BLKWAVL3
IEC05000279-TIFF V3 EN-US
1. The three fundamental frequency differential currents are applied in a phase-wise manner to two
limits. The first limit is the operate-restrain characteristic, while the other is the high-set unrestrained
limit. If the first limit is exceeded, a start signal START is set. If the unrestrained limit is exceeded, an
immediate unrestrained trip TRIPUNRE and common trip TRIP are issued.
2. If a start signal is issued in a phase the harmonic and the waveform block signals are checked. Only
a start signal, which is free of all of its block signals can result in a trip command. If the cross-block
logic scheme is applied, then only if all phases with set start signal are free of their respective block
signals, a restrained trip TRIPRES and common trip TRIP are issued
3. If a start signal is issued in a phase, and the fault has been classified as internal, then any eventual
block signals are overridden and unrestrained negative-sequence trip TRNSUNR and common trip
TRIP are issued without any further delay. This feature is called the unrestrained negative-sequence
protection 110% bias.
4. The sensitive negative sequence differential protection is independent of any start signals. It is
meant to detect smaller internal faults such as turn-to-turn faults, which are often not detected
by the traditional differential protection. The sensitive negative sequence differential protection
starts whenever both contributions to the total negative sequence differential current (that must
be compared by the internal/external fault discriminator) are higher than the value of the setting
IMinNegSeq. If a fault is positively recognized as internal, and the condition is stable with no
interruption for at least one fundamental frequency cycle the sensitive negative sequence differential
protection TRNSSENS and common trip TRIP are issued. This feature is called the sensitive
negative sequence differential protection.
5. If a start signal is issued in a phase (see signal STL1), even if the fault has been classified as
an external fault, the instantaneous differential current of that phase (see signal IDL1) is analyzed
for the 2nd and the 5th harmonic contents (see the blocks with the text inside: 2nd Harmonic;
Wave block and 5th Harmonic). If there is less harmonic pollution. than allowed by the settings
I2/I1Ratio, and I5/I1Ratio, (then the outputs from the blocks 2nd harmonic and 5th harmonic is 0)
then it is assumed that a minor simultaneous internal fault must have occurred. Only under these
conditions a trip command is allowed (the signal TRIPRESL1 is = 1). The cross-block logic scheme
is automatically applied under such circumstances. (This means that the cross block signals from
the other two phases L2 and L3 is not activated to obtain a trip on the TRIPRESL1 output signal in
figure 49)
6. All start and blocking conditions are available as phase segregated as well as common (that is
three-phase) signals.
IDL1 MAG
a
a>b
I Diff Alarm b
IDL3 MAG
a
a>b
I Diff Alarm b
en06000546.vsd
IEC06000546 V1 EN-US
M13046-1 v16
SYMBOL-CC V2 EN-US
High impedance differential protection, single phase (HZPDIF) functions can be used when the involved
CT cores have the same turns ratio and similar magnetizing characteristics. It utilizes an external CT
secondary current summation by wiring. Actually all CT secondary circuits which are involved in the
differential scheme are connected in parallel. External series resistor, and a voltage dependent resistor
which are both mounted externally to the IED, are also required.
The external resistor unit shall be ordered under "" in the Product Guide.
HZPDIF can be used to protect tee-feeders or busbars, reactors, motors, auto-transformers, capacitor
banks and so on. One such function block is used for a high-impedance restricted earth fault protection.
Three such function blocks are used to form three-phase, phase-segregated differential protection.