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IEEE TRANSACTIONS ON ELECTRON DEVICES 1

A -Shaped Gate Design for Reducing

Hot-Electron Generation in GaN HEMTs
Alvaro D. Latorre-Rey , Member, IEEE , John D. Albrecht , Member, IEEE ,
and Marco Saraniti , Senior Member, IEEE

Abstract — The use of a
-shaped gate structure is traps by means of dehydrogenation of Ga vacancies and N
proposed for GaN HEMTs, which effectively reduces the antisites that act as precursors [3], [10].
hot-electron generation under all regimes of operation, The generation of hot electrons, and the associated degra-
while preserving device performance well into the lower
millimeter-wave frequency range. Simulations under dc dation induced by it, depends on aspects, such as the carrier
and large-signal RF conditions of the proposed
-gate concentration, the electric field profile, the temperature of
device, along with the corresponding electron energy dis- operation, and even the buffer compensation species [11].
tribution functions, were obtained with a full-band cellular In this sense, the two main strategies to prevent electrons
Monte Carlo device simulator self-consistently coupled to from becoming hot consist in either reducing the peak electric
a harmonic-balance circuit solver and compared with the
simulations of a typical Tgate HEMT whose dc curves were field in the device or increasing the energy loss of electrons
calibrated to experimental data. Our results show that the through scattering. Practically all the technologies developed
peak hot-carrier generation obtained with an asymmetric- so far to increase reliability focus on decreasing the peak

-gate is up to 41%, 44%, and 75% lower at dc and in Class electric field. To this end, shifting the gate placement toward
AB mode at 10 GHz and 40 GHz, respectively, as compared the source contact has been adopted as a standard layout for
with that observed with the comparable Tgate devices.
This new gate structure suggests that significantly higher GaN HEMTs. However, this strategy is limited by the higher
reliability against hot-electron-induced device damage can access region resistance that degrades dc performance [12].
be achieved with modest impacts on performance. A more advanced technique consists in the smoothing and
Index Terms — GaN, HEMTs, hot electrons, Monte Carlo spreading of the electric field distribution throughout the
methods, reliability. device by means of field-plate (FP) structures [13], [14] that
have been adopted as the standard technology to enhance the
breakdown voltage (BV). However, since the FP designs result
I. I NTRODUCTION
in higher gate-to-drain capacitance, this technology is pre-

T HE superior electrical and thermal properties of GaN-

based HEMTs have enabled their path in the field of
high-frequency power amplifiers (PAs). However, reliability
dominantly used in devices for power switching and wireless
(low frequency) applications [15]. Furthermore, recent studies
have shown that field-plated devices are still susceptible to
issues are still object of concern and active research [1], [2]. hot-electron-induced degradation when operated under hard-
In particular, hot-electron effects have been associated with switching conditions typical in boost power converters [16].
the degradation of dc performance, such as reduced maximum For microwave applications, the use of a dual-gate (cas-
drain current IDS , transconductance G m [3], [4], as well as code) HEMT was proposed to simultaneously achieve high
threshold voltage VTh shifts [5]. Furthermore, studies have frequency and high BV [17], [18]. This technology provides
shown that under large-signal RF operation, HEMTs are also higher linear gain and maximum oscillation frequency fMAX ,
susceptible to hot-electron-induced degradation [6]–[9]. Under as well as lower feedback capacitance and high output resis-
typical operating conditions, devices are subjected to high tance that allow for broadband tuning, at the expense of
peak electric fields that accelerate electrons, making them reducing the cutoff frequency f t and adding a more complex
gain high kinetic energy. When the energy is larger than an contact padding and biasing circuitry [15], [19]. In terms of
activation threshold, electrons can create electrically active reliability, cascode HEMTs perform marginally better under
Manuscript received June 4, 2018; revised July 25, 2018; accepted RF stress as compared to single-Tgate devices [20]. Even
July 30, 2018. This work was supported in part by the Air Force Office of though recent studies have relied on gate contact layout
Scientific Research under Grant FA9550-16-1-0406 and in part by the Air engineering to improve electrical device performance [21],
Force Research Laboratory under Grant FA8650-14-1-7418. The review
of this paper was arranged by Editor K. J. Chen. (Corresponding author: decrease microwave noise [22], and achieve normally-OFF
Alvaro D. Latorre-Rey.) operation [23], as of this writing no efforts have been directed
A. D. Latorre-Rey and M. Saraniti are with the Department of Electrical to reduce hot-carrier generation and mitigate its effects by
Engineering, Arizona State University, Tempe, AZ 85281 USA (e-mail:
latorre.usb@gmail.com). engineering the gate contact interface geometry in order to
J. D. Albrecht is with the Department of Electrical and Computer enhance the inelastic scattering in the channel instead of
Engineering, Michigan State University, East Lansing, MI 48824 USA. reducing the peak electric field, thus preserving performance.
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. With the aim of improving the reliability of GaN HEMTs
Digital Object Identifier 10.1109/TED.2018.2863746 by reducing the hot-electron generation while preserving the

0018-9383 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
 This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.
2 IEEE TRANSACTIONS ON ELECTRON DEVICES

dc and RF performance, a -shaped single-gate structure

is proposed as an alternative to traditional Tgate contacts.
The concept is demonstrated with the simulations of the dc,
small-signal ac, and large-signal RF characteristics performed
using a full-band Cellular Monte Carlo (CMC) particle-based
device simulator [24] self-consistently coupled to a harmonic-
balance (HB) circuit solver [25]. The results are compared
to simulations of a GaN HEMT device with a typical Tgate
contact, whose model was calibrated to the experimental I –V
curves of a device fabricated in a MMIC process flow similar
to the one reported by Fitch et al. [26]. The principles of
operation of the proposed -gate contact are explained in
terms of relevant physical quantities, such as carrier veloc- Fig. 1. Experimental Tgate HEMT showing (a) device layout as well as
ity, carrier concentration, scattering, as well as electric field dc curves of (b) output and (c) transfer characteristics, where the symbols
distribution throughout the device, whereas design rules and correspond to experimental data and solid lines to the simulated CMC
model.
projections of small-signal ac parameters are discussed to
facilitate the design and fabrication of the proposed -gate
a high density 2-D electron gas (2DEG) at the AlN/GaN inter-
contact geometry. The description of the highly nonlinear, non-
face [33]. For the large-signal RF simulations, it is necessary
equilibrium carrier dynamics captured by our CMC particle-
to include the effect of a varying ac signal of large amplitude
based simulator allows us to assess the impact of the gate
applied to the gate in addition to the dc bias point (VGS −VDS ).
layout on hot-carrier generation by means of the accurate
This is done by updating the bias of the input signal quasi-
simulation of the electron energy distribution function (EDF)
statically every Poisson time step τps and calculating the
under both dc and large-signal RF operation under the load and
resulting electric field distribution, effectively emulating an
drive conditions relevant for experiments [27]. The significant
ac source. Moreover, for the correct simulation of Class AB
reduction of the hot-carrier distribution observed with a -gate
PAs, it is necessary to include the effect of the external load
contact under all operating conditions suggests improved reli-
as well as the high Q input and output matching network
ability of the proposed device.
circuitry or IMN and OMN, respectively. These conditions are
accurately captured within our simulation framework by self-
II. S IMULATION S ETUP AND HEMT consistently coupling the CMC device simulator with an HB
M ODEL C ALIBRATION circuit solver. Details of the implementation of the software
can be found in previous work [25], [27].
The generation of hot electrons in a device can be accurately
With the aim of establishing a baseline device for design and
studied in terms of the carrier EDF, calculated under relevant
evaluation of the proposed -gate device concept, first a CMC
operating conditions [10], [27]. In this sense, device simulators
simulation model is developed for an experimental HEMT
based on the Monte Carlo techniques are inherently well-suited
with typical Tgate contact. It consists of an AlGaN/AlN/GaN
for the task because they provide a highly accurate solution
HEMT on SiC, as shown in Fig. 1(a), with a T-shaped gate
of the Boltzmann transport equation, which is precisely the
contact with length L G = 140 nm, stem height h = 120 nm,
EDF [28]. For this reason, in this paper, all simulations are
and access regions L GS = 930 nm and L GD = 1930 nm for
performed with our CMC simulator [24]. Within the CMC
a total device length of L DS = 3 μm. The CMC simulation
framework, the carrier dynamics is modeled by tracking carri-
model of the Tgate was validated with experimental dc data of
ers in the first Brillouin zone using an inhomogeneous tensor-
the output (IDS –VDS ) and transfer (IDS –VGS ) characteristics,
product grid for each band, considering scattering processes
as shown in Fig.1(b) and (c), respectively, showing excellent
due to deformation potential phonon, ionized impurities,
agreement at low gate voltage VGS , where the drain current IDS
piezoelectric (polar acoustic) phonons, polar optical phonons,
is small. However, since self-heating effects are not included,
impact ionization, and thread dislocations. The electronic full-
for high values of VGS , the current is overestimated for IDS >
band structure is obtained by means of an empirical nonlocal
0.8 A/mm as it has been reported [34], [35].
pseudopotential method with material parameters calibrated
for Wurtzite GaN [29], whereas the full phonon dispersion is
III. P ERFORMANCE OF -G ATED HEMT S
computed with the volume-shell approach [30].
The device domain in real space is simulated by a particle- A. Principles of Operation
based dynamic kernel self-consistently coupled with a 2-D In order to reduce the hot-electron generation while preserv-
multigrid Poisson solver [31], where the geometry of the ing device performance, it is necessary to enhance the transfer
device is described by an inhomogeneous tensor-product grid. of energy from electrons into the lattice by increasing the
The polarization-induced charge due to the high polarization number of electron–phonon scattering events while keeping
discontinuity across heterojunction interfaces is calculated a high peak electric field. This requires a higher concentration
following Ambacher’s formalism [32] and placed as charge of carriers as well as longer transit times under the gate,
sheet layers at the appropriate heterointerfaces, effectively allowing for a higher rate of total scattering which reduces the
reproducing the charge distribution inside the device, creating energy of the electrons. Such conditions can be achieved with a
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LATORRE-REY et al.: -SHAPED GATE DESIGN FOR REDUCING HOT-ELECTRON GENERATION IN GAN HEMTs 3

Fig. 2. Device layout of the proposed Π-gate contact along with design
rules.

Fig. 4. Close-up under the gate of the profile along the channel of
(a) conduction band EC , (b) concentration of electrons, and (c) total
scattering. Curve (i) shows the experimental Tgate HEMT (d = 0), while
the proposed Π-gate HEMT with spacer length d = 100 nm is studied for
two cases of asymmetric stems with curves (ii) LG1 = 40 nm < LG2 =
100 nm and (iii) LG1 = 100 nm > LG2 = 40 nm. The solid bars in
(a) represent the lengths and location of the metallurgical gate contacts.

and the proposed -gate HEMT with symmetric stems so that

L G1 = L G2 = L G /2 = 70 nm, considering the effect of three
different spacer lengths d = 40 nm, 100 nm, and 160 nm.
From Fig. 3(a), it can be seen that splitting the gate
contact into two stems produces a step in the E C profile of
Fig. 3. Close-up under the gate of the profile along the channel of the -gated devices with respect to the Tgate HEMT. This
(a) conduction band EC , (b) concentration of electrons, and (c) total in turn increases the concentration of electrons under the
scattering for the experimental Tgate HEMT (d = 0) and the proposed -gate contact, as shown in Fig. 3(b). While the height of
Π-gate HEMT with symmetric stems LG1 = LG2 = LG /2 = 70 nm,
considering the effect of three different spacer lengths d = 40 nm, the step in E C is independent of the length d, the region with
100 nm, and 160 nm. The solid bars in (a) represent the lengths and higher concentration of electrons is directly proportional to the
location of the metallurgical gate contacts. spacer between the stems. Furthermore, increasing d allows for
longer transit times of electrons under the gate, yielding longer
-shaped gate contact, as shown in Fig. 2, which is formed by regions with more scattering under the -gate, as shown in
basically splitting the Tgate L G in two stems L G1 and L G2 Fig. 3(c). In addition, by making L G1 and L G2 shorter than
and adding a spacer region with length d while keeping the L G of the Tgate, the -gate contact reduces the extension of
access region dimensions (L SG and L GD ) and the epitaxial the region with high electric field on the drain side of the gate
stack constant. As indicated in Fig. 2, the space in between depleted of carriers where there is nearly no scattering, also
the stems is filled with dielectric which in this case is SiN. shown in Fig. 3(c). Concerning the effective reduction in the
This gate layout effectively reduces the hot-electron gen- generation of hot carriers, it arises from having more electrons
eration by changing the transport of electrons under the under the -gate undergoing more scattering, which enables
gate, and it can be explained in terms of the microscopic a higher transfer of energy from the electrons into the lattice.
physical quantities presented in Fig. 3(a)–(c) that shows a The discussed mechanisms to reduce the generation of
close-up under the gate of the profile along the channel of hot electrons can be further enhanced with a -gate contact
the conduction band E C , the electron concentration, and the designed with asymmetric stems so that L G1 >= L G2 . This
total scattering, respectively. It must be noted that the curves is shown in Fig. 4(a)–(c) that presents a close-up under the
in Fig. 3 correspond to the experimental Tgate HEMT (d = 0) gate of the profile along the channel of E C , the electron
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4 IEEE TRANSACTIONS ON ELECTRON DEVICES

concentration, and the total scattering, in that order. In Fig. 4,

the curves identified as (i) correspond to the experimental
Tgate HEMT. The proposed -gate HEMT is studied for two
cases of asymmetric stems identified as (ii) with L G1 = 40 nm
< L G2 = 100 nm and (iii) with L G1 = 100 nm > L G2 =
40 nm. The spacer length was kept constant at d = 100 nm
for both cases.
From Fig. 4(a), it can be seen that the height of the step in
E C depends on the length of the stems, and it is maximized
with design (iii) corresponding to the case L G1 >= L G2 .
In addition, making the stem of the gate contact closer to the Fig. 5. DC curves showing (a) output and (b) transfer (along with Gm )
drain L G2 , the shortest one, significantly reduces the region on characteristics for simulated Tgate and Asymmetric-Π-gate devices.
Experimental data correspond to the experimental Tgate device.
the drain side of the gate depleted of electrons and with low
scattering, as shown in Fig. 4(b) and (c), respectively, in turn
reducing the generation of hot electrons. The correct design
of the asymmetric--gate requires L G1 >= L G2 because thermalize, which increases L DS while keeping L SG and L GD
having L G1 < L G2 does not produce a significant change constant, and (r.iii) the stem in the spacer region is filled with
in the E C , and the modulation of the carrier concentration dielectric, SiN in this case, and its height h can be optimized
and total scattering is small with respect to the Tgate HEMT, to reduce the added gate capacitance and facilitate fabrication.
as evidenced by case (ii) in Fig. 4. Furthermore, if L G2 was
designed to be the longest stem, then the region depleted of
B. DC, Small-Signal AC, and Large-Signal
carriers on the drain side of the gate does not decrease and
RF Operation
the total scattering remains low in a long extension under the
gate contact, which is ineffective in transferring energy from The -gate design chosen for comparison to the exper-
electrons into the lattice, keeping it below the activation energy imental Tgate consists of an asymmetric contact with
of traps. L G1 = 100 nm, L G2 = 40 nm, d = 100 nm, and h = 120 nm,
It must be noticed that for all the cases considered of devices whereas the other dimensions and epitaxial stack were kept as
with a -gate, the electric field is reshaped only under the gate in Fig. 2. This layout will be used for a full simulation study
contact, whereas the peak electric field is the same as that of under both dc and large-signal RF operation. First, the results
the Tgate. This is evidenced by the fact that all E C curves in of the dc characteristics for the Asymmetric--gate, along
Fig. 3(a) for the symmetric case and Fig. 4(a) for the asym- with the experimental and simulated data of the Tgate device,
metric case have the same slope on the drain side of the gate. are shown in Fig. 5(a) and (b) corresponding to the IDS –VDS
This is achieved by keeping the length L GD constant, which and IDS –VGS curves, respectively. From Fig. 5, it can be seen
is the key to preserving the device performance. In terms of that the proposed device preserves dc performance throughout
fabrication, the -gate contact is compatible with the two- the operating range. In terms of the transfer characteristic
step electron-beam lithography process [36], [37], where the in Fig. 5(b), the threshold voltage VTh of the -gate and
foot print (now formed by two stems instead of one) is defined the Tgate devices remains constant, while there is a ∼4%
separately from the head. In case the process should be limited reduction of IDS due to the increased channel resistance added
to single patterning, then the self-aligned dielectrically defined by the spacer length d. From the output characteristic in
optical Tgate process [38] is also available, and advanced Fig. 5(a), a reduction of ∼4% in IDS is also observed at low
structures can be implemented to improve the alignment [39]. VDS , whereas at high VDS , the current decreases ∼10% in this
Furthermore, should the spacer be in the sub-80-nm scale, case due to a barrier added under the gate that is modulated
then self-aligned double patterning can be used to fabricate by the two stems of the -gate.
the proposed contact [40]. By means of small-signal ac simulations, the experimental
In summary, the operation of the -gate contact can be cutoff frequency ft = 109 GHz and maximum oscillation
interpreted as accelerating electrons in a two-step process, frequency f MAX = 234 GHz were determined. In addition,
where the carriers are allowed to lose energy or thermalize in Fig. 6 shows the effect on f t and f MAX of the symmet-
between the steps. This prevents the carriers form gaining high ric and asymmetric--gate contacts as a function of spacer
levels of kinetic energy and becoming hot. The enhanced reli- region length d. As the length d increases, both parameters
ability of the device is achieved by reducing the concentration decrease due to the added distributed gate capacitance. The
of electrons with kinetic energy above the activation energy symmetric case shows better performance than the asym-
for trap generation. From these principles of operation, design metric layout for f t with 19% and 32% reduction with
rules for the -shaped gate contact, also shown in Fig. 2, d = 160 nm, respectively, whereas fMAX decreases up to
can be derived as follows: (r.i) the gate length L G is split in 40% for both layouts, showing nearly no reduction at short d
two stems of lengths L G1 and L G2 , which can be symmetric for the Asym--gate. Varying the stem height h in the spacer
(Sym: L G1 = L G2 ) or asymmetric (Asym: L G1 > L G2 ), (r.ii) from 120 nm to 50 nm produces the same trend with a slight
the two stems are separated by a spacer region with length d, improvement for the symmetric case of nearly 5% higher f t
designed to be long enough to allow electrons to scatter and and f MAX than the asymmetric case at d = 100 nm.
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LATORRE-REY et al.: -SHAPED GATE DESIGN FOR REDUCING HOT-ELECTRON GENERATION IN GAN HEMTs 5

Fig. 6. Small-Signal ac parameters (a) ft and (b) fMAX as a function of

spacer region length d for Tgate (d = 0), Sym (LG1 = LG2 = 70 nm),
and Asym-Π-gate (LG1 = 100 nm, LG2 = 40 nm) at two Stem heights h.

Fig. 8. Close-up of the profile along the channel of (a) conduction band
EC and (b) x-component of electron velocity for Tgate and Asym-Π-gate
devices.

of the electron velocity in the channel, as shown in Fig. 8(b),

which translates into lower drain current. Since FPs reduce
short-channel effects by reshaping the peak electric field [13],
a field-plated -gate design could be optimized for enhanced
BV by combining the effects of an additional barrier and
reshaping of the peak electric field.

Fig. 7. PA characterization under Class AB (RF) operation, showing IV. R EDUCED H OT-E LECTRON G ENERATION
(a) dynamic load lines for Pin = 12 dBm at freq = 10 GHz along with
IDS –VDS curves and (b) Pout , Gain, and PAE for freq = 10 GHz and The generation of hot carriers is studied through the accurate
40 GHz with ZLoad = 100 Ω. simulation of the electron EDF under both dc and large-signal
RF operation. Since the concentration of high-energy electrons
is several orders of magnitude lower than that of thermalized
The RF characterization was performed for a PA in Class carriers, i.e., low-energy electrons located near or at the bottom
AB topology at frequencies in the X- and K -bands of f req = of the conduction band, obtaining accurate EDFs by means of
10 GHz and 40 GHz, respectively, with a large-signal operat- Monte Carlo techniques requires long simulation times and a
ing point (LSOP) of VGS = −3 V and VDS = 18 V with a high number of superparticles in order to increase the statistics
tuned-load Z Load = 100  for both the Tgate and the Asym- at high energies and achieve high resolution. In addition, it is
-gate devices. Fig. 7(a) shows the dynamic load lines at important to choose a region in the device, where there is
12 dBm for f req = 10 GHz, and since it presents the same a significant amount of carriers undergoing high acceleration.
excursion for both devices, it is demonstrated that the Asym- In this sense, for all our simulations, the EDFs were calculated
-gate device offers the same power rating of the experimental with an ensemble of 8 × 104 superparticles during 100 ps of
Tgate. Moreover, the typical figures of merit shown in Fig. 7(b) simulation time, updating the electric field distribution every
indicate a 14% higher power added efficiency for the Asym- time step of the Poisson solver τps = 1.5 fs. The region was
-gate at low Pin as compared to the Tgate due to the lower defined on the drain side of the gate extending vertically from
dc drain current at the LSOP measured at V D S−L S O P , which the AlN barrier to the bottom of the buffer, where the electric
reduces the dc power. It must be noticed that the Asym--gate field and the concentration of electrons reach peak values. The
device exhibits stronger electrostatic control than the Tgate, resulting EDFs are plotted on a semilog scale, where the 0-eV
evidenced by lower drain current at low VGS as the drain energy corresponds to the top of the valence band.
voltage increases. In particular, Fig. 7(a) shows that for low By comparing the distributions obtained with the typical
VGS = −3 V, the current IDS at high VDS = 30 V of the Tgate HEMT and the proposed -gate device, the reduced
Asym--gate is 44% lower than that of the Tgate, which can generation of hot electrons is identified as a lower EDF. In this
be explained by the modulation of the conduction band under regard, recent studies have shown that hot electrons can induce
the -gate added with the two stems. trap generation by means of dehydrogenation of N-antisites
This effect is shown in Fig. 8(a) that presents a close- and Ga vacancies with associated activation energies of E a =
up under the gate of the profile along the channel of E C , 2.1 eV and 2.7 eV, respectively [5], [10]. Therefore, in terms
where it can be seen that not only E C is stepped but also of reliability, the reduced hot-electron generation shown in this
for high VDS , an extra barrier is added under the -gate paper is of particular relevance for carriers with energy above
region, while the peak electric field remains constant in both E a values, which within our simulation framework correspond
devices as indicated by the slope of E C for both curves. The to EDFs in the energy range of E > 5.5 eV or E > E a +
additional barrier under the -gate reduces the x-component E BandGap = 2.1 eV + 3.4 eV = 5.5 eV.
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6 IEEE TRANSACTIONS ON ELECTRON DEVICES

Fig. 9. Electron EDF for the dc bias points (1) and (2) shown in Fig. 7(a)
for Tgate and asymmetric-Π-gate devices. Fig. 10. Close-up of the profile along the channel of x-component of
(a) electric field and (b) electron velocity for Tgate (lines) and Asym-Π-
gate (lines with symbols) at dc bias point (1) from Fig. 7. Solid bars in
A. Energy Distribution Under DC Operation (a) show the metallurgical gate contacts for each device.
Under dc operation, or static electric field, the stationary
EDFs were built for bias points (1) and (2), as indicated
in Fig. 7(a), which correspond to the peak dc power of the
dynamic load lines at 10 GHz for Pin = 6 dBm and 12 dBm,
respectively. Fig. 9 presents the resulting EDFs for both Tgate
and proposed Asym--gate layouts, showing that the peak
generation of hot carriers, evidenced by the large tail of high-
energy electrons, including the transfer to satellite valleys at
5.5 eV, corresponds to bias point (1), where the moderate
current and high electric field are simultaneously present.
However, for the Asym--gate, the peak EDF is 19% lower
than that of the Tgate for energies between 4 eV and 5.5 eV,
approaching a 32% reduction in the range of 5.5 eV <
E < 6.5 eV and reaching its maximum reduction of 41% for
E > 6.5 eV. For bias point (2), where VGS is positive and the
drain current is high, the EDF decreases for both layouts due to
lower lateral electric field. Under this condition as well, known
as the ON-state, the -gate outperforms its Tgate counterpart
in terms of the electron distribution, being 7% lower for
4 eV < E < 5.5 eV, 20% lower in 5.5 eV < E < 6.5 eV,
and 35% smaller for E > 6.5 eV. These results suggest that Fig. 11. Electron EDF under RF Class AB operation at X-band 10 GHz
for (a) Pout = 21 dBm and (b) Pout = 29 dBm.
improved reliability can be achieved with a -shaped gate
contact because a lower concentration of hot electrons with
B. Energy Distribution Under RF Operation
E > E a = 5.5 eV results in lower generation of electrically
active traps. While under dc simulations, the electric field distribution
The reduction of the EDF observed with the Asym--gate and current in the device do not vary over time, in RF
device is due to the higher concentration of carriers under the operation, these are dynamically changing due to the ac
-gate that undergo more scattering, as a result of the stepped signal. Nevertheless, EDFs can still be studied under RF
conduction band profile. The stepped E C reshapes the electric conditions [27]. To this end, simulations were run for 200 ps
field profile along the channel only under the -gate contact, of RF signal updating the electric field distribution every
as shown in Fig. 10(a), while the peak electric field remains τps . The dynamic EDFs were built during the last 100 ps
constant with respect to that of the Tgate, thus preserving the of the simulation by updating the distributions every τps and
dc and RF performance. The increased scattering results in normalizing to the number of iterations. Therefore, EDFs
overall lower kinetic energy or velocity, as shown in Fig. 10(b). under RF comprise the full excursion of the dynamic load
The improved reliability arises from the lower number of lines as those shown in Fig. 7(a) by accounting for changes
carriers with energy higher than E a as compared to the Tgate in electric field and current in the device every τps due to
device. This effect is directly proportional to the spacer length the RF signal, thus capturing the nonlinear response of the
d that increases the transit time at the expense of degrading device associated with the frequency and amplitude of the
small-signal ac performance while preserving the dc and input signal and the effect it has on the generation of hot
large-signal RF rating. This effect is also observed but to a electrons.
lesser extent with symmetrical -gates and also with lower Fig. 11(a) and (b) presents the resulting EDFs for Pout
stem heights h, which can be advantageous for fabrication. of 21 dBm and 29 dBm, respectively, calculated for Class
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LATORRE-REY et al.: -SHAPED GATE DESIGN FOR REDUCING HOT-ELECTRON GENERATION IN GAN HEMTs 7

the distribution is observed with the Asym--gate being 50%

and 75% lower than the Tgate’s EDF for 6 eV < E <7.5 eV
and E > 7.5 eV, respectively. The EDFs obtained in all
regimes of operation show a significant reduction of electrons
with energy E > E a = 5.5 eV, suggesting the Asym--gate
contact improves robustness to failures from the generation of
traps in GaN HEMTs [10].

V. C ONCLUSION
A new -shaped gate contact was proposed for improved
reliability of GaN HEMTs in terms of reduced hot-electron
generation under all regimes of operation while preserving
device performance. The device concept was demonstrated
by the Monte Carlo simulations and compared to simulations
of an experimental Tgate device whose model was calibrated
to measured dc data of the I –V curves. Principles of
operation were discussed and used to derive design rules,
which along with projections of ac parameters f t and f MAX
Fig. 12. Electron EDF under RF Class AB operation at K-band 40 GHz
for (a) Pout = 21 dBm and (b) Pout = 29 dBm. were presented as guidelines for design and fabrication.
From simulations of the electron EDF under both dc and
AB topology at freq = 10 GHz, keeping the LSOP and large-signal RF operation, it was shown that under the same
Z Load constant for both the Tgate and Asym--gate layouts. operating conditions, the peak hot-carrier generation obtained
As compared to the Tgate at 21 dBm, the Asym--gate with an Asymm--gate is lower up to 41% in dc and 44%
shows a 32% reduction in the EDF for 4 eV < E <6.5 eV and 75% in Class AB at 10 GHz and 40 GHz, respectively,
reaching up to 44% reduction of hot carriers for E > 6.5 eV. compared to EDFs of Tgate HEMTs. These results suggest
At high Pout = 29 dBm, the -gate energy distribution is 13% the improved hot-electron-induced failure conditions under
and 19% lower than that of the Tgate for the energy ranges both dc and large-signal RF operation of the Asym--gate
4.5 eV < E <5.5 eV and 5.5 eV < E <6.5 eV, respectively, device by reducing the number of highly energetic carriers
whereas it reaches a 46% reduction for E > 6.5 eV. Fig. 11(b) that can create electrically active traps.
shows that the peak EDF is reached with the Tgate device at
low Pout = 21 dBm, and it decreases as Pout increases for both R EFERENCES
the Tgate and Asym--gate layouts. At low Pout or low input [1] G. Meneghesso et al., “Reliability and parasitic issues in GaN-based
power drive, the device operates around the semi-ON-state, power HEMTs: A review,” Semicond. Sci. Technol., vol. 31, no. 9,
where hot-carrier generation is maximized [5], [8]. How- p. 093004, Aug. 2016, doi: 10.1088/0268-1242/31/9/093004.
[2] E. Zanoni et al., “Reliability of gallium nitride microwave transistors,”
ever, as Pout (or the input power drive) increases, in Proc. 21st Int. Conf. Microw., Radar Wireless Commun. (MIKON),
the swing of the dynamic load line takes the device May 2016, pp. 1–6, doi: 10.1109/MIKON.2016.7492013.
away from the semi-ON-state into the OFF-state and the [3] M. Meneghini, A. Stocco, R. Silvestri, G. Meneghesso, and E. Zanoni,
“Degradation of AlGaN/GaN high electron mobility transistors related
ON -state, where either the electric field or the current is high, to hot electrons,” Appl. Phys. Lett., vol. 100, p. 233508, May 2012.
respectively, yielding lower concentration of hot electrons [27]. [4] S. Mukherjee, Y. Puzyrev, J. Chen, D. M. Fleetwood,
This effect is associated with the load line excursion deter- R. D. Schrimpf, and S. T. Pantelides, “Hot-carrier degradation in
GaN HEMTs due to substitutional iron and its complexes,” IEEE
mined by the PA topology [9], [41], and these results suggest Trans. Electron Devices, vol. 63, no. 4, pp. 1486–1494, Apr. 2016,
that it is independent of the geometry of the gate contact. doi: 10.1109/TED.2016.2532806.
At high frequency freq = 40 GHz, as shown in Fig. 12, [5] Y. Puzyrev et al., “Gate bias dependence of defect-mediated hot-carrier
degradation in GaN HEMTs,” IEEE Trans. Electron Devices, vol. 61,
the hot-carrier generation increases with Pin contrary to what no. 5, pp. 1316–1320, May 2014, doi: 10.1109/TED.2014.2309278.
is observed at X-band [41]. This is due to the broadening of [6] J. Joh and J. A. del Alamo, “RF power degradation of GaN high
the load lines away from a straight caused by a higher output electron mobility transistors,” in IEDM Tech. Dig., Dec. 2010, pp. 2–20,
doi: 10.1109/IEDM.2010.5 703 397.
capacitance CDS difficult to match for tuned-load conditions, [7] M. Caesar et al., “Generation of traps in AlGaN/GaN HEMTs during
which pushes the device into a high power state, where high RF-and DC-stress test,” in Proc. IEEE Int. Rel. Phys. Symp. (IRPS),
current and high electric field are simultaneously present. Apr. 2012, pp. CD.6.1–CD.6.5, doi: 10.1109/IRPS.2012.6 241 883.
[8] T. Brazzini et al., “Electroluminescence of hot electrons in
For Pout = 21 dBm, the high frequency distribution of the AlGaN/GaN high-electron-mobility transistors under radio frequency
-gate shown in Fig. 12(a) reaches that of the Tgate at operation,” Appl. Phys. Lett., vol. 106, p. 213502, May 2015,
10 GHz; nonetheless, it is 25% lower than that of the Tgate doi: 10.1063/1.4921848.
[9] T. Brazzini et al., “Hot-electron electroluminescence under RF opera-
at 40 GHz for 4.5 eV < E <6.5 eV, reaching up to a tion in GaN-HEMTs: A comparison among operational classes,” IEEE
35% reduction for higher energies. As the PA is driven Trans. Electron Devices, vol. 64, no. 5, pp. 2155–2160, May 2017,
into compression at Pout = 29 dBm, the EDF shown in doi: 10.1109/TED.2017.2686782.
[10] Y. Puzyrev et al., “Dehydrogenation of defects and hot-electron degrada-
Fig. 12(b) reaches its highest peak particularly for E > 5.5 eV; tion in GaN high-electron-mobility transistors,” J. Appl. Phys., vol. 109,
however, it is in this case where the maximum reduction of p. 034501, Feb. 2011, doi: 10.1063/1.3524185.
 This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.
8 IEEE TRANSACTIONS ON ELECTRON DEVICES

[11] D. Bisi et al., “Hot-electron degradation of AlGaN/GaN high-electron [32] O. Ambacher et al., “Pyroelectric properties of Al(In)GaN/GaN hetero-
mobility transistors during RF operation: Correlation with GaN buffer and quantum well structures,” J. Phys., Condens. Matter, vol. 14, no. 13,
design,” IEEE Electron Device Lett., vol. 36, no. 10, pp. 1011–1014, p. 3399, 2002, doi: 10.1088/0953-8984/14/13/302.
Oct. 2015, doi: 10.1109/LED.2015.2474116. [33] F. A. Marino, D. A. Cullen, D. J. Smith, M. R. McCartney, and
[12] J. Joh and J. A. D. Alamo, “Impact of gate placement on M. Saraniti, “Simulation of polarization charge on AlGaN/GaN high
RF power degradation in GaN high electron mobility transis- electron mobility transistors: Comparison to electron holography,”
tors,” Microelectron. Rel., vol. 52, no. 1, pp. 33–38, Jan. 2012, J. Appl. Phys., vol. 107, no. 5, p. 054516, 2010, doi: 10.1063/1.3311555.
doi: 10.1016/j.microrel.2011.09.008. [34] F. A. Marino, N. Faralli, T. Palacios, D. K. Ferry, S. M. Goodnick, and
[13] Y.-F. Wu et al., “30-W/mm GaN HEMTs by field plate optimization,” M. Saraniti, “Effects of threading dislocations on AlGaN/GaN high-
IEEE Electron Device Lett., vol. 25, no. 3, pp. 117–119, Mar. 2004, electron mobility transistors,” IEEE Trans. Electron Devices, vol. 57,
doi: 10.1109/LED.2003.822667. no. 1, pp. 353–360, Jan. 2010, doi: 10.1109/TED.2009.2035024.
[14] T. Palacios et al., “High-power AlGaN/GaN HEMTs for Ka-band [35] A. D. Latorre-Rey, K. Merrill, J. D. Albrecht, and M. Saraniti, “Electro-
applications,” IEEE Electron Device Lett., vol. 26, no. 11, pp. 781–783, thermal characterization of GaN HEMT on Si through selfconsistent
Nov. 2005, doi: 10.1109/LED.2005.857701. energy balance-cellular Monte Carlo device simulations,” in Proc. IEEE
[15] J. S. Moon et al., “>70% power-added-efficiency dual-gate, cas- Compound Semicond. Integr. Circuit Symp. (CSICS), Oct. 2017, pp. 1–4,
code GaN HEMTs without harmonic tuning,” IEEE Electron Device doi: 10.1109/CSICS.2017.8240440.
Lett., vol. 37, no. 3, pp. 272–275, Mar. 2016, doi: 10.1109/ [36] Y. Chen, K. Peng, and Z. Cui, “Fabrication of ultra-short T gates by
LED.2016.2520488. a two-step electron beam lithography process,” Microelectron. Eng.,
[16] I. Rossetto et al., “Evidence of hot-electron effects during hard switching vols. 73–74, pp. 662–665, Jun. 2004, doi: 10.1016/j.mee.2004.03.010.
of AlGaN/GaN HEMTs,” IEEE Trans. Electron Devices, vol. 64, no. 9, [37] S. Bentley, X. Li, D. A. J. Moran, and I. G. Thayne, “Fabrication of
pp. 3734–3739, Sep. 2017, doi: 10.1109/TED.2017.2728785. 22 nm T-gates for HEMT applications,” Microelectron. Eng., vol. 85,
[17] C. H. Chen et al., “AlGaN/GaN dual-gate modulation-doped field-effect nos. 5–6, pp. 1375–1378, 2008, doi: 10.1016/j.mee.2008.01.058.
transistors,” Electron. Lett., vol. 35, no. 11, pp. 933–935, May 1999, [38] D. Fanning, L. Witkowski, J. Stidham, H. Q. Tserng, M. Muir, and
doi: 10.1049/el:19990627. P. Saunier, “Dielectrically defined optical T-gate for high power GaAs
[18] B. M. Green et al., “Cascode connected AlGaN/GaN HEMTs on pHEMTs,” in GaAs MANTECH Dig. Papers, 2002, pp. 83–86.
SiC substrates,” IEEE Microw. Guided Wave Lett., vol. 10, no. 8, [39] L. Zhang, L. Dong, X. Su, Y. Wei, and T. Ye, “New align-
pp. 316–318, Aug. 2000, doi: 10.1109/75.862226. ment mark designs in single patterning and self-aligned double
[19] C.-H. Chen, R. Coffie, K. Krishnamurthy, S. Keller, M. Rodwell, and patterning,” Microelectron. Eng., vol. 179, pp. 18–24, Jul. 2017,
U. K. Mishra, “Dual-gate AlGaN/GaN modulation-doped field-effect doi: 10.1016/j.mee.2017.04.017.
transistors with cut-off frequencies fT > 60 GHz,” IEEE Electron Device [40] Y. Ma et al., “Decomposition strategies for self-aligned double pat-
Lett., vol. 21, no. 12, pp. 549–551, Dec. 2000, doi: 10.1109/55.887461. terning,” Proc. SPIE, vol. 7641, pp. 76410T-1–76410T-13, Apr. 2010,
[20] R. Vetury et al., “Performance and RF reliability of doi: 10.1117/12.848387.
[41] A. D. Latorre-Rey, J. D. Albrecht, and M. Saraniti, “Generation of
GaN-on-SiC HEMT’s using dual-gate architectures,” in IEEE
hot electrons in GaN HEMTs under RF class A and AB PAs,” in
MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 714–717, doi: 10.1109/
MWSYM.2006.249733. Proc. 75th Annu. Device Res. Conf. (DRC), Jun. 2017, pp. 1–2,
doi: 10.1109/DRC.2017.7999436.
[21] J. Ma and E. Matioli, “High performance tri-gate GaN power
MOSHEMTs on silicon substrate,” IEEE Electron Device Lett., vol. 38,
no. 3, pp. 367–370, Mar. 2017, doi: 10.1109/LED.2017.2661755.
[22] H. S. Yoon et al., “Microwave low-noise performance of 0.17 μm Alvaro D. Latorre-Rey (S’09–M’18) received
gate-length AlGaN/GaN HEMTs on SiC with wide head double- the B.Sc. degree (Cum Laude ) and the M.Sc.
deck T-shaped gate,” IEEE Electron Device Lett., vol. 37, no. 11, degree (Hons.) in electrical engineering from
pp. 1407–1410, Nov. 2016, doi: 10.1109/LED.2016.2612624. Universidad Simon Bolivar, Caracas, Venezuela,
[23] H. Y. Wong, N. Braga, and R. V. Mickevicius, “Normally-off in 2009 and 2011, respectively, and the Ph.D.
GaN HFET based on layout and stress engineering,” IEEE Elec- degree from Arizona State University, Tempe, AZ,
tron Device Lett., vol. 37, no. 12, pp. 1621–1624, Dec. 2016, USA, in 2018.
doi: 10.1109/LED.2016.2619978. He is joining the Compact Device Modeling
[24] M. Saraniti and S. M. Goodnick, “Hybrid fullband cellular automa- Group, Intel Corporation, Hillsboro, OR, USA.
ton/Monte Carlo approach for fast simulation of charge transport His current research interests include design
in semiconductors,” IEEE Trans. Electron Devices, vol. 47, no. 10, and modeling of power and RF semiconductor
pp. 1909–1916, Oct. 2000, doi: 10.1109/16.870571. devices.
[25] D. Guerra, D. K. Ferry, S. M. Goodnick, M. Saraniti, and F. A. Marino,
“Large-signal full-band Monte Carlo device simulation of millimeter-
wave power GaN HEMTs with the inclusion of parasitic and relia- John D. Albrecht (M’12) received the Ph.D.
bility issues,” in Proc. Int. Conf. Simul. Semicond. Processes Devices, degree in electrical engineering from the Uni-
Sep. 2011, pp. 87–90, doi: 10.1109/SISPAD.2011.6 035 056. versity of Minnesota, Minneapolis, MN, USA,
[26] R. C. Fitch et al., “Implementation of high-power-density in 1999.
X-band AlGaN/GaN high electron mobility transistors in a millimeter- He is currently an Associate Professor and the
wave monolithic microwave integrated circuit process,” IEEE Associate Chair with Michigan State University,
Electron Device Lett., vol. 36, no. 10, pp. 1004–1007, Oct. 2015, East Lansing, MI, USA. His current research
doi: 10.1109/LED.2015.2474265. interests include the studies of carrier transport in
[27] A. D. Latorre-Rey, F. F. M. Sabatti, J. D. Albrecht, and M. Saraniti, wide bandgap semiconductors, device physics,
“Hot electron generation under large-signal radio frequency operation and computational models of mesoscopic com-
of GaN high-electron-mobility transistors,” Appl. Phys. Lett., vol. 111, posites.
no. 1, p. 013506, Jul. 2017, doi: 10.1063/1.4991665.
[28] D. K. Ferry, Semiconductors: Bonds and Bands. Bristol, U.K.: IOP,
2013, doi: 10.1088/978-0-750-31044-4. Marco Saraniti (SM’10) received the Ph.D.
[29] S. Yamakawa, R. Akis, N. Faralli, M. Saraniti, and S. M. Goodnick, degree from the Walter Schottky Institute, Tech-
“Rigid ion model of high field transport in GaN,” J. Phys., Con- nical University of Munich, Munich, Germany,
dens. Matter, vol. 21, no. 17, p. 174206, 2009, doi: 10.1088/0953- in 1996.
8984/21/17/174206. In 2007, he became a Professor with the
[30] K. Kunc and O. H. Nielsen, “Lattice dynamics of zincblende structure School of Electrical, Computer and Energy Engi-
compounds II. Shell model,” Comput. Phys. Commun., vol. 17, no. 4, neering, Arizona State University, Tempe, AZ,
pp. 413–422, 1979, doi: 10.1016/0010-4655(79)90104-8. USA. His current research interests include com-
[31] W. Hackbusch, “The frequency decomposition multi-grid algorithm,” putational electronics applied to the simulation of
in Robust Multi-Grid Methods. Wiesbaden, Germany: Springer, 1989, semiconductor devices.
pp. 96–104, doi: 10.1007/978-3-322-86200-6-8.