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Faculty of Science: End Sem (Even) Examination May-2018 CA3CO06 Computer Architecture

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0% found this document useful (0 votes)
19 views2 pages

Faculty of Science: End Sem (Even) Examination May-2018 CA3CO06 Computer Architecture

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Total No. of Questions: 6 Total No.

of Printed Pages:2 [2]

Enrollment No...................................... x. Status register is also called as ___________. 1


(a) Accumulator (b) Stack
Faculty of Science (c) Counter (d) Flags
End Sem (Even) Examination May-2018
CA3CO06 Computer Architecture Q.2 i. What is instruction cycle and its phases? 2
Programme: BCA Branch/Specialisation: Computer Application ii. Describe any three different arithmetic instructions with example. 3
Duration: 3 Hrs. Maximum Marks: 60 iii. Explain the components of computer system with the help of neat 5
diagram.
Note: All questions are compulsory. Internal choices, if any, are indicated. Answers of OR iv. Compare the instruction set architectures in RISC and CISC 5
Q.1 (MCQs) should be written in full instead of only a, b, c or d. processors in terms of instruction set, addressing modes, register
Q.1 i. Which bus is bidirectional? 1 files and cache design, clock rate and CPI.
(a) Address bus (b) Control bus
(c) Data bus (d) None of these Q.3 i. Write short note on register configuration for floating-point 4
ii. Memory is an integral part of a _______ system 1 arithmetic operations.
(a) Supercomputer (b) Microcomputer ii. Describe the algorithm for division of two fixed point binary 6
(c) Mini computer (d) Mainframe computer numbers in signed magnitude representation.
iii. Which is not an operand? 1 OR iii. Explain with an example the procedure for the signed 2’s 6
(a) Variable (b) Register (c) Memory location (d) Assembler complement system for decimal numbers.
iv. Which is not part of the execution unit (EU)? 1
(a) Arithmetic logic unit (ALU) (b) Clock Q.4 i. Write the brief note on bus organization of basic computer system. 3
(c) General registers (d) Flags ii. What is control unit? Explain its functions. Explain how micro 7
v. The ___ bus controller device decodes the signals to produce the 1 Programmed control unit is different from hardwired control unit.
control bus signal OR iii. How transfer of data from CPU to an interface and then to an I/O 7
(a) Internal (b) Data (c) External (d) Address devices are carried out? Explain with block diagram.
vi. Which method by passes the CPU for certain types of data transfer? 1
(a) Software interrupts (b) Interrupt-driven I/O Q.5 i. Enlist the addressing modes of 8086 micro processors. 3
(c) Polled I/O (d) Direct memory access (DMA) ii. Write an assembly language program to subtract two 16 bit 7
vii. The intel 8086 microprocessor is a _______ processor 1 numbers.
(a) 8 bit (b) 16 bit (c) 32 bit (d) 4 bit OR iii. Draw and explain the pin diagram of 8086 micro processor. 7
viii. Which of the following is not an 8086/8088 general-purpose 1
register? Q.6 Write short note on : (Any two)
(a) Code segment (CS) (b) Data segment (DS) i. Memory hierarchy 5
(c) Stack segment (SS) (d) Address segment (AS) ii. Auxiliary memory 5
ix. Access time is faster for _________. 1 iii. Associative memory 5
(a) ROM (b) SRAM (c) DRAM (d) ERAM
P.T.O. ******
Marking Scheme Q.3 i. Short note on register configuration for floating-point arithmetic 4
operations
CA3CO06 Computer Architecture Description 3 marks
Q.1 i. Which bus is bidirectional? 1 Example 1 mark
(c) Data bus ii. Algorithm 6
ii. Memory is an integral part of a _______ system 1 OR iii. Explanation of procedure 4 marks 6
(b) Microcomputer Example- 2 marks
iii. Which is not an operand? 1
(d) Assembler Q.4 i. Detail of bus organization 1.5 marks 3
iv. Which is not part of the execution unit (EU)? 1 Diagram 1.5 marks
(b) Clock ii. Control unit 2 marks 7
v. The ___ bus controller device decodes the signals to produce the 1 its functions 2 marks
control bus signal Difference b/w micro Programmed control unit and hardwired control
(c) External unit 3 marks
vi. Which method bypasses the CPU for certain types of data transfer? 1 OR iii. Explanation 4 marks 7
(d) Direct memory access (DMA) Block diagram 3 marks
vii. The intel 8086 microprocessor is a _______ processor 1
(b) 16 bit Q.5 i. Addressing modes of 8086 micro processors 3
viii. Which of the following is not an 8086/8088 general-purpose register? 1 min. 3 modes (1 mark * 3)
(d) Address segment (AS) ii. Assembly language program to substract two 16 bit numbers 7
ix. Access time is faster for _________. 1 Logic 3 marks
(b) SRAM Steps- 4 marks
x. Status register is also called as ___________. 1 OR iii. Draw and explanation of pin diagram of 8086 micro processor. 7
(d) Flags Diagram 3 marks
Explanation 4 marks
Q.2 i. Definition-instruction cycle 1 mark 2
Its phases 1 mark Q.6 Write short note on : (Any two)
ii. Description of arithmetic instructions with example 3 i. Memory hierarchy 5
1 mark for each (1 mark * 3) ii. Auxiliary memory 5
iii. Explanation for components of computer system 3 marks 5
iii. Associative memory 5
Neat diagram 2 marks
OR iv. Comparison of RISC and CISC processors in terms of instruction set, 5
******
addressing modes, register files and cache design, clock rate and CPI.
1 mark for each point (1 mark * 5)

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