Date:08/05/2018 Enrolment No.
:___________________
RK UNIVERSITY
B.TECH./SEM-IV/REGULAR/APRIL-2018
CE419: COMPUTER ORGANIZATION AND ARCHITECTURE
Time: 09:00 AM TO 12:00 PM Total Marks: 100
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Programmable calculator is not permissible.
SECTION – I
Q.1 (a) Select the most appropriate option: (Each of one mark) 06
1. A collection of lines that connects several devices is called
…………..
a. bus
b. peripheral connection wires
c. Both a and b
d. internal wires
2. CPU does not perform the operation ………………
a. data transfer
b. logic operation
c. arithmetic operation
d. all of the above
3. A microprogram written as string of 0’s and 1’s is a ………….
a. Symbolic microinstruction
b. binary microinstruction
c. symbolic microinstruction
d. binary micro-program
4. In Reverse Polish notation, expression A*B+C*D is written as
a. AB*CD*+
b. A*BCD*+
c. AB*CD+*
d. A*B*CD+
5. Floating point representation is used to store
a. Boolean values
b. whole numbers
c. real integers
d. Integer
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6. Assembly language
a. uses alphabetic codes in place of binary numbers used in
machine language
b. is the easiest language to write programs
c. need not be translated into machine language
d. None of these
(b) Answer following questions: (Each of two mark) 10
1.Define normalization.
2.Compare excess 127 with excess 1023.
3.Represent 7,452,000,000,000,000,000,000.00 as per the scientific
notation.
4. Represent 7 in 8-bit memory locations using unsigned
representation.
5. Define biasing.
Q.2 (a) Discuss the types of addressing modes in detail. 06
(b) Sketch out and explain the instruction cycle in detail. 05
(c) Compare RISC and CISC. 05
OR
Q.2 (a) Sketch out and explain the instruction format in detail. 06
(b) Demonstrate the register transfer operation with suitable example. 05
(c) Explain the rules of writing an assembly language program. 05
Q.3 (a) Sketch out and explain three state buffers along with its 06
application.
(b) List out and explain types of microoperations in detail. 06
(c) Sketch out and explain the first phase of an assembler. 06
OR
Q.3 (a) Construct a common bus architecture system with the help of 06
multiplexers.
(b) Discuss the design of control unit in detail. 06
(c) Sketch out and explain the second phase of an assembler. 06
SECTION – II
Q.4 (a) Select the most appropriate option: (Each of one mark) 06
1. The computer architecture aimed at reducing the time of execution
of instructions is ________
a. RISC
b. SISC
c. ISA
d. ANNA
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2. The pipelining process is also called as ______
a. Superscalar operation
b. Assembly line operation
c. Von neumann cycle
d. None of the mentioned
3. The fetch and execution cycles are interleaved with the help of
________
a. Modification in processor architecture
b. Clock
c. Special Unit
d. Control Unit
4. We make use of ______ circuits to implement multiplication.
a. Flip flop
b. Combinational
c. Fast adder
d. None of above
5. In full adders the sum circuit is implemented using ________
a. And & or gates
b. NAND gate
c. XOR
d. XNOR
6. The numbers written to the power of 10 in the representation of
decimal numbers are called as _____
a. Height factors
b. Size factors
c. Scale factors
d. None of above
(b) Answer following questions: (Each of two mark) 10
1. What characteristic of RAM memory makes it not suitable for
permanent storage?
2. Why subtraction is generally carried out by 2’s complement?
3. What is bootstrap loader? In which portion of memory, it stored?
4. Differentiate SIMD and MIMD.
5. Differentiate I/O and Memory Bus.
Q.5 (a) Explain (i) Vector Processing (ii) Vector Operations. Explain how 06
matrix multiplication is carried out on a computer supporting Vector
Computations.
(b) Explain with proper block diagram the Addition Operation on two 05
floating point numbers.
(c) Describe DMA Controller with necessary block diagram. How it 05
increases speed of computer?
OR
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Q.5 (a) Explain Auxiliary memory and Associative memory in detail. 06
(b) Explain array processing and discuss types of array processors. 05
(c) Describe the architecture of a shared memory multiprocessor 05
Q.6 (a) Draw flowchart and perform (7)10 - (4)10 using four-bit signed 06
number.
(b) Explain the block diagram of an I/O interface unit. 06
(c) Give five examples of external interrupts and five examples of 06
internal Interrupts. What is the difference between a software
interrupt and a Subroutine call?
OR
Q.6 (a) Multiply the (-8)10 with (6)10 using Booth’s algorithm. Give each 06
step.
(b) Explain the Instruction Pipelining with example. 06
(c) What is Flynn’s Taxonomy? Illustrate Flynn’s Taxonomy in detail. 06
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