Seat No.: ________ Enrolment No.

___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER– IV(NEW) EXAMINATION – SUMMER 2023
Subject Code:3140707 Date:13-07-2023
Subject Name:Computer Organization & Architecture
Time:10:30 AM TO 01:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.

Marks
Q.1 (a) Write the name of basic computer registers with their functionalities. 03
(b) Discuss 4-bit binary adder with neat diagram. 04
(c) Enlist various kinds of addressing modes. Explain any five of same and support 07
your answer by taking small example.

Q.2 (a) Write sequence of microoperations to execute the following instructions: 03

- AND
- STA
(b) Write assembly language program to subtract two numbers. 04
(c) Write two address, one address and zero address instructions program for the 07
following arithmetic expression:
X = (A + B) * (C – D / E) + F * G
OR
(c) Assume A = + 6 and B = + 7, apply Booth algorithm for multiplying A and B. 07
Make necessary assumptions if required.

Q.3 (a) Explain Flynn’s classification for computers in brief. 03

(b) Draw the flowchart for first pass of assembler and explain the same in brief. 04
(c) Elaborate CPU-IOP communication. 07
OR
Q.3 (a) Explain pipeline conflicts in brief. 03
(b) Discuss three state bus buffers with neat diagram. 04
(c) Write a detailed note on associative memory. 07
Q.4 (a) Explain DMA in brief. 03
(b) Write a note on SIMD array processor. 04
(c) A computer uses a memory unit with 256K words of 32 bits each. A binary 07
instruction code is stored in one word of memory. The instruction has four
parts: an indirect bit, an operation code, a register code part to specify one of 64
registers, and an address part.
1. How many bits are there in operation code, the register code part and the
address part?
2. Draw the instruction word format and indicate the number of bits in
each part.
3. How many bits are there in the data and address inputs of the memory?
OR

Q.4 (a) Write a brief note on memory hierarchy. 03

(b) In certain scientific computations it is necessary to perform the arithmetic 04
1
 operation (Ai + Bi) * (Ci + Di) with a stream of numbers. Specify pipeline
configuration to carry out this task. List the contents of all registers in the
pipeline for i=1 through 4.
(c) Discuss microprogrammed control organization with neat diagram. 07

Q.5 (a) Perform A – B (subtract) operation for the following numbers using signed 03
magnitude number format. (Write necessary assumptions if required)
A = + 11 and B = - 6
(b) Explain status bit conditions with neat diagram. 04
(c) Discuss cache coherence problem in detail. 07
OR
Q.5 (a) Write the difference(s) between arithmetic shift left and logical shift left 03
instruction. Support your answer with proper illustration.
(b) State the differences between RISC and CISC. 04
(c) Explain any two types of mapping procedures when considering the 07
organization of cache memory.

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2
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER– IV EXAMINATION – SUMMER 2020
Subject Code: 3140707 Date:27/10/2020
Subject Name: Computer Organization & Architecture
Time: 10:30 AM TO 01:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

Marks

Q.1 (a) Enlist register reference instructions and explain any one of them in 03
detail.
(b) What is combinational circuit? Explain multiplexer in detail. How 04
many NAND gates are needed to implement 4 x 1 MUX?
(c) Draw the flowchart for instruction cycle and explain. 07

Q.2 (a) What is RAM and ROM? 03

(b) One hypothetical basic computer has the following specifications: 04
Addressing Mods = 16
Total Instruction Types = 4 (IT1, IT2, IT3, IT4)
Each of the instruction type has 16 different instructions.
Total General-Purpose Register = 8
Size of Memory = 8192 X 8 bits
Maximum number of clock cycles required to execute one instruction
= 32

Each instruction of the basic computer has one memory operand and
one register operand in addition to other required fields.
a. Draw the instruction word format and indicate the number of
bits in each part.
b. Draw the block diagram of control unit.

(c) Write an assembly language program to find the Fibonacci series up 07

to the given number.
OR
(c) Write an assembly language program to find average of 15 numbers
stored at consecutive location in memory.

Q.3 (a) Which are different pipeline conflicts. Describe. 03

(b) What is assembler? Draw the flowchart of second pass of the 04
assembler.
(c) Write a note on arithmetic pipeline. 07
OR
Q.3 (a) What is address sequencing? Explain. 03
(b) Design a simple arithmetic circuit which should implement the 04
following operations: Assume A and B are 3 bit registers.
Add : A+B, Add with Carry: A+B+1, Subtract: A+B’, Subtract with
Borrow: A+B’+1, Increment A: A+1, Decrement A: A-1, Transfer A:
A

1
 (c) Explain how addition and subtraction of signed data is performed if a 07
computer system uses signed magnitude representation.

Q.4 (a) Enlist different status bit conditions. 03

(b) What is addressing mode? Explain direct and indirect addressing mode 04
with example.
(c) What is cache memory address mapping? Which are the different 07
memory mapping techniques? Explain any one of them in detail.
OR
Q.4 (a) Differentiate isolated I/O and memory mapped I/O. 03
(b) Compare and contrast RISC and CISC. 04
(c) Explain booth’s multiplication algorithm with example. 07

Q.5 (a) What is associative memory? Explain. 03

(b) Differentiate between paging and segmentation techniques used in 04
virtual memory.
(c) Write a note on asynchronous data transfer. 07
OR
Q.5 (a) Write about Time-shared common bus interconnection structure. 03
(b) Explain the working of Direct Memory Access (DMA). 04
(c) Write a note on interprocess communication and synchronization. 07

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2
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–IV (NEW) EXAMINATION – SUMMER 2021
Subject Code:3140707 Date:06/09/2021
Subject Name:Computer Organization & Architecture
Time:02:30 PM TO 05:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.

Marks
Q.1 (a) State differences between hardwired control unit and 03
microprogrammed control unit.
(b) Explain register stack and memory stack. 04
(c) Show the contents of registers E, AC, BR, QR and SC during the 07
process of multiplying 11111 with 10101.

Q.2 (a) Write down RTL statements for the fetch and decode operation 03
of basic computer.
(b) Define pipelining. For arithmetic operation (Ai *Bi + Ci) with a 04
stream of seven numbers (i=1 to 7). Specify a pipeline
configuration to carry out this task.
(c) Write a program to evaluate the arithmetic statement: 07
A*B+C*D+E
i. Using an accumulator type computer.
ii. Using a stack organized computer.
OR
(c) A non-pipeline system takes to process a task. The same task 07
can be processed in a six segment pipeline with a clock cycle of
10ns. Determine the speedup ratio of the pipeline for 100 tasks.
What is the maximum speed up that can be achieved?
Q.3 (a) List down six major characteristics of RISC processors. 03
(b) Explain how (r-1)’s complement is calculated. Calculate 9’s 04
complement of 546700.
(c) Elaborate CPU-IOP communication. 07
OR
Q.3 (a) List and explain major instruction pipeline conflicts. 03
(b) Define RTL. Give block diagram and timing diagram of transfer 04
of R1 to R2 when P=1.
(c) Elaborate content addressable memory (CAM). 07
Q.4 (a) Explain memory hierarchy in brief. 03
(b) Draw and explain flowchart for first pass of assembler. 04
(c) Explain using a flowchart how address of control memory is 07
selected in microprogrammed control unit.
OR
Q.4 (a) Briefly explain DMA. 03
(b) Write assembly level program to subtract two given numbers. 04
(c) Write the symbolic microprogram routine for the BSA 07
instruction. Use the microinstruction format of basic
microprogrammed control unit.

1
Q.5 (a) How many AND gates and Adders will be required to multiply a 03
5 bit number with a 3 bit number? Also say size of adder (bits).
How many bits will be there in the result?
(b) What do you mean by cache memory? Justify the need of cache 04
memory in computer systems.
(c) Discuss multistage switching network with neat diagrams. 07
OR
Q.5 (a) Explain the non-restoring methods for dividing two numbers. 03
(b) Discuss source-initiated transfer using handshaking in 04
asynchronous data transfer.
(c) Elaborate cache coherence problem with its solutions. 07

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2
 Enrolment No./Seat No_______________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–IV (NEW) EXAMINATION – SUMMER 2024
Subject Code:3140707 Date:20-07-2024
Subject Name: Computer Organization & Architecture
Time:10:30 AM TO 01:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.
Marks
Q.1 (a) Define RTL. Give an example of register transfer of data through accumulator. 03
(b) Explain instruction formats with its types. 04
(c) Explain Instruction cycle with flowchart. 07

Q.2 (a) Differentiate MRI and non-MRI. 03

(b) Explain Memory reference instructions. 04
(c) Explain micro programmed control organization in detail. 07
OR
(c) What is register stack? Explain push and pop micro-operations. 07

Q.3 (a) Explain subroutine call and return with micro-operation. 03

(b) State the differences between register stack and memory stack. 04
(c) What is addressing modes? List and explain any five addressing modes by taking 07
proper example(s).
OR
Q.3 (a) Write a short note on memory interleaving. 03
(b) Explain Flynn’s classification of computer. 04
(c) Explain pipelining technique. Draw the general structure of four segment pipeline. 07

Q.4 (a) Explain the role of associative memory. 03

(b) Explain in brief about Cache memory and Virtual memory. 04
(c) Discuss associative mapping and direct mapping in organization of cache memory. 07
OR
Q.4 (a) Explain Content Addressable Memory. 03
(b) Compare SRAM and DRAM. 04
(c) Explain paging and address translation with example. 07
Q.5 (a) Compare tightly coupled and loosely coupled systems. 03
(b) Write a note on crossbar switch interconnection structure with block diagram 04
(c) Describe cache coherence problem and its solutions in detail. 07
OR
Q.5 (a) Explain CLA, ISZ and CMA instruction. 03
(b) Draw and explain in brief flowchart for interrupt cycle. 04
(c) Explain first pass of an assembler with flowchart. 07

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1
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–IV (NEW) EXAMINATION – SUMMER 2022
Subject Code:3140707 Date:29-06-2022
Subject Name:Computer Organization & Architecture
Time:10:30 AM TO 01:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.
MARKS

Q.1 (a) What is binary and decimal equivalent of F8 hexadecimal value? 03

(b) Write Steps for two n digit numbers subtraction in base r. 04
(c) List and explain Memory reference instructions in detail. 07

Q.2 (a) What is arithmetic micro operation? 03

(b) What is RAM and ROM? 04
(c) Draw and explain working of 4 bit binary adder. 07
OR
(c) State and Explain any seven logic micro operation. 07

Q.3 (a) List out Register for basic computer. 03

(b) Explain register reference instruction format. 04
(c) Explain register transfer using block diagram and timing diagram. 07
OR
Q.3 (a) Draw and explain control unit diagram for basic computer. 03
(b) State various phases of instruction cycle. 04
(c) Explain any four input output reference instruction. 07

Q.4 (a) Draw flowchart of first pass assembler. 03

(b) Write assembly language program to add two numbers. 04
(c) Write assembly language program to multiply two numbers. 07
OR
Q.4 (a) What is address sequencing? 03
(b) Write assembly language program to subtract one number from other 04
number.
(c) Explain booth’s multiplication algorithm with example. 07

Q.5 (a) Explain register stack. 03

(b) What is difference between two address and three address instructions? 04
(c) Write a note on asynchronous data transfer. 07
OR
Q.5 (a) What is difference between direct and indirect addressing mode? 03
(b) Explain arithmetic pipeline. 04
(c) Write a short note on virtual memory. 07

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