UNIT 3
PROCESSING UNIT
FUNDAMENTAL CONCEPTS
In Computer Architecture & Organization (CAO), the Processing Unit refers to the part
of the CPU responsible for executing instructions of a program.
It includes arithmetic, logical, control, and sequencing operations necessary for program
execution.
Main Components of the Processing Unit
1. Arithmetic Logic Unit (ALU)
o Performs arithmetic (add, subtract, multiply, divide) and logic (AND, OR, NOT,
comparisons) operations.
2. Control Unit (CU)
o Directs the execution of instructions.
o Generates control signals for data transfer between CPU, memory, and I/O.
3. Registers
o Small, high-speed storage elements inside CPU.
o Types:
General-purpose registers (for operands & results)
Program Counter (PC) – holds address of next instruction
Instruction Register (IR) – holds the current instruction
Accumulator – holds intermediate results
Status/Flag Register – stores condition codes (Zero, Carry, Sign,
Overflow).
Instruction Execution Cycle
1. Fetch: The control unit reads instruction from memory into IR.
2. Decode: The instruction is interpreted (operation + operand).
3. Execute: ALU performs operation, registers and memory are updated.
4. Store: Result is written back to register or memory.
EXECUTION OF A COMPLETE INSTRUCTION
When a program runs, the CPU repeatedly performs the Instruction Cycle until all instructions
are executed.
Phases of Instruction Execution
The execution of one complete instruction generally involves four steps:
1. Fetch
The Program Counter (PC) holds the address of the next instruction.
The Control Unit (CU) sends this address to memory.
The instruction is fetched from memory and loaded into the Instruction Register (IR).
PC is updated to point to the next instruction.
2. Decode
The instruction in the IR is interpreted by the CU.
The opcode (operation part) tells the CU what to do.
The operand part gives the data or memory location involved.
3. Execute
The CU issues control signals to perform the required operation.
Example operations:
o ALU performs arithmetic/logic.
o Data is read from memory/register.
o Data is written back to memory/register.
o Branch or jump to a new instruction address.
4. Store (Result Writing)
The result of the execution is stored back:
a. In a register (if intermediate result).
b. In main memory (if final result).
Instruction Cycle with Example
Example: ADD R1, R2
(Add contents of R2 to R1 and store in R1)
Steps:
1. Fetch: Get instruction "ADD R1, R2" from memory.
2. Decode: CU identifies operation (ADD) and operands (R1, R2).
3. Execute: ALU performs R1 ← R1 + R2.
4. Store: Result is placed back into R1.
Types of Instruction Cycles:
Fetch Cycle – Fetching the instruction.
Indirect Cycle – If instruction needs indirect addressing.
Execute Cycle – Performing the operation.
Interrupt Cycle – Handling interrupts (if any occur).
