EMBEDDED SYSTEM

MODULE 1:

1. What is system?
A system is a way of working, organizing or doing one or many tasks according to a fixed plan,
program or set of rules. A system is also an arrangement in which all its units assemble and work
together according to the plan or program.
For example (i) A watch (ii) A washing machine (iii) A printer (iv) A microwave-oven etc.

2. What is embedded system?

An embedded system is a system, that has an embedded software, a computer hardware which makes
fit a system dedicated for an application or specific part of an application or product or a part of a
larger system.

3. Components of general-purpose computers.

1. A microprocessor
2. A large memory of the following to kinds:
(a) Primary memory (RAM, ROM and fast accessible caches)
(b) Secondary memory (CD ROM, Hard disk, Memory sticks, SSD)
3. I/O Units such as touch screen, modem, fax cum modem.
4. Input units such as keyboard, mice, digitizer, scanner etc.
5. Output units such as LCD screen, video monitor, printer etc.
6. Networking units such as ethernet card, front-end processor-based server, bus drivers etc.
7. An Operating System (OS) that has general purpose user and application software in the
secondary memory.

4. Components of Embedded system.

• Power supply
The power supply component is an electrical unit responsible for powering up the electrical
load of the embedded system. While a 5V power supply is generally required, the range can
go from 1.8V to 3.3V, depending on the application.
• Microcontroller and microprocessor
Embedded systems come in two key variants: microcontroller-powered and microprocessor-
 powered. A form of integrated circuits, these components give the system its computing
power. In simple terms, the microcontroller or microprocessor serves as the brain of the
embedded system and drives its performance.
• Memory
The memory component is essential for storing critical data in embedded systems. This
component is generally integrated into the microprocessor or microcontroller. The two types
of memory are RAM (random access memory) and ROM (read-only memory).
RAM is also known as the ‘data memory’ and is volatile, which means that it stores
information only temporarily and is wiped clean when the power supply is turned off. On the
other hand, ROM is also known as the ‘code memory’ and is responsible for storing the
program code. It is non-volatile, storing system information even when the power supply is
turned off.
• Timer and counter
Timers are used in applications requiring the creation of a delay before the execution of a
specific function by the embedded system. On the other hand, counters are used in
applications where the number of times a specific event takes place needs to be tracked. Up
counters count upward from the starting value to 0xFF, while down counters count downward
to 0x00. Counters are integrated into the system using register-type circuits.
• Input/output
Input components allow other components within the larger interconnected infrastructure to
interact with the embedded system. For instance, a sensor helps provide inputs for the system
to process. Once processing is complete (for instance, counting), the results are
communicated to the required destination via the output component.8051 Microcontroller has
P0, P1, P2, P3 ports. Atmega microcontroller has PA, PB, PC ports.
• Communication interface
Communication interfaces enable embedded systems to establish communications with each
other and other components within the larger system. Different interfaces include USB, I2C,
UART, RS-232, RS-485, and SPI. For simple applications, communication ports within the
microcontroller is utilized, and ports can be externally installed in case of advanced
applications.

5. Difference between general-purpose computer system and embedded system.

Aspects General-purpose computer Embedded system
Types of work It is designed for general tasks It is designed for a particular
task.
Operating system It has a generalized operating It has specialized operating
system. system. (RTOS – Real Time
Operating System)
Peripherals Large number of peripherals Small numbers of peripherals
are used. are used.
Memory Large number of primary and Small numbers of peripherals
secondary memory is used. are used.
Modification User can reinstall software User cannot update or modify
(OS) the embedded software.
Key parameters Speed is considered as key Key parameter is application
parameter. Fast is better. specific.
 Time limitation Time limitation is not much In some cases, device should
considerable. response in particular time. i.e.
time is very crucial.
Behavior It is not deterministic It has deterministic behavior or
real time behavior.

6. What are characteristics of embedded system.

i. Application and domain specific:
Each and every embedded system is designed to perform a particular task. We cannot do another task
by any embedded system. For example, a printer is made just to print papers, where as a washing
machine is made to wash only clothes. We cannot do print or wash clothes by washing machine and
printer respectively.
ii. Reactive and Real Time:
Sensors are used to interact with the physical world. If there is any change in the input, there will
be corresponding output. This characteristic is called reactive. It should have deterministic
behavior. Non-deterministic behavior may lead to disaster.
iii. Operates in hard condition:
Designer should know and design the system according to the application area.
iv. Distributed:
Multiple embedded systems link up to make a large embedded system. For example, ATM (it has
card reader, card validator, cash counter etc.) communication is done by various ports.
v. Small size and weight:
It must be small in sized and lightweighted.
vi. Power consumption:
It should have low power consumption.

7. What are the quality attributes of embedded system?

These are the non-functional characteristics of an embedded system. During design a system these
all should be kept in mind.
a. Response time:
Response time is measure of quickness of the system. Fast response time is better.
b. Throughput:
Throughput means in a particular time how many times a particular operation is performed.
Higher throughput better quality.
c. Reliability:
It the percentage of how much reliable the system is.
(i) Mean Time Between Failures (MTBF): It gives the frequency of failures between
hours/weeks/months.
(ii) Mean Time To Repair (MTTR): It specifies how long the system is allowed to be out of
the order following a failure.
d. Maintainability:
Maintainability deals with support and maintenance to the end user or client in case of technical
issues and product failures or on the basis of routine system checkup.
(i) Preventive maintenance
(ii) Corrective maintenance
 e. Security and safety
Security refers here to data security. There must be some secured system where data cannot be
shared by the other users. For example, many users can withdraw money from ATM but none of
them do not know each other’s ATM pin, bank details or transaction details.

MODULE-2

8. Draw and explain the internal architecture of 8051

(a) Bus control:

1. Data bus: 8051 has 8-bit data but.
2. Address bus: It has 16-bit address bus.
3. Control bus: For control signals.
(b) I/O Ports:
8051 has 4 I/O ports. These are P0, P1, P2, P3. All of these ports are bidirectional and 8-bit.
PO: Can act as multiplexed address and data bus. (AD0 – AD7). It is controlled by the signal ALE
(Address Latch Enable).
If ALE -> 0 Data bus
ALE -> 1 Address bus
Rests are normal ports for I/O operations.
(c) Oscillator:
Oscillator is used to generate clock. Clock frequency is 11.0592 MHz. This is a crystal oscillator.
(d) Interrupt:
There are 5 interrupts
External interrupt 0 (EX 0)
Timer 0 interrupt (ET 0)
External interrupt 1 (EX 1)
Timer 1 interrupt (ET 1)
Serial interrupt (ES)
(e) CPU:
(i) ALU (Arithmetic and Logic Unit): It does addition, subtraction, multiplication and
division. And logic operations like AND, OR, NOT, Left Shift, Right Shift, Complement
etc.
(ii) CU (Control Unit): This section generates control signals which controls various parts of
the microcontroller.
 (iii) Accumulator: This is a register which stores the result after the operation.
(iv) Registers: This section is comprised of different types of special function register.
(f) On chip ROM and RAM
(a) On chip ROM is in build inside the controller. Size is 4kB
(b) On chip RAM is also in build in the controller. Size is 128 kB.
RAM is divided into four register banks (B0, B1, B2, B3). Each bank has 8 registers. Total 31
registers.
(g) Timer 0/Timer 1:
These are two in build timer registers. These are programmable. Both are 16-bit registers.
Timer 0:

Timer 1:

(h) Serial port:

This port is used for serial communications
For transmission (TxD) -> Parallel to serial conversion
For receiver (RxD) -> Serial to parallel conversion.
It has also MODEM (Modulator and Demodulator). In build.

9. Describe the registers of 8051

Registers of 8051 can be broadly classified into CPU Registers and Scratchpad Registers
CPU Registers:
(a) Accumulator (ACC) (Special Function Register SFR-E0H): Stores the result after arithmetic
and logical operations. Accumulator is a bit addressable register. Size 8-bit.

(b) B register (SFR-F0H): It is a general-purpose register. It is used to store an operand during

multiplication or division. It is also used to store the remainder and the MSB during division and
multiplication. size 8-bit
(c) Program status word (SFR-D0H): It is an 8-bit, bit addressable special function register.

Bit Name Explanation

CY Carry flag Sets when a carry or a borrow
occurs during addition or
subtraction of 8-bit number.
Otherwise cleared.
 AC Auxiliary carry flag Sets when a carry is generated
out of bit 3. Otherwise cleared.
OV Overflow Sets when overflow occurs.
OV is set when there is a carry-
out of bit 6 but not out of bit 7,
or a carry-out of bit 7 but not
bit 6; otherwise, OV is cleared.
P Parity flag If the number of 1’s in the
accumulator is odd then P is
set. Otherwise cleared.
PSW.1 General flag User programmable general-
purpose bit.
RS.0 Register bank selector Bit status selects the register
RS.1 bank

RS1 RS0 Register Bank Register Address

0 0 0 00H-07H
0 1 1 08H-0FH
1 0 2 10H-17H
1 1 3 18H-1FH

(d) Data pointer (DPTR) (DPL: SFR-82H, DPH: SFR-83H): It is a 16-bit register (8-bit high, 8-
bit low) holds the 16-bit address of the external memory to be read or written in external data
memory operations.

(e) Program counter (PC): This is also a 16-bit register holding the address of code memory to be
fetched.

(f) Stack pointer (SP) (SFR-81H): It is an 8-bit register holding the current address of stack
memory. It stores the program counter address, other memory and register values during a sub-
routine/function call.

10. Explain the assignment of memory locations.

 The lowest 32 bytes of RAM (00H-1FH) are grouped into 4 banks of 8 registers each. Each register
is known as R0 TO R7 registers which are used as temporary data storage registers during program
execution.
Next 16 bytes of RAM with address 20H to 2FH is a bit addressable memory area. It accommodates
128 bits (16 bytes x 8), which can be accessed by direct bit addressing.
11. Explain the memory organization of 8051.
The Memory Organization

8051 is built around the Harvard processor architecture. The program and data memory of 8051 is
logically separated and they physically reside separately. Separate address spaces are assigned for
data memory and program memory. 8051's address bus is 16bit wide and it can address up to 64KB
(216) memory.

12. Explain the program memory organization of 8051.

The Program (Code) Memory:

The basic 8051 architecture provides lowest 4K bytes of program memory as on-chip memory (built-
in chip memory). Switching between the internal program memory and external program memory is
accomplished by changing the logic level of the pin External Access (EA’). Tying EA’ pin to logic 1
(Vcc), configures the chip to execute instructions from program memory up to 4K (program memory
location up to 0FFFH) from internal memory and 4K (program memory location from 1000H)
onwards from external memory, while connecting EA’ pin to logic 0 (GND) configures the chip to
external program execution mode, where the entire code memory is executed from the external
memory. The control signal for external program memory execution is PSEN’ (Program Strobe
Enable). For internal program memory fetches PSEN’ is not activated.

13. Explain the interfacing of program memory organization.

 If the program memory is external, 16 I/O lines are used for accessing the external memory. Port 0
and Port 2 are used for external memory accessing. Port 0 serves as multiplexed address/data bus for
external program memory access. This can be latched to an 8bit external latch with the Address Latch
Enable (ALE) signal emitted by 8051. Once the address outing is over, Port 0 functions as input port
for data transfer from the corresponding memory location. The address from which the program
instruction to be fetched is supplied by the 16bit register, Program Counter (PC), During external
program memory fetching, Port 0 emits the contents of PCL and Port 2 emits the contents of PCH
register. Port 0 emits the contents of PCL only for a fixed duration allowing the external latch to hold
the content on arrival of the ALE signal. Afterwards Port 0 goes into high impedance state, waiting
for the arrival of data from the corresponding memory location of external memory. Whereas Port 2
continues emitting the contents of PCH register throughout the external memory fetch. Once the
PSEN signal is active, data from the program memory is clocked into Port 0. Remember, during
external program memory access Port 0 and Port 2 are dedicated for it and cannot be used as general
purpose I/O ports.

14. Explain the data memory organization of 8051.

The Data Memory The basic 8051 architecture supports 128 bytes of internal data memory and 128
bytes of Special Function Register memory. Special Function Register memory is not avail-able for
the user for general data memory applications. The address range for internal user data memory is
00H to 7FH. Special Function Registers are residing at memory area 80H to FFH. 8051 supports
interface for 64 Kbytes of external data memory. The control signals used for external data memory
access are RD’ and WR’ and the 16bit register holding the address of external data memory address
to be accessed is Data Pointer (DPTR). In external data memory operations, Port 0 emits the content
of DPL and Port 2 emits the content of DPH. Port 0 is address/data multiplexed in external data
memory operations also.

15. Explain the data memory interfacing of 8051.

 External data memory address can be either one or two bytes long. As described earlier, Port 0 emits
the lower order 8bit address and, if the memory address is two bytes and if it ranges up to 64K, the
entire bits of Port 2 is used for holding the higher order value of data memory address. If the memory
range is 32K, only 7 bits of Port 2 is required for addressing the memory. For 16K, only 6 lines of
Port 2 are required for interfacing and so on.

16. Explain the interrupts in 8051.

In microprocessor or microcontroller systems. An interrupt is defined as a signal that initiates change
in normal program execution flow.
Enabling interrupts: This is achieved by setting or clearing the global interrupt enable bit of the special
function register Interrupt Enable (IE).

Bit Name Description

EA Enable all EA = 0 disable all interrupts
EA = 1 enable all interrupts
RSD Reserved Unimplemented, reserve for
future use.
ES Enable serial ES = 1 ES = 0 disable serial
interrupt
ET1 Enable timer 1 ET1 = 1 enable timer 1 interrupt
ET1 = 0 disable timer 1
interrupt
EX1 Enable external1 EX1 = 1 enable external 1
interrupt
EX1 = 0 disable external 1
interrupt
ET0 Enable timer 0 ET0 = 1 enable timer 0 interrupt
ET0 = 0 disable timer 0
interrupt
EX0 Enable external 0 EX0 = 1 enable external 0
interrupt
EX0 = 0 disable external 0
interrupt

17. Explain interrupt priority

Interrupt priority is configured under the software control. The special function register Interrupt
Priority (IP) Register is the one holding the interrupt priority setting for each interrupt.
 Bit Name Description
RSD Reserved Reserved for future use
PS Serial interrupt priority PS = 1 set priority Serial
interrupt
PT1 Timer 1 interrupt priority PT1 = 1 set priority Timer 1
interrupt
PX1 External 1 interrupt priority PX1 = 1 set priority External 1
interrupt
PT0 Timer 0 interrupt priority PT0 = 1 set priority Timer 0
interrupt
PX0 External 0 interrupt priority PX0 = 1 set priority External 0
interrupt

Priority order
Highest External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Lowest Serial interrupt 1