ECEN474: (Analog) VLSI Circuit Design Fall 2012
Lecture 1: Introduction
Sam Palermo Analog & Mixed-Signal Center Texas A&M University
Analog Circuit Sequence
326
Why is Analog Important?
[Silva]
 Naturally occurring signals are analog  Analog circuits are required to amplify and condition the signal for further processing  Performance of analog circuits often determine whether the chip works or not  Examples
 Sensors and actuators (imagers, MEMS)  RF transceivers  Microprocessor circuits (PLL, high-speed I/O, thermal sensor)
3
Integrated Circuits
[Bohr ISSCC 2009]
 4-core Microprocessor (45nm CMOS)
 Mostly Digital  Noteable analog blocks
 PLL, I/O circuits, thermal sensor
[Sowlati ISSCC 2009]
 Cellular Transceiver (0.13m CMOS)
 Considerable analog & digital
[Pertijs ISSCC 2009]
 Instrumentation Amplifier (0.5m CMOS)
 Mostly Analog  Some Digital Control Logic
4
The Power of CMOS Scaling
[Bohr ISSCC 2009]
 Scaling transistor dimensions allows for improved performance, reduced power, and reduced cost/transistor  Assuming you can afford to build the fab
 32nm CMOS fab ~3-4 BILLION dollars
5
Course Topics
 CMOS technology
 Active and passive devices  Layout techniques
 MOS circuit building blocks
 Single-stage amplifiers, current mirrors, differential pairs
 Amplifiers and advanced circuit techiques
Course Goals
 Learn analog CMOS design approaches
 Specification  Circuit Topology  Circuit Simulation  Layout  Fabrication
 Understand CMOS technology from a design perspective
 Device modeling and layout techniques
 Use circuit building blocks to construct moderately complex analog circuits
 Multi-stage amplifiers, filters, simple data converters, 
Administrative
 Instructor:
 Sam Palermo  315E WERC Bldg., 845-4114, spalermo@ece.tamu.edu  Office hours: MW 3:00pm-4:30pm
 Lectures: MWF 9:10am-10am, ETB 1037  Class web page
 http://www.ece.tamu.edu/~spalermo/ecen474.html
Class Material
 Textbook: Design of Analog CMOS Integrated Circuits, B. Razavi, McGraw-Hill, 2001. (Optional)  References
 Analog Integrated Circuit Design, D. Johns and K. Martin, John Wiley & Sons, 1997.  Analysis and Design of Analog Integrated Circuits, P. Gray, R. Meyer, P. Hurst, and S. Lewis, John Wiley & Sons, 4th Edition, 2003.  Technical Papers
 Class notes
 Posted on the web and will hand out hard copies in class
Grading
 Exams (60%)
 Three midterm exams (20% each)
 Homework (10%)
 Collaboration is allowed, but independent simulations and write-ups  Need to setup CADENCE simulation environment  No late homework will be graded
 Laboratory (20%)  Final Project (10%)
 Groups of 1-2 students  Report and PowerPoint presentation required
10
Preliminary Schedule
 Dates may change with reasonable notice
11
Reading
 Razavi Chapter 2 & 16
12
Analog IC Design Olympics (Extra Credit)
 Analog IC Design Olympics Contest is on September 15
 http://amsc.tamu.edu/olympics.htm  Register by August 31 at noon
 Open to all TAMU Grad Students  Teams of 2 will compete in a circuit design contest  Designs are judged by a distinguished industrial committee
 Broadcom, NXP, Qualcomm, Silicon Labs, TSMC, TI, Stone Soup Labs
 Extra Credit Opportunity for Grad Students
 20 points added to a homework score  Undergrads will have an extra credit opportunity later in the semester
13
CMOS Technology Overview
       MOS Transistors Interconnect Diodes Resistors Capacitors Inductors Bipolar Transistors
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CMOS Technology
[Razavi]
NMOS
PMOS
15
NMOS Transistor
Source Metal 1 CVD Oxide Drain Poly Gate n+ Gate Oxide p substrate Bulk
Gate
[Silva]
NMOS Symbols
n+
Cross Section
Source Bulk
Drain
Circuit Symbol
n+
Poly
n+
Top View
16
PMOS Transistor
Drain Metal 1 CVD Oxide Source Poly Gate p+ Gate Oxide n-well Bulk p substrate Bulk
Gate
[Silva]
PMOS Symbols
p+
Cross Section
Drain Bulk
Source
Circuit Symbol
n-well
n+
Poly
n+
Top View
17
Todays CMOS Transistors
[Bohr ISSCC 2009]
 Todays transistors have advanced device structures  Most advanced transistors are moving from poly-gates back to metal-gates
 Allows for High-K gate dielectric and reduced gate leakage current
18
Interconnect (Wires)
[Bohr ISSCC 2009]
19
Diodes
[Silva] Anode Cathode Typical values: P+=1017-1019 acceptors /cm3 P=1015-1017 acceptors /cm3 A SiO2 P+ Diode N N+ Contact C N=1016-1018 donors/cm3 N+=1017-1019 donors/cm3 Metal  5x1022 electrons/cm3
Bulk (substrate) P-type
20
Resistors
Poly Resistor Nwell Resistor [Razavi]
 Different resistor types have varying levels of accuracy and temperature and voltage sensitivities
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Capacitors
Poly - Diffusion Poly - Poly Metal1 - Poly
[Razavi] Vertical Metal Sandwich
Lateral Metal-Oxide-Metal (MOM)
[Wang]
[Ho]
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Inductors
[Silva/Park]
 Inductors are generally too big for widespread use in analog IC design
 Can fit thousands of transistors in a typical inductor area (100m x 100m)
 Useful to extend amplifier bandwidth at zero power cost (but significant area cost)
23
Bipolar Transistors  Vertical PNP
[Johns] Vertical PNP Bandgap Reference
 Useful in a precise voltage reference circuit commonly implemented in ICs (Bandgap Reference)
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Bipolar Transistors  Latchup
[Razavi] Equivalent Circuit
 Potential for parasitic BJTs (Vertical PNP and Lateral NPN) to form a positive feedback loop circuit  If circuit is triggered, due to current injected into substrate, then a large current can be drawn through the circuit and cause damage  Important to minimize substrate and well resistance with many contacts/guard rings
25
Next Time
 MOS Transistor Modeling
 DC I-V Equations  Small-Signal Model
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