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Finite Wordlength Effects: Binary Number Representation

This document discusses finite wordlength effects in digital filters. It begins by explaining different number representation formats including fixed point, floating point, and two's complement. It then discusses quantization and quantization error when rounding numbers. The main effects of finite wordlength are deviation from ideal frequency response, sensitivity to coefficients, and limit cycles or noise. Rounding operations can introduce quantization error. Different filter structures like direct form and cascade affect sensitivity. The document provides examples of limit cycles and discusses filter scaling. It also introduces wave digital filters which can help reduce sensitivity and limit cycles.

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0% found this document useful (0 votes)
31 views32 pages

Finite Wordlength Effects: Binary Number Representation

This document discusses finite wordlength effects in digital filters. It begins by explaining different number representation formats including fixed point, floating point, and two's complement. It then discusses quantization and quantization error when rounding numbers. The main effects of finite wordlength are deviation from ideal frequency response, sensitivity to coefficients, and limit cycles or noise. Rounding operations can introduce quantization error. Different filter structures like direct form and cascade affect sensitivity. The document provides examples of limit cycles and discusses filter scaling. It also introduces wave digital filters which can help reduce sensitivity and limit cycles.

Uploaded by

Arunmozhli
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Finite Wordlength Effects

Binary number representation

Fixed Point
= 0 . 1 2 1
negative numbers can be expressed by
sign bit
twos complement
most significant bit
ones complement
a0 a1 a2

aL-1
sign magnitude
binary point
1
(1) least significant bit
(10) = 0 + 1 2 + + 1 2
Floating Point

sign bit
sign of exponent mantissa
m0 r0 r1

rE m1
mM
binary point
exponent

Quantization
Reduction of Wordlength
roundoff
add 1 to LSB if the next bit is 1
do nothing if 0
*
add 1 if 1

truncation
truncate the following bits

Quantization Error
When a number is rounded to B bit
Fixed Point
=

2 < 2, = 2
Floating Point
= ( )/

2 < 2
3

Finite Wordlength Effects


deviation of frequency response
due to finite-wordlength coefficients

sensitivity

round off operation


noise
uncorrelated error : random
limit cycles
correlated
overflow

all are related to network structure (direct,


cascade ......)
4

Round off Operation

n-bit

n-bit

2n-bit

full precision cannot be kept


n-bit

quantization
roundoff
truncation
p

error

: stepsize

for uniform distribution, zero mean and

/2

3
1
1

2 =
2 =
2 =
3

/2

-Q/2
/2
/2

0
2
=
12

error
Q/2

Linear Model of Quantization


()

Q
filter
input

()
=

2 () =

()

()

()
filter
output

()
=

2 2

=
=

Noise Gain
using Parsevals equation
2

2 ()

1
=
2
2

For multiple noise sources


if noises are uncorrelated

=
=1

2
=1

1
2

noise gain

Scaling
adjust internal signal level so that
the output SN ratio is maximized

digital
1/S
filter

scaling
multiplier

Scaling strategy
no overflow for any input sequence

---too pessimistic
lp norm scaling

0
1

1/

: transfer function from


the input to the internal node

Example of Limit Cycles


zero input case
= 0.8 1

1
2
3
4
5
6
7
8

=
=
=
=
=
=
=
=

0.8(0)
0.8(1)
0.8(2)
0.8(3)
0.8(4)
0.8(5)
0.8(6)
0.8(7)

=
=
=
=
=
=
=
=

0 = 10

Quantizer
absolute value
rounded to integer
0.8 10 = 8 = 8
0.8 (8) = 6.4 = 6
0.8 6 = 4.8 = 5
0.8 (5) = 4 = 4
0.8 4 = 3.2 = 3
0.8 (3) = 2.4 = 2
0.8 2 = 1.6 = 2
0.8 (2) = 1.6 = 2
9

Filter Structures
Direct Form I

Direct Form II

z -1

z -1

z -1

z -1

z -1

z -1

-1

-1

z -1

exchange of the order


common use of the delays

Cascade Form
factorization of the transfer function
+

+
z -1

z -1

cn

-an

z -1

z -1
-bn

dn

10

Example of Coefficient Rounding


4th-order LPF
0.0018 1 + 1 4
=
(1 1.55 1 + 0.65 2 )(1 1.50 1 + 0.85 2 )
is realized using 8bit coefficients
ideal
cascade
direct

= 1
ideal response overlaps with the cascade

11

cf. Numerical Error


For the solution of linear algebraic equations
Gauss-Jordan Elimination
Gaussian Elimination with Back substitution
LU Decomposition
etc.
Depending on the algorithm, computational
complexity and numerical accuracy are different
Choice of filter structures ~ choice of computational algorithms
12

Simulation of reactance circuit


R
V1 ~

reactance
(lossless)

available power

1 2
4

V2

consumed power

2 2

13

Matching
matching points

2
1
1
2

maximum power transfer


|| is bounded

frequency
14

at a matching point
2
1

1
2

0
sensitivity

reactance

||

is zero at matching frequencies


and low in the passband

15

voltage-current simulation
V1

R1
I1

L2

V2
R2

V3
I3

I2

C3

C1

V1

-1 V2

1
R1
I1

1
s C1

V3

-1

1
s L2
-1

I2

1
R2

1
s C3
-1

leap frog

I3

widely used in RC active and switched capacitor filters

16

Delay-free Loops
bilinear transformation

integrator

1+ 1
1 1

+
+
+

z -1
z -1
+
+
+

17

Simulation in terms of
Wave Quantities
more precisely : voltage waves
incident wave
reflected wave

A=V+RI
B=V-RI

R : port resistance

one-part elements
R
s

sources
R

sR
R

= 1 = 1 = 0 =
A

A
z

z -1

-1

=
A

= 2
A

-1

-1

B=0

2E
B

18

Interconnections and Adaptors


Parallel connection of n ports
Series connection of n ports
Kirchhoff s voltage law
Kirchhoff s current law
are interpreted in terms of waves using

= +
=

= 1, 2, ,
19

Parallel Connection
2
2

1
1

2 2

1
1

1 + 2 + + = 0,

1 = 2 = =

= 1 1 + 2 2 + + ,
where =

1 +2 ++

, =

1 + 2 + + = 2

= 1, 2, ,
1

20

Parallel
Adapters
A
B

A3

R3
A1
B1

R1

A1

1 ||2

R2

B2
B1

B1

R1

1 ||

R3

1
1
1 =
=
1 + 2 3

A3

B2

port 3 : dependent port

A1

B3

A2

A2
+

R2
A1

B3

if 3 = 1, i.e. 3 = 1 + 2
B2

A2

2
=
, = 1,2
1 + 2 + 3

A2

B3

A3

1
B1

B2

constrained three-port parallel adaptor


with port3 reflection-free
and port2 dependent

21

Series Connection
2

2
2

1
1

1
1

1 + 2 + + = 0,
1 = 2 = =
= 1 + 2 + + , = 1, 2, ,
2
where =
1 +2 ++

1 + 2 + + = 2

22

A3

Series AdaptersA

B3

A1

R3

A1
R1

B1

A2

2 R2

2 Rk
R1 R2 R3

B2

B1

R1

B2

k 1,2

B3

-1

port 3 : dependent port

B2

A2
A1

B3

R3

1
1
1 =
=
1 + 2 3

A3

B1

-1

+
+

R2
A1

B1

if 3 = 1, i.e. 3 = 1 + 2
A2

A2

1
+
-1

B3

A3
B2

constrained three-port parallel adaptor


with port3 reflection-free
and port2 dependent

23

Interconnection Rules
1. grouping of terminals into ports must remain
respected
2. waves must flow in the same direction
3. two port resistances must be the same
4. connection must not make delay-free loops
1

2
24

Wave Digital Filters

low sensitivity
limit cycles can easily be suppressed
forced response stability
stability under looped condition

25

Third-order Filter C

L2

1/C2

L2

C1

R1
R2

L2

C2

C1

R1

C3
1/C3

1/C1

C3
R2

R1

z -1

z -1

3 ||

z -1

z -1

X1
Y1

1 ||

1
1

||5

2
+
1

=1

Y2
0

1
2
1

five multipliers in general cases


four multipliers if symmetric

R2

1
1

26

Symmetric Case
Bartletts bisection theorem

I1

I2

z1
V1

Z1

R V2

R
z1

1 + 2 2 1
1
1
2
2
=
2
2 1 1 + 2 2
2
2
= +
,
= 1,2
=

Z2
1 + 2 1 2
1
2
2
=
2
2 1 1 + 2
2
2

where = +, = 1,2

1
2

reflection coefficient

if 1 and 2 are reactances


1 and 2 are all-paass fucntions.

27

Lattice Wave Digital Filters


A2

A1
+

S1

S2

B2

B1

for A2=0
S1

A1
S2

B2

parallel of two all-pass filters

for the realization of 1 and 2 themselves,


any methods can be used.

for example, Cauer


cascade of all-pass sections

28

example

L2

C2
C1

C1

C1+2C2

2
2

Z1:

Z2:

C1

1
z-1

1 ||2
-

||

z-1

1
2

three multipliers

z-1

symmetry
odd-order

Butterworth, Chebyshev and elliptic

29

WDF structures may become very complicated


when general transfer functions are realized.
Simple recursive structures + weighted taps
cascade unit elements (vocal tract)

||

-1

||

||

-1

z -1

Digital Lattice Filters


internal circuit of two-port adaptor
+

km

km
km

one-multiplier lattice

two-multiplier lattice

30

Simulation of
Physical Systems

Wave digital filters physically model passive RLC circuits


Can model any systems described by (ordinary or partial)
differential equations (both linear and non-linear) with high
degrees of parallelism and locality
A traveling wave view (at the speed of light) is much closer to
underlying physical reality than any instantaneous models
The bilinear transform is equivalent in the time domain to the
trapezoidal rule for numerical integration
In discretizing space-time continuum, we can get stability and
robustness, unlike Courant-Friedrichs-Lewy Condition which is
necessary but not strictly sufficient
Courant, R., Friedrichs, K., and Lewy, H., "ber die partiellen
Differenzengleichungen der mathematischen Physik",
Mathematische Annalen 100 (1): 3274 1928 (English versions in
31
1956 and 1967)

Exercise 3
1. For the zero-input first-order digital filter in Slide 9,
what is a multiplier coefficient range that does not
cause any limit cycle oscillation?
2. Show that the wave digital filter for a capacitor with its
impedance 1/ is a simple delay, where the port
resistance is = 1/.
3. Derive a wave digital filter structure for a voltage
source E with a series inductive impedance , where
the port resistance is = .
4. Read the following paper;
A.Nishihara & M.Murakami, Signal-Processor-Based
Digital Filters Having Low Sensitivity, Electronics
Letters, 20, 8, pp.325-326, Apr. 1984
32

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